110 100 10k 100k
FREQUENCY (Hz)
1
10
100
1k
VOLTAGE NOISE (nV/
Hz)
V+ = 5.5V
V+ = 2.5V
CCM
IIN
RF
VOUT
+
-
+
-
VB
CF
CD
VOUT
IIN - RF
=
CIN = CD + CCM
LMV796, LMV797
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SNOSAU9D –MARCH 2006–REVISED MARCH 2013
LMV796/LMV796Q/LMV797 17 MHz, Low Noise, CMOS Input, 1.8V Operational Amplifiers
Check for Samples: LMV796,LMV797
1FEATURES DESCRIPTION
The LMV796/LMV796Q (Single) and the LMV797
2(Typical 5V Supply, Unless Otherwise Noted) (Dual) low noise, CMOS input operational amplifiers
• Input Referred Voltage Noise 5.8 nV/√Hz offer a low input voltage noise density of 5.8 nV/√Hz
• Input Bias Current 100 fA while consuming only 1.15 mA (LMV796/LMV796Q)
of quiescent current. The LMV796/LMV796Q and
• Unity Gain Bandwidth 17 MHz LMV797 are unity gain stable op amps and have gain
• Supply Current per Channel bandwidth of 17 MHz. The LMV796/LMV796Q/
– LMV796/LMV796Q 1.15 mA LMV797 have a supply voltage range of 1.8V to 5.5V
and can operate from a single supply. The
– LMV797 1.30 mA LMV796/LMV796Q/LMV797 each feature a rail-to-rail
• Rail-to-Rail Output Swing output stage capable of driving a 600Ωload and
– @ 10 kΩLoad 25 mV from Rail sourcing as much as 60 mA of current.
– @ 2 kΩLoad 45 mV from Rail The LMV796/LMV796Q family provides optimal
• Guaranteed 2.5V and 5.0V Performance performance in low voltage and low noise systems. A
CMOS input stage, with typical input bias currents in
• Total Harmonic Distortion 0.01% @ 1kHz, 600Ωthe range of a few femtoAmperes, and an input
• Temperature Range −40°C to 125°C common mode voltage range, which includes ground,
• LMV796Q is an Automotive Grade Product that make the LMV796/LMV796Q and the LMV797 ideal
is AEC-Q100 Grade 1 Qualified and is for low power sensor applications.
Manufactured on an Automotive Grade Flow. The LMV796/LMV796Q/LMV797 are manufactured
using TI’s advanced VIP50 process. The LMV796/
APPLICATIONS LMV796Q are offered in 5–pin SOT-23 package. The
LMV797 is offered in 8–pin VSSOP package.
• Photodiode Amplifiers
• Active Filters and Buffers
• Low Noise Signal Processing
• Medical Instrumentation
• Sensor Interface Applications
• Automotive
Typical Application
Figure 1. Photodiode Transimpedance Amplifier Figure 2. Input Referred Voltage Noise vs.
Frequency
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2006–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
LMV796, LMV797
SNOSAU9D –MARCH 2006–REVISED MARCH 2013
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings(1)(2)
Human Body Model 2000V
ESD Tolerance(3) Machine Model 200V
Charge-Device Model 1000V
VIN Differential ±0.3V
Supply Voltage (V+– V−) 6.0V
Input/Output Pin Voltage V++0.3V, V−−0.3V
Storage Temperature Range −65°C to 150°C
Junction Temperature(4) +150°C
Infrared or Convection (20 sec) 235°C
Soldering Information Wave Soldering Lead Temperature (10 sec) 260°C
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the Electrical Characteristics tables.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3) Human Body Model is 1.5kΩin series with 100pF. Machine Model is 0Ωin series with 200pF.
(4) The maximum power dissipation is a function of TJMAX,θJA. The maximum allowable power dissipation at any ambient temperature is PD
= (TJMAX - TA) / θJA. All numbers apply for packages soldered directly onto a PC Board.
Operating Ratings(1)
Temperature Range(2) −40°C to 125°C
−40°C ≤TA≤125°C 2.0V to 5.5V
Supply Voltage (V+– V−)0°C ≤TA≤125°C 1.8V to 5.5V
5-Pin SOT-23 180°C/W
Package Thermal Resistance (θJA)(2) 8-Pin VSSOP 236°C/W
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the Electrical Characteristics tables.
(2) The maximum power dissipation is a function of TJMAX,θJA. The maximum allowable power dissipation at any ambient temperature is PD
= (TJMAX - TA) / θJA. All numbers apply for packages soldered directly onto a PC Board.
2.5V Electrical Characteristics
Unless otherwise specified, all limits are specified for TA= 25°C, V+= 2.5V, V−= 0V, VCM = V+/2 = VO.Boldface limits apply
at the temperature extremes. Min Typ Max
Symbol Parameter Conditions Units
(1) (2) (1)
0.1 ±1.35
VOS Input Offset Voltage mV
±1.65
LMV796/LMV796Q(3) −1.0
TC VOS Input Offset Voltage Temperature Drift μV/°C
LMV797(3) −1.8
0.05 1
−40°C ≤TA≤85°C 25
IBInput Bias Current VCM = 1.0V(4) (5) pA
0.05 1
−40°C ≤TA≤125°C 100
IOS Input Offset Current VCM = 1.0V(5) 10 fA
(1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlations using the
statistical quality control (SQC) method.
(2) Typical values represent the parametric norm at the time of characterization.
(3) Offset voltage average drift is determined by dividing the change in VOS by temperature change.
(4) Positive current corresponds to current flowing into the device.
(5) This parameter is specified by design and/or characterization and is not tested in production.
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SNOSAU9D –MARCH 2006–REVISED MARCH 2013
2.5V Electrical Characteristics (continued)
Unless otherwise specified, all limits are specified for TA= 25°C, V+= 2.5V, V−= 0V, VCM = V+/2 = VO.Boldface limits apply
at the temperature extremes. Min Typ Max
Symbol Parameter Conditions Units
(1) (2) (1)
80 94
CMRR Common Mode Rejection Ratio 0V ≤VCM ≤1.4V dB
75
2.0V ≤V+≤5.5V, VCM = 0V 80 100
75
PSRR Power Supply Rejection Ratio dB
1.8V ≤V+≤5.5V, VCM = 0V 80 98
CMRR ≥60 dB −0.3 1.5
CMVR Common Mode Voltage Range V
CMRR ≥55 dB -0.3 1.5
LMV796/LMV796Q 85 98
80
VOUT = 0.15V to 2.2V,
RLOAD = 2 kΩto V+/2 LMV797 82 92
AVOL Open Loop Voltage Gain dB
78
VOUT = 0.15V to 2.2V, 88 110
RLOAD = 10 kΩto V+/2 84
RLOAD = 2 kΩto V+/2 25 75
82
Output Voltage Swing High RLOAD = 10 kΩto V+/2 20 65
71 mV from
VOUT either rail
30 75
RLOAD = 2 kΩto V+/2 78
Output Voltage Swing Low 15 65
RLOAD = 10 kΩto V+/2 67
Sourcing to V−35 47
VIN = 200 mV(6) 28
IOUT Output Current mA
Sinking to V+7 15
VIN = –200 mV(6) 5
LMV796/LMV796Q 0.95 1.30
1.65
ISSupply Current per Amplifier mA
LMV797 1.1 1.50
per channel 1.85
AV= +1, Rising (10% to 90%) 8.5
SR Slew Rate V/μs
AV= +1, Falling (90% to 10%) 10.5
GBW Gain Bandwidth 14 MHz
enInput Referred Voltage Noise Density f = 1 kHz 6.2 nV/√Hz
inInput Referred Current Noise Density f = 1 kHz 0.01 pA/√Hz
THD+N Total Harmonic Distortion + Noise f = 1 kHz, AV= 1, RLOAD = 600Ω0.01 %
(6) The short circuit test is a momentary test, the short circuit duration is 1.5ms.
5V Electrical Characteristics
Unless otherwise specified, all limits are specified for TA= 25°C, V+= 5V, V−= 0V, VCM = V+/2 = VO.Boldface limits apply at
the temperature extremes. Min Typ Max
Symbol Parameter Conditions Units
(1) (2) (1)
0.1 ±1.35
VOS Input Offset Voltage mV
±1.65
LMV796/LMV796Q(3) −1.0
TC VOS Input Offset Voltage Temperature Drift μV/°C
LMV797(3) −1.8
(1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlations using the
statistical quality control (SQC) method.
(2) Typical values represent the parametric norm at the time of characterization.
(3) Offset voltage average drift is determined by dividing the change in VOS by temperature change.
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5V Electrical Characteristics (continued)
Unless otherwise specified, all limits are specified for TA= 25°C, V+= 5V, V−= 0V, VCM = V+/2 = VO.Boldface limits apply at
the temperature extremes.
−40°C ≤TA≤85°C 0.1 1
25
IBInput Bias Current VCM = 2.0V(4) (5) pA
−40°C ≤TA≤125°C 0.1 1
100
IOS Input Offset Current VCM = 2.0V(5) 10 fA
0V ≤VCM ≤3.7V 80 100
CMRR Common Mode Rejection Ratio dB
75
2.0V ≤V+≤5.5V, VCM = 0V 80 100
75
PSRR Power Supply Rejection Ratio dB
1.8V ≤V+≤5.5V, VCM = 0V 80 98
CMRR ≥60 dB −0.3 4
CMVR Common Mode Voltage Range V
CMRR ≥55 dB -0.3 4
LMV796/LMV796Q 85 97
80
VOUT = 0.3V to 4.7V,
RLOAD = 2 kΩto V+/2 LMV797 82 89
AVOL Open Loop Voltage Gain dB
78
VOUT = 0.3V to 4.7V, 88 110
RLOAD = 10 kΩto V+/2 84
RLOAD = 2 kΩto V+/2 35 75
82
Output Voltage Swing High RLOAD = 10 kΩto V+/2 25 65
71
LMV796/LM796Q 42 75 mV from
VOUT 78 either rail
RLOAD = 2 kΩto V+/2 LMV797 45 80
Output Voltage Swing Low 83
RLOAD = 10 kΩto V+/2 20 65
67
Sourcing to V−45 60
VIN = 200 mV(6) 37
IOUT Output Current mA
Sinking to V+10 21
VIN = –200 mV(6) 6
1.15 1.40
LMV796/LMV796Q 1.75
ISSupply Current per Amplifier mA
1.30 1.70
LMV797per channel 2.05
AV= +1, Rising (10% to 90%) 6.0 9.5
SR Slew Rate V/μs
AV= +1, Falling (90% to 10%) 7.5 11.5
GBW Gain Bandwidth 17 MHz
enInput Referred Voltage Noise Density f = 1 kHz 5.8 nV/√Hz
inInput Referred Current Noise Density f = 1 kHz 0.01 pA/√Hz
THD+N Total Harmonic Distortion + Noise f = 1 kHz, AV= 1, RLOAD = 600Ω0.01 %
(4) Positive current corresponds to current flowing into the device.
(5) This parameter is specified by design and/or characterization and is not tested in production.
(6) The short circuit test is a momentary test, the short circuit duration is 1.5ms.
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OUT A
-IN A
+IN A
V-
1
2
3
4+IN B
-IN B
OUT B
V+
5
6
7
8
+
-
+-
OUTPUT
V-
+IN
V+
-IN
+-
1
2
34
5
LMV796, LMV797
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SNOSAU9D –MARCH 2006–REVISED MARCH 2013
Connection Diagram
Figure 3. 5-Pin SOT-23 Figure 4. 8-Pin VSSOP
Top View Top View
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1.5 2.5 3.5 4.5 5.5 6.0
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
0.5
VOS (mV)
V+ (V)
-40°C
125°C
25°C
-0.3 0.6 1.5 2.4 3.3 4.2
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
0.5
VOS (mV)
VCM (V)
-40°C
25°C
125°C
V+ = 5V
-0.3 0 0.3 0.6 0.9 1.2
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
0.5
VOS (mV)
VCM (V)
125°C
25°C
-40°C
V+ = 1.8V
-40°C
-0.3 0.4 1.1 1.8
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
0.5
0.55
0.6
VOS (mV)
VCM (V)
V+ = 2.5V
125°C
25°C
1.5 2.5 3.5 4.5 5.5 6
0
0.4
0.8
1.2
1.6
2
SUPPLY CURRENT (mA)
V+ (V)
25°C
-40°C
125°C
1.5 2.5 3.5 4.5 5.5 6.0
SUPPLY CURRENT (mA)
V+ (V)
0
0.4
0.8
1.2
1.6
2
25°C
-40°C
125°C
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SNOSAU9D –MARCH 2006–REVISED MARCH 2013
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Typical Performance Characteristics
Unless otherwise specified, TA= 25°C, V–= 0, V+= Supply Voltage = 5V, VCM = V+/2.
Supply Current vs. Supply Voltage (LMV796/LMV796Q) Supply Current vs. Supply Voltage (LMV797)
Figure 5. Figure 6.
VOS vs. VCM VOS vs. VCM
Figure 7. Figure 8.
VOS vs. VCM VOS vs. Supply Voltage
Figure 9. Figure 10.
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-40°C
0 1 2 3 4 5
0
10
20
30
40
50
60
70
ISOURCE (mA)
VOUT (V)
125°C
25°C
1 2 3 4 5 6
0
10
20
30
40
50
60
70
80
ISOURCE (mA)
V+ (V)
125°C
25°C
-40°C
0 1 2 3 4
-50
50
IBIAS (pA)
VCM (V)
-40
-30
-20
-10
0
10
20
30
40
125°C
V+ = 5V
85°C
0 1 2 3 4
-3
-2.5
-2
-1.5
-1
-0.5
0
0.5
1
1.5
IBIAS (pA)
VCM (V)
-40°C
25°C
V+ = 5V
LMV796, LMV797
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SNOSAU9D –MARCH 2006–REVISED MARCH 2013
Typical Performance Characteristics (continued)
Unless otherwise specified, TA= 25°C, V–= 0, V+= Supply Voltage = 5V, VCM = V+/2.
Slew Rate vs. Supply Voltage Input Bias Current vs. VCM
Figure 11. Figure 12.
Input Bias Current vs. VCM Sourcing Current vs. Supply Voltage
Figure 13. Figure 14.
Sinking Current vs. Supply Voltage Sourcing Current vs. Output Voltage
Figure 15. Figure 16.
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125°C
25°C
-40°C
0
10
20
30
40
45
50
VOUT FROM RAIL (mV)
5
15
25
35
1.8 2.5 3.2 3.9 4.6 5.3 6
V+ (V)
RLOAD = 2 k:
1.8 2.5 3.2 3.9 4.6 5.3 6
0
10
20
30
40
50
60
70
80
90
100
VOUT FROM RAIL (mV)
V+ (V)
125°C
25°C
-40°C
RLOAD = 600:
1.8 2.5 3.2 3.9 4.6 5.3 6
0
5
10
15
20
25
30
35
40
45
50
VOUT FROM RAIL (mV)
V+ (V)
125°C
25°C
-40°C
RLOAD = 2 k:
1.8 2.5 3.2 3.9 4.6 5.3 6
V+ (V)
0
5
10
15
20
25
VOUT FROM RAIL (mV)
-40°C
25°C
125°C
RLOAD = 10 k:
1.8 2.5 3.2 3.9 4.6 5.3 6
V+ (V)
0
5
10
15
20
25
30
35
40
VOUT FROM RAIL (mV)
125°C
25°C
-40°C
RLOAD = 10 k:
LMV796, LMV797
SNOSAU9D –MARCH 2006–REVISED MARCH 2013
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Typical Performance Characteristics (continued)
Unless otherwise specified, TA= 25°C, V–= 0, V+= Supply Voltage = 5V, VCM = V+/2.
Sinking Current vs. Output Voltage Positive Output Swing vs. Supply Voltage
Figure 17. Figure 18.
Negative Output Swing vs. Supply Voltage Positive Output Swing vs. Supply Voltage
Figure 19. Figure 20.
Negative Output Swing vs. Supply Voltage Positive Output Swing vs. Supply Voltage
Figure 21. Figure 22.
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0.02 0.2 2
OUTPUT AMPLITUDE (V)
-140
-120
-100
-80
-60
-40
-20
0
THD+N (dB)
V+ = 2.75V
V- = -2.75V
AV = +2
RLOAD = 100 k:
RLOAD = 600:
4
OUTPUT AMPLITUDE (V)
0.02 0.2 2
-120
-100
-80
-60
-40
-20
0
THD+N (dB)
RLOAD = 600:
RLOAD = 100 k:
V+ = 1.2V
V- = -0.6V
AV = +2
020 40 60 80 100 120
CLOAD (pF)
0
10
20
30
40
50
60
70
OVERSHOOT AND UNDERSHOOT %
US%
OS%
110 100 10k 100k
FREQUENCY (Hz)
1
10
100
1k
VOLTAGE NOISE (nV/
Hz)
V+ = 5.5V
V+ = 2.5V
1.8 2.5 3.2 3.9 4.6 5.3 6
V+ (V)
0
20
40
60
80
100
120
VOUT FROM RAIL (mV)
RLOAD = 600:
-40°C
25°C 125°C
400 nV/DIV
1S/DIV
VS = ±2.5V
VCM = 0.0V
LMV796, LMV797
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SNOSAU9D –MARCH 2006–REVISED MARCH 2013
Typical Performance Characteristics (continued)
Unless otherwise specified, TA= 25°C, V–= 0, V+= Supply Voltage = 5V, VCM = V+/2.
Negative Output Swing vs. Supply Voltage Time Domain Voltage Noise
Figure 23. Figure 24.
Input Referred Voltage Noise vs. Frequency Overshoot and Undershoot vs. CLOAD
Figure 25. Figure 26.
THD+N vs. Peak-to-Peak Output Voltage (VOUT) THD+N vs. Peak-to-Peak Output Voltage (VOUT)
Figure 27. Figure 28.
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10 1k 10k 100k 1M 10M 100M
FREQUENCY (Hz)
0.01
0.1
1
10
100
OUTPUT IMPEDANCE (:)
100
160
1k 100k 100M
FREQUENCY (Hz)
0
60
CROSSTALK REJECTION RATION (dB)
10M
1M
10k
120
100
40
20
80
140
1k 10k 100k 1M 10M 100M
-40
-20
0
20
60
80
100
120
GAIN (dB)
FREQUENCY (Hz)
40
-60
PHASE (°)
-40
-20
0
20
60
80
100
120
40
-60
CL = 20 pF
CL = 50 pF
CL = 100 pF
GAIN
CL = 100 pF
CL = 50 pF
CL = 20 pF
PHASE
-40
-20
0
20
60
80
100
120
GAIN (dB)
40
-60
PHASE (°)
-40
-20
0
20
60
80
100
120
40
-60
FREQUENCY (Hz)
10k 100k 1M 10M 100M
PHASE
GAIN
RLOAD = 600:10k: 10 M:
10 100 1k 10k 100k
FREQUENCY (Hz)
0
0.001
0.002
0.003
0.004
0.005
0.006
THD+N (%)
RL = 600:
RL = 100 k:
V+ = 1.2V
V- = 0.6V
VO = 0.9 VPP
AV = +2
10 100 1k 10k 100k
FREQUENCY (Hz)
0
0.001
0.002
0.003
0.004
0.005
0.006
THD+N (%)
RL = 600:
RL = 100 k:
V+ = 2.5V
V- = 2.5V
VO = 4 VPP
AV = +2
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Typical Performance Characteristics (continued)
Unless otherwise specified, TA= 25°C, V–= 0, V+= Supply Voltage = 5V, VCM = V+/2.
THD+N vs. Frequency THD+N vs. Frequency
Figure 29. Figure 30.
Open Loop Gain and Phase with Capacitive Load Open Loop Gain and Phase with Resistive Load
Figure 31. Figure 32.
Closed Loop Output Impedance vs. Frequency Crosstalk Rejection
Figure 33. Figure 34.
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-10
0
10
20
30
40
50
PHASE MARGIN (°)
10 100 1000
CLOAD (pF)
RLOAD = 10 M:
V+ = 2.5V
RLOAD = 10 k:
RLOAD = 600:
-10
0
10
20
30
40
50
PHASE MARGIN (°)
10 100 1000
CLOAD (pF)
RLOAD = 10 M:
V+ = 5V
RLOAD = 10 k:
RLOAD = 600:
10 mV/DIV
200 ns/DIV
INPUT = 20 mVPP
f = 1 MHz
V+ = 5V
200 mV/DIV
800 ns/DIV
INPUT = 1 VPP
f = 200 kHz
V+ = 5V
10 mV/DIV
200 ns/DIV
INPUT = 20 mVPP
f = 1 MHz
V+ = 2.5V
800 ns/DIV
200 mV/DIV
INPUT = 1 VPP
f = 200 kHz
V+ = 2.5V
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SNOSAU9D –MARCH 2006–REVISED MARCH 2013
Typical Performance Characteristics (continued)
Unless otherwise specified, TA= 25°C, V–= 0, V+= Supply Voltage = 5V, VCM = V+/2.
Small Signal Transient Response, AV= +1 Large Signal Transient Response, AV= +1
Figure 35. Figure 36.
Small Signal Transient Response, AV= +1 Large Signal Transient Response, AV= +1
Figure 37. Figure 38.
Phase Margin vs. Capacitive Load (Stability) Phase Margin vs. Capacitive Load (Stability)
Figure 39. Figure 40.
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10 1k 1M
FREQUENCY (Hz)
0
40
120
CMRR (dB)
100k
10k
100
100
60
20
80
V+ = 2.5V
V+ = 5V
0 1 2 3 4
0
5
10
15
20
25
CCM (pF)
VCM (V)
V+ = 5V
-120
-100
-80
-60
-40
-20
NEGATIVE PSRR (dB)
10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
V+ = 1.8V
V+ = 5.5V
10 1k 100k 10M
FREQUENCY (Hz)
-100
-60
-40
0
POSITIVE PSRR (dB)
1M10k
100
-20
-80 1.8V
5.5V
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Typical Performance Characteristics (continued)
Unless otherwise specified, TA= 25°C, V–= 0, V+= Supply Voltage = 5V, VCM = V+/2.
Positive PSRR vs. Frequency Negative PSRR vs. Frequency
Figure 41. Figure 42.
CMRR vs. Frequency Input Common Mode Capacitance vs. VCM
Figure 43. Figure 44.
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Product Folder Links: LMV796 LMV797
LMV796, LMV797
www.ti.com
SNOSAU9D –MARCH 2006–REVISED MARCH 2013
APPLICATION INFORMATION
ADVANTAGES OF THE LMV796/LMV797
Wide Bandwidth at Low Supply Current
The LMV796 and LMV797 are high performance op amps that provide a unity gain bandwidth of 17 MHz while
drawing a low supply current of 1.15 mA. This makes them ideal for providing wideband amplification in portable
applications.
Low Input Referred Noise and Low Input Bias Current
The LMV796/LMV797 have a very low input referred voltage noise density (5.8 nV/√Hz at 1 kHz). A CMOS input
stage ensures a small input bias current (100 fA) and low input referred current noise (0.01 pA/√Hz). This is very
helpful in maintaining signal fidelity, and makes the LMV796 and LMV797 ideal for audio and sensor based
applications.
Low Supply Voltage
The LMV796 and the LMV797 have performance specified at 2.5V and 5V supply. The LMV796 family is
specified to be operational at all supply voltages between 2.0V and 5.5V, for ambient temperatures ranging from
−40°C to 125°C, thus utilizing the entire battery lifetime. The LMV796 and LMV797 are also specified to be
operational at 1.8V supply voltage, for temperatures between 0°C and 125°C. This makes the LMV796 family
ideal for usage in low-voltage commercial applications.
RRO and Ground Sensing
Rail-to-rail output swing provides maximum possible dynamic range at the output. This is particularly important
when operating at low supply voltages. An innovative positive feedback scheme is used to boost the current drive
capability of the output stage. This allows the LMV796 and the LMV797 to source more than 40 mA of current at
1.8V supply. This also limits the performance of the LMV796 family as comparators, and hence the usage of the
LMV796 and the LMV797 in an open-loop configuration is not recommended. The input common-mode range
includes the negative supply rail which allows direct sensing at ground in single supply operation.
Small Size
The small footprint of the LMV796 and the LMV797 package saves space on printed circuit boards, and enables
the design of smaller electronic products, such as cellular phones, pagers, or other portable systems. Long
traces between the signal source and the op amp make the signal path susceptible to noise. By using the
physically smaller LMV796 or LMV797 package, the op amp can be placed closer to the signal source, reducing
noise pickup and increasing signal integrity.
CAPACITIVE LOAD TOLERANCE
The LMV796 and LMV797 can directly drive 120 pF in unity-gain without oscillation. The unity-gain follower is the
most sensitive configuration to capacitive loading. Direct capacitive loading reduces the phase margin of
amplifiers. The combination of the amplifier’s output impedance and the capacitive load induces phase lag. This
results in either an underdamped pulse response or oscillation. To drive a heavier capacitive load, the circuit in
Figure 45 can be used.
In Figure 45, the isolation resistor RISO and the load capacitor CLform a pole to increase stability by adding more
phase margin to the overall system. The desired performance depends on the value of RISO. The bigger the RISO
resistor value, the more stable VOUT will be. Increased RISO would, however, result in a reduced output swing and
short circuit current.
Figure 45. Isolation of CLto Improve Stability
Copyright © 2006–2013, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Links: LMV796 LMV797
+¨
©
§
¨
©
§
-1
2CIN
P1,2 = 1
R1
1
R2r1
R1
1
R2
+
2
-4 A0CIN
R2
-R2/R1
1 + s
¨
©
§
¨
©
§
+s2
A0
CIN R2
¨
©
§
¨
©
§
VOUT
VIN (s) =
A0 R1
R1 + R2
CIN
R1
R2
VOUT
+
-
+
-
VIN
+
-
VOUT
VIN
R2
R1
AV = - = -
CF
LMV796, LMV797
SNOSAU9D –MARCH 2006–REVISED MARCH 2013
www.ti.com
INPUT CAPACITANCE AND FEEDBACK CIRCUIT ELEMENTS
The LMV796 family has a very low input bias current (100 fA) and a low 1/f noise corner frequency (400 Hz),
which makes it ideal for sensor applications. However, to obtain this performance a large CMOS input stage is
used, which adds to the input capacitance of the op amp, CIN. Though this does not affect the DC and low
frequency performance, at higher frequencies the input capacitance interacts with the input and the feedback
impedances to create a pole, which results in lower phase margin and gain peaking. This can be controlled by
being selective in the use of feedback resistors, as well as, by using a feedback capacitance, CF. For example, in
the inverting amplifier shown in Figure 46, if CIN and CFare ignored and the open loop gain of the op amp is
considered infinite then the gain of the circuit is −R2/R1. An op amp, however, usually has a dominant pole, which
causes its gain to drop with frequency. Hence, this gain is only valid for DC and low frequency. To understand
the effect of the input capacitance coupled with the non-ideal gain of the op amp, the circuit needs to be
analyzed in the frequency domain using a Laplace transform.
Figure 46. Inverting Amplifier
For simplicity, the op amp is modeled as an ideal integrator with a unity gain frequency of A0. Hence, its transfer
function (or gain) in the frequency domain is A0/s. Solving the circuit equations in the frequency domain, ignoring
CFfor the moment, results in an expression for the gain shown in Equation 1.
(1)
It can be inferred from the denominator of the transfer function that it has two poles, whose expressions can be
obtained by solving for the roots of the denominator and are shown in Equation 2.
(2)
Equation 2 shows that as the values of R1and R2are increased, the magnitude of the poles, and hence the
bandwidth of the amplifier, is reduced. This theory is verified by using different values of R1and R2in the circuit
shown in Figure 45 and by comparing their frequency responses. In Figure 47 the frequency responses for three
different values of R1and R2are shown. When both R1and R2are 1 kΩ, the response is flattest and widest;
whereas, it narrows and peaks significantly when both their values are changed to 10 kΩor 30 kΩ. So it is
advisable to use lower values of R1and R2to obtain a wider and flatter response. Lower resistances also help in
high sensitivity circuits since they add less noise.
14 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LMV796 LMV797
10k 100k 1M 10M
FREQUENCY (Hz)
-40
-30
-20
-10
0
10
20
GAIN (dB)
CF = 0 pF
CF = 5 pF
CF = 2 pF
R1, R2 = 30 k:
AV = -1
10k 100k 1M 10M 100M
FREQUENCY (Hz)
-25
-20
-15
-10
-5
0
5
10
15
GAIN (dB)
R1, R2 = 30 k:
AV = -1
R1, R2 = 10 k:
R1, R2 = 1 k:
LMV796, LMV797
www.ti.com
SNOSAU9D –MARCH 2006–REVISED MARCH 2013
Figure 47. Gain Peaking Caused by Large R1, R2
A way of reducing the gain peaking is by adding a feedback capacitance CFin parallel with R2. This introduces
another pole in the system and prevents the formation of pairs of complex conjugate poles which cause the gain
to peak. Figure 48 shows the effect of CFon the frequency response of the circuit. Adding a capacitance of 2 pF
removes the peak, while a capacitance of 5 pF creates a much lower pole and reduces the bandwidth
excessively.
Figure 48. Gain Peaking Eliminated by CF
AUDIO PREAMPLIFIER WITH BAND PASS FILTERING
With low input referred voltage noise, low supply voltage and current, and a low harmonic distortion, the LMV796
family is ideal for audio applications. Its wide unity gain bandwidth allows it to provide large gain for a wide range
of frequencies and it can be used to design a preamplifier to drive a load of as low as 600Ωwith less than 0.01%
distortion. Two amplifier circuits are shown in Figure 49 and Figure 50.Figure 49 is an inverting amplifier, with a
10 kΩfeedback resistor, R2, and a 1kΩinput resistor, R1, and hence provides a gain of −10. Figure 50 is a non-
inverting amplifier, using the same values of R1and R2, and provides a gain of 11. In either of these circuits, the
coupling capacitor CC1 decides the lower frequency at which the circuit starts providing gain, while the feedback
capacitor CFdecides the frequency at which the gain starts dropping off. Figure 51 shows the frequency
response of the inverting amplifier with different values of CF.
Copyright © 2006–2013, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Links: LMV796 LMV797
25
1100 10k 1M
FREQUENCY (Hz)
-20
-5
10
GAIN (dB)
100k1k
10
20
15
5
0
-10
-15
CF = 10 pF
CF = 100 pF
CF = 1 nF
CC2 RB1
RB2
CF
CC1
V+
AV = 1 + R2
R1
+
-
VIN
+
-
R1
1 k:
R2
10 k:
VOUT
+
-
= 11
CC1
+VOUT
+
-
-
CF
VIN
+
-
RB1
V+
RB2
CC2
R2
R1
AV = - = -10
R2
10 k:
R1
1 k:
LMV796, LMV797
SNOSAU9D –MARCH 2006–REVISED MARCH 2013
www.ti.com
Figure 49. Inverting Audio Preamplifier
Figure 50. Non-inverting Audio Preamplifier
Figure 51. Frequency Response of the Inverting Audio Preamplifier
TRANSIMPEDANCE AMPLIFIER
CMOS input op amps are often used in transimpedance applications as they have an extremely high input
impedance. A transimpedance amplifier converts a small input current into a voltage. This current is usually
generated by a photodiode. The transimpedance gain, measured as the ratio of the output voltage to the input
current, is expected to be large and wide-band. Since the circuit deals with currents in the range of a few nA, low
noise performance is essential. The LMV796/LMV797 are CMOS input op amps providing wide bandwidth and
low noise performance, and are hence ideal for transimpedance applications.
16 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LMV796 LMV797
RFCINA0
CF = 2SRFA0
1 + 1 + 4S
CCM
IIN
RF
VOUT
+
-
+
-
VB
CF
CD
VOUT
IIN - RF
=
CIN = CD + CCM
LMV796, LMV797
www.ti.com
SNOSAU9D –MARCH 2006–REVISED MARCH 2013
Usually, a transimpedance amplifier is designed on the basis of the current source driving the input. A
photodiode is a very common capacitive current source, which requires transimpedance gain for transforming its
miniscule current into easily detectable voltages. The photodiode and the amplifier’s gain are selected with
respect to the speed and accuracy required of the circuit. A faster circuit would require a photodiode with lesser
capacitance and a faster amplifier. A more sensitive circuit would require a sensitive photodiode and a high gain.
A typical transimpedance amplifier is shown in Figure 52. The output voltage of the amplifier is given by the
equation VOUT =−IINRF. Since the output swing of the amplifier is limited, RFshould be selected such that all
possible values of IIN can be detected.
The LMV796/LMV797 have a large gain-bandwidth product (17 MHz), which enables high gains at wide
bandwidths. A rail-to-rail output swing at 5.5V supply allows detection and amplification of a wide range of input
currents. A CMOS input stage with negligible input current noise and low input voltage noise allows the
LMV796/LMV797 to provide high fidelity amplification for wide bandwidths. These properties make the
LMV796/LMV797 ideal for systems requiring wide-band transimpedance amplification.
Figure 52. Photodiode Transimpedance Amplifier
As mentioned earlier, the following parameters are used to design a transimpedance amplifier: the amplifier gain-
bandwidth product, A0; the amplifier input capacitance, CCM; the photodiode capacitance, CD; the
transimpedance gain required, RF; and the amplifier output swing. Once a feasible RFis selected using the
amplifier output swing, these numbers can be used to design an amplifier with the desired transimpedance gain
and a maximally flat frequency response.
An essential component for obtaining a maximally flat response is the feedback capacitor, CF. The capacitance
seen at the input of the amplifier, CIN, combined with the feedback capacitor, RF, generate a phase lag which
causes gain-peaking and can destabilize the circuit. CIN is usually just the sum of CDand CCM. The feedback
capacitor CFcreates a pole, fPin the noise gain of the circuit, which neutralizes the zero in the noise gain, fZ,
created by the combination of RFand CIN. If properly positioned, the noise gain pole created by CFcan ensure
that the slope of the gain remains at 20 dB/decade till the unity gain frequency of the amplifier is reached, thus
ensuring stability. As shown in Figure 53, fPis positioned such that it coincides with the point where the noise
gain intersects the op amp’s open loop gain. In this case, fPis also the overall −3 dB frequency of the
transimpedance amplifier. The value of CFneeded to make it so is given by Equation 3. A larger value of CF
causes excessive reduction of bandwidth, while a smaller value fails to prevent gain peaking and instability.
(3)
Copyright © 2006–2013, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Links: LMV796 LMV797
+
RF
-
CF
IF RA < < RF
CFc = ¨
©
§1 + RB
RA
¨
©
§
RA
CFc
RB
OP AMP
OPEN LOOP
GAIN
NOISE GAIN WITH NO CF
NOISE GAIN WITH CF
fZfPA0
fZ = 1
2SRFCIN
fP = A0
2SRF(CIN+CF)
GAIN
FREQUENCY
LMV796, LMV797
SNOSAU9D –MARCH 2006–REVISED MARCH 2013
www.ti.com
Figure 53. CFSelection for Stability
Calculating CFfrom Equation 3 can sometimes return unreasonably small values (<1 pF), especially for high
speed applications. In these cases, it is often more practical to use the circuit shown in Figure 54 in order to
allow more reasonable values. In this circuit, the capacitance CF′is (1+ RB/RA) times the effective feedback
capacitance, CF. A larger capacitor can now be used in this circuit to obtain a smaller effective capacitance.
For example, if a CFof 0.5 pF is needed, while only a 5 pF capacitor is available, RBand RAcan be selected
such that RB/RA= 9. This would convert a CF′of 5 pF into a CFof 0.5 pF. This relationship holds as long as RA
<< RF.
Figure 54. Obtaining Small CFfrom Large CF′
LMV796 AS A TRANSIMPEDANCE AMPLIFIER
The LMV796 was used in the designs for a number of amplifiers with varying transimpedance gains and source
capacitances. The gains, bandwidths and feedback capacitances of the circuits created are summarized in
Table 1. The frequency responses are presented in Figure 55 and Figure 56. The feedback capacitances are
slightly different from the formula in Equation 3, since the parasitic capacitance of the board and the feedback
resistor RFhad to be accounted for.
Table 1.
Transimpedance, ATI CIN CF−3 dB Frequency
470000 50 pF 1.5 pF 350 kHz
470000 100 pF 2.0 pF 250 kHz
470000 200 pF 3.0 pF 150 kHz
47000 50 pF 4.5 pF 1.5 MHz
47000 100 pF 6.0 pF 1 MHz
47000 200 pF 9.0 pF 700 kHz
18 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LMV796 LMV797
10k 100k 1M 10M
FREQUENCY (Hz)
50
55
60
65
70
75
80
85
90
95
100
GAIN (dB)
CIN = 50 pF, CF = 4.5 pF
CIN = 100 pF, CF = 6 pF
CIN = 200 pF, CF = 9 pF
10k 100k 1M 10M
FREQUENCY (Hz)
50
60
70
80
90
100
110
120
130
GAIN (dB)
CIN = 50 pF, CF = 1.5 pF
CIN = 100 pF, CF = 2 pF
CIN = 200 pF, CF = 3 pF
LMV796, LMV797
www.ti.com
SNOSAU9D –MARCH 2006–REVISED MARCH 2013
Figure 55. Frequency Response for ATI = 470000
Figure 56. Frequency Response for ATI = 47000
HIGH GAIN WIDEBAND TRANSIMPEDANCE AMPLIFIER USING THE LMV797
The LMV797 dual, low noise, wide bandwidth, CMOS input op amp IC can be used for compact, robust and
integrated solutions for sensing and amplifying wide-band signals obtained from sensitive photodiodes. One of
the two op amps available can be used to obtain transimpedance gain while the other can be used for amplifying
the output voltage to further enhance the transimpedance gain. The wide bandwidth of the op amps (17 MHz)
ensures that they are capable of providing high gain for a wide range of frequencies. The low input referred noise
(5.8 nV/√Hz) allows the amplifier to deliver an output with a high SNR (signal to noise ratio). The small 8-pin
VSSOP footprint saves space on printed circuit boards and allows ease of design in portable products.
The circuit shown in Figure 57, has the first op amp acting as a transimpedance amplifier with a gain of 47000,
while the second stage provides a voltage gain of 10. This provides a total transimpedance gain of 470000 with a
−3 dB bandwidth of about 1.5 MHz, for a total input capacitance of 50 pF. The frequency response for the circuit
is shown in Figure 58
Copyright © 2006–2013, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Links: LMV796 LMV797
+
VOUT
+
-
-
RACF
VIN = KI
+
-
IR RADIATION
INTENSITY, I
VOUT RA
K(RA + RB)
I =
IR SENSOR
RB
10k 100k 1M 10M
FREQUENCY (Hz)
60
70
80
90
100
110
120
GAIN (dB)
CIN = 50 pF
CF = 4.5 pF
+
-
+
-
797B
797A
CIN = 50 pF
47 k:
4.5 pF
1 k:
0.1 PF
10 k:
+
-
VOUT
IIN
VOUT
IIN = 470,000
ATI =
LMV796, LMV797
SNOSAU9D –MARCH 2006–REVISED MARCH 2013
www.ti.com
Figure 57. 1.5 MHz Transimpedance Amplifier with ATI = 470000
Figure 58. 1.5 MHz Transimpedance Amplifier Frequency Response
SENSOR INTERFACES
The low input bias current and low input referred noise of the LMV796 and LMV797 make them ideal for sensor
interfaces. These circuits are required to sense voltages of the order of a few μV and currents amounting to less
than a nA hence, the op amp needs to have low voltage noise and low input bias current. Typical applications
include infra-red (IR) thermometry, thermocouple amplifiers and pH electrode buffers. Figure 59 is an example of
a typical circuit used for measuring IR radiation intensity, often used for estimating the temperature of an object
from a distance. The IR sensor generates a voltage proportional to I, which is the intensity of the IR radiation
falling on it. As shown in Figure 59, K is the constant of proportionality relating the voltage across the IR sensor
(VIN) to the radiation intensity, I. The resistances RAand RBare selected to provide a high gain to amplify this
voltage, while CFis added to filter out the high frequency noise.
Figure 59. IR Radiation Sensor
20 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LMV796 LMV797
LMV796, LMV797
www.ti.com
SNOSAU9D –MARCH 2006–REVISED MARCH 2013
REVISION HISTORY
Changes from Revision C (March 2013) to Revision C Page
Copyright © 2006–2013, Texas Instruments Incorporated Submit Documentation Feedback 21
Product Folder Links: LMV796 LMV797
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LMV796MF/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 AT3A
LMV796MFX/NOPB ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 AT3A
LMV796QMF/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 AD7A
LMV796QMFX/NOPB ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 AD7A
LMV797MM/NOPB ACTIVE VSSOP DGK 8 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 AU3A
LMV797MMX/NOPB ACTIVE VSSOP DGK 8 3500 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 AU3A
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 2
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LMV796, LMV796-Q1 :
•Catalog: LMV796
•Automotive: LMV796-Q1
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LMV796MF/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LMV796MFX/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LMV796QMF/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LMV796QMFX/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LMV797MM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
LMV797MMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 20-Dec-2016
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LMV796MF/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0
LMV796MFX/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0
LMV796QMF/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0
LMV796QMFX/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0
LMV797MM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0
LMV797MMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 20-Dec-2016
Pack Materials-Page 2
www.ti.com
PACKAGE OUTLINE
C
0.22
0.08 TYP
0.25
3.0
2.6
2X 0.95
1.9
1.45
0.90
0.15
0.00 TYP
5X 0.5
0.3
0.6
0.3 TYP
8
0 TYP
1.9
A
3.05
2.75
B
1.75
1.45
(1.1)
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/E 09/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
0.2 C A B
1
34
5
2
INDEX AREA
PIN 1
GAGE PLANE
SEATING PLANE
0.1 C
SCALE 4.000
www.ti.com
EXAMPLE BOARD LAYOUT
0.07 MAX
ARROUND 0.07 MIN
ARROUND
5X (1.1)
5X (0.6)
(2.6)
(1.9)
2X (0.95)
(R0.05) TYP
4214839/E 09/2019
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
PKG
1
34
5
2
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
EXPOSED METAL
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
EXPOSED METAL
www.ti.com
EXAMPLE STENCIL DESIGN
(2.6)
(1.9)
2X(0.95)
5X (1.1)
5X (0.6)
(R0.05) TYP
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/E 09/2019
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
SYMM
PKG
1
34
5
2
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