INTEGRATED CIRCUITS PCA8550 4-bit multiplexed/1-bit latched 5-bit I2C EEPROM DIP switch Product data Supersedes data of 2001 Jan 12 Philips Semiconductors 2003 Jun 27 Philips Semiconductors Product data 4-bit multiplexed/1-bit latched 5-bit I2C EEPROM DIP switch PCA8550 FEATURES * 4-bit 2-to-1 multiplexer, 1-bit latch DIP switch * 5-bit internal non-volatile register * Override input forces all outputs to logic 0 * Internal non-volatile register write/readable via I2C-bus * Write-protect pin enables/disables I2C writes to register * 2.5 V multiplexed outputs * 3.3 V non-multiplexed output (latched) * 5 V tolerant inputs * Useful for `jumperless' configuration of PC motherboards * Designed for use in Pentium Pro/Pentium II systems PIN CONFIGURATION I2C SCL 1 16 VCC I2C SDA 2 15 WP OVERRIDE_N 3 14 NON_MUXED_OUT DESCRIPTION MUX_IN A 4 13 MUX_SELECT The primary function of the 4-bit 2-to-1 I2C multiplexer is to select either a 4-bit input or data from a non-volatile register and drive this value onto the output pins. One additional non-multiplexed register output is also provided. The non-multiplexed output is latched to prevent output value changes during I2C writes to the non-volatile register. A write protect input is provided to enable/disable the ability to write to the non-volatile register. An "override" input feature forces all outputs to logic 0. MUX_IN B 5 12 MUX_OUT A MUX_IN C 6 11 MUX_OUT B MUX_IN D 7 10 MUX_OUT C GND 8 9 MUX_OUT D SW00579 Figure 1. Pin configuration ORDERING INFORMATION PACKAGES TEMPERATURE RANGE ORDER CODE TOPSIDE MARK DRAWING NUMBER 16-Pin Plastic SO 0 to +70 C PCA8550D PCA8550 SOT109-1 16-Pin Plastic SSOP 0 to +70 C PCA8550DB PA8550 SOT338-1 16-Pin Plastic TSSOP 0 to +70 C PCA8550PW PCA8550 SOT403-1 Standard packing quantities and other packaging data is available at www.philipslogic.com/packaging. FUNCTIONAL DESCRIPTION When the MUX_SELECT signal is logic 0, the multiplexer will select the data from the non-volatile register to drive on the MUX_OUT pins. When the MUX_SELECT signal is logic 1, the multiplexer will select the MUX_IN lines to drive on the MUX_OUT pins. The MUX_SELECT signal is also used to latch the NON_MUXED_OUT signal which outputs data from the non-volatile register. The NON_MUXED_OUT signal latch is transparent when MUX_SELECT is in a logic 0 state, and will latch data when MUX_SELECT is in a logic 1 state. When the active-LOW OVERRIDE_N signal is set to logic 0 and the MUX_SELECT signal is at a logic 0, all outputs will be driven to logic 0. This information is summarized in Table 1. The write protect (WP) input is used to control the ability to write the contents of the 5-bit non-volatile register. If the WP signal is logic 0, the I2C-bus will be able to write the contents of the non-volatile register. If the WP signal is logic 1, data will not be allowed to be written into the non-volatile register. The factory default for the contents of the non-volatile register are all logic 0. These stored values can be read or written using the I2C bus (described in the next section). The OVERRIDE_N, WP, MUX_IN, and MUX_SELECT signals have internal pull-up resistors. See the DC and AC Characteristics for hysteresis and signal spike suppression figures. Pentium II is a registered trademark of Intel Corporation. 2003 Jun 27 2 Philips Semiconductors Product data 4-bit multiplexed/1-bit latched 5-bit I2C EEPROM DIP switch PCA8550 I2C INTERFACE PIN DESCRIPTION PIN NUMBER SYMBOL 1 I2C SCL I2C-bus clock 2 I2C SDA Bi-directional I2C-bus data 3 OVERRIDE_N Forces all outputs to logic 0 4 MUX_IN A 5 MUX_IN B Communicating with this device is initiated by sending a valid address on the I2C-bus. The address format (see FIgure 2) is a fixed unique 7-bit value followed by a 1-bit read/write value which determines the direction of the data transfer. FUNCTION MSB 6 MUX_IN C 7 MUX_IN D 8 GND 9 MUX_OUT D 10 MUX_OUT C 1 0 0 1 1 1 0 R/W External inputs to multiplexer Common ground voltage rail Figure 2. I2C Address Byte Following the address and acknowledge bit are 8 data bits which, depending on the read/write bit in the address, will read data from or write data to the non-volatile register. Data will be written to the register if the read/write bit is logic 0 and the WP input is logic 0. Data will be read from the register if the bit is logic 1. The three high-order bits (see FIgure 3) are logic 0. The next bit is data which is non-multiplexed. The low four bits are the data which will be multiplexed. A write with any of the first three bits non-zero will be aborted. 2.5 V multiplexed output 11 MUX_OUT B 12 MUX_OUT A 13 MUX_SELECT 14 NON_MUXED_OUT Selects MUX_IN inputs or register contents for MUX_OUT outputs TTL-level output from non-volatile memory 15 WP Non-volatile register write-protect 16 VCC Positive voltage rail NOTE: 1. To ensure data integrity, the non-volatile register must be internally write protected when VCC to the I2C-bus is powered down or VCC to the component is dropped below normal operating levels. MSB FUNCTION TABLE Table 1. Function table 0 OVERRIDE _N MUX_SELECT MUX_OUT OUTPUTS NON_MUXED_OUT OUTPUT 0 0 All 0's All 0's 0 1 MUX_IN inputs Latched NON_MUXED_OUT1 1 0 From nonvolatile register From non-volatile register 1 1 MUX_IN inputs From non-volatile register LSB 0 0 NONMUX MUX MUX MUXED DATA D DATA C DATA B DATA MUX DATA A Figure 3. I2C Data Byte POWER-ON RESET (POR) When power is applied to VCC, an internal power-on reset holds the PCA8550 in a reset state until VCC has reached VPOR. At that point, the reset condition is released and the PCA8550 volatile registers and I2C state machine will initialize to their default states. NOTE 1. Latched NON_MIXED_OUT state will be the value present on the NON_MUXED_OUT output at the time of the MUX_SELECT input transitioned from a logic 0 to a logic 1 state. 2003 Jun 27 LSB The MUX_OUT and NON_MUXED_OUT pin values depend on: - the OVERRIDE_N and MUX_SELECT logic levels - the previously stored values in the EEPROM register/current MUX_IN pin values as shown in Table 1. 3 Philips Semiconductors Product data 4-bit multiplexed/1-bit latched 5-bit I2C EEPROM DIP switch PCA8550 BLOCK DIAGRAM 10-30 k 13 CRESET MUX_SELECT 3 OVERRIDE_N 5-BIT EEPROM 100-150 k LATCH 1 SCL 2 SDA CHIP SET 2 I C INTERFACE LOGIC INPUT FILTER 3.3 V POWER-ON RESET 10-30k 8 GND 15 4 5 6 7 WRITE 14 NON_MUX_OUT 0 2.5 V A20M 12 MUX_OUT A /FSBM0 4-BIT 2-to-1 MULTIPLEXER 16 VCC SELECT NMO 3.3 V 2.5 V IGNNE 11 MUX_OUT B /FSBM1 3.3 V 2.5 V LINT0/INTR PENTIUM PRO/ PENTIUM II 10 PROCESSORS MUX_OUT C /FSBM2 OE 3.3 V PROTECT 2.5 V LINT1/NMI 9 MUX_OUT D /FSBM3 A20M MUX_IN A IGNNE MUX_IN B LINT0/INTR MUX_IN C LINT1/NMI MUX_IN D 1 10-30 k SW00347 Figure 4. Block diagram 2003 Jun 27 4 Philips Semiconductors Product data 4-bit multiplexed/1-bit latched 5-bit I2C EEPROM DIP switch PCA8550 ABSOLUTE MAXIMUM RATINGS1, 2 In accordance with the Absolute Maximum Rating System (IEC 134) Voltages are referenced to GND (ground = 0 V) SYMBOL VCC VI VOUT Tstg PARAMETER CONDITIONS DC supply voltage RATING UNIT -0.5 to +4.6 V DC input voltage Note 3 -1.5 to VCC +1.5 V DC output voltage Note 3 -0.5 to VCC +0.5 V -60 to +150 C Storage temperature range NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150 C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL VCC PARAMETER CONDITIONS DC supply voltage UNIT MIN MAX 3.0 3.6 V VPOR Power-on reset voltage No load; VI = VDD or GND -- 2.6 V VIL LOW-level input voltage SCL, SDA IOL= 3 mA -0.5 0.9 V VIH HIGH-level input voltage SCL, SDA IOL= 3 mA 2.7 4.0 V VOL LOW-level output voltage SCL, SDA IOL= 3 mA -- 0.4 V VIL LOW-level input voltage OVERRIDE_N, MUX_IN, MUX_SELECT -0.5 0.8 V VIH HIGH-level input voltage OVERRIDE_N, MUX_IN, MUX_SELECT 2.0 4.0 V IOL LOW-level output current MUX_OUT NON_MUXED_OUT -- 2.0 mA IOH HIGH-level output current MUX_OUT NON_MUXED_OUT -- -2.0 mA dt/dv Input transition rise or fall time 0 10 ns/V Tamb Operating ambient temperature 0 70 C 2003 Jun 27 5 Philips Semiconductors Product data 4-bit multiplexed/1-bit latched 5-bit I2C EEPROM DIP switch PCA8550 DC CHARACTERISTICS Temp = 0 to +70 C 3.0 V < VCC 3.6 V LIMITS SYMBOL PARAMETER CONDITIONS UNIT MIN MAX 0 0.6 V SCL, SDA VOL LOW-level output voltage IOL LOW-level output current VOL = 0.4 V 3.0 mA IOL LOW-level output current VOL = 0.6 V 6.0 mA IIL1 LOW-level input current VIL = 0.4 V -7 -32 A IIH HIGH-level input current VIH = 2.4 V -1.5 -12 A Vhys Hysteresis voltage 0.19 V OVERRIDE_N, WP, MUX_SELECT IIL LOW-level input current -86 -267 A IIH HIGH-level input current -20 -100 A MUX_IN A D IIL LOW-level input current VIL = 0.4 V -0.72 -2.0 mA IIH HIGH-level input current VIH = 2.4 V -0.72 -2.0 mA IOL = 100 A -0.3 0.4 IOL = 2.0 mA -0.3 0.7 IOH = -100 A 2.0 2.625 IOH = -1.0 mA 1.7 2.625 IOL = 100 A -0.5 0.4 IOL = 2.0 mA -0.5 0.7 IOH = -100 A 2.4 3.6 IOH = -2.0 mA 2.0 3.6 MUX_OUT VOL LOW-level output voltage VOH HIGH-level output voltage V V NON_MUXED_OUT VOL LOW-level output voltage V VOH HIGH-level output voltage ICC Quiescent supply current VCC = 3.3 V; VI = 0 V to VCC 10 mA ICC Quiescent supply current VI = VCC 500 A CI Input capacitance 10 pF V ESD protection 2.0 KV Input diode clamp voltage -1.5 V NOTES: 1. VHYS is the hysteresis of Schmitt-Trigger inputs 2. Human body model NON-VOLATILE STORAGE SPECIFICATIONS Parameter Specification Memory cell data retention 10 years min Number of memory cell write cycles 100,000 cycles min Application Note AN250 I 2C DIP Switch provides additional information on memory cell data retention and the minimum number of write cycles. 2003 Jun 27 6 Philips Semiconductors Product data 4-bit multiplexed/1-bit latched 5-bit I2C EEPROM DIP switch PCA8550 AC CHARACTERISTICS LIMITS SYMBOL PARAMETER tMPD Mux input to output propagation delay tSOV MUX_SELECT to output valid tOVN OVERRIDE_N to NON_MUX output delay tOVM OVERRIDE_N to mux output delay MIN MAX UNIT 20.0 ns 22 ns 15.0 ns 25.0 ns tR Output rise time 1.0 3.0 ns/V tF Output fall time 1.0 3.0 ns/V CL Test load capacitance on Muxed/Non-Muxed outputs 15 pF 400 KHz I2C-bus fSCL I2C clock frequency 10 tSCH I2C clock HIGH time 600 clock LOW time 1.3 ns tSCL I2C tDSP I2C data spike time 0 tSDS I2C data set-up time 100 ns tSDH I2C data hold time 0 ns tICR I2C input rise time (10-400 pF bus) 20 300 ns tICF I2C input fall time (10-400 pF bus) 20 300 ns tBUF I2C-bus 1.3 ns tSTS I2C repeated start condition set-up 600 ns tSTH I2C repeated start condition hold 600 ns tSPS I2C 600 ns CB TW free time between start and stop stop condition set-up I2C-bus ns 50 capacitive load Write cycle 400 time1 TYPICAL = 15 NOTE: 1. WRITE CYCLE time can only be measured indirectly during write cycle. The device will not acknowledge its I2C address. 2003 Jun 27 7 ns pF ms Philips Semiconductors Product data 4-bit multiplexed/1-bit latched 5-bit I2C EEPROM DIP switch PCA8550 SO16: plastic small outline package; 16 leads; body width 3.9 mm 2003 Jun 27 8 SOT109-1 Philips Semiconductors Product data 4-bit multiplexed/1-bit latched 5-bit I2C EEPROM DIP switch PCA8550 SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm 2003 Jun 27 9 SOT338-1 Philips Semiconductors Product data 4-bit multiplexed/1-bit latched 5-bit I2C EEPROM DIP switch PCA8550 TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm 2003 Jun 27 10 SOT403-1 Philips Semiconductors Product data 4-bit multiplexed/1-bit latched 5-bit I2C EEPROM DIP switch REVISION HISTORY Rev Date _6 20030627 PCA8550 Description Product data (9397 750 11678); ECN 853-2015 29936 dated 19 May 2003. Supersedes data of 2001 Jan 12 (9397 750 07926). Modifications: * Update marketing information. * Increase number of write cycles from 3K to 100K. _5 2003 Jun 27 20010112 Product data (9397 750 07926); ECN 853-2015 25405 of 12 Jan 2001. 11 Philips Semiconductors Product data 4-bit multiplexed/1-bit latched 5-bit I2C EEPROM DIP switch PCA8550 Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specifications defined by Philips. This specification can be ordered using the code 9398 393 40011. Data sheet status Level Data sheet status[1] Product status[2] [3] Definitions I Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. Definitions Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products--including circuits, standard cells, and/or software--described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Koninklijke Philips Electronics N.V. 2003 All rights reserved. Printed in U.S.A. Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 Date of release: 06-03 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. Document order number: Philips Semiconductors 2003 Jun 27 12 9397 750 11678