75 South Street, Hopkinton, MA 01748 • 800-982-5737 • 508-497-6377 • FAX 508-435-5289 • www.valpeyfisher.com • RevE1108
1
VFXO321
XO Ultra Low Jitter 2.5V, 3.3V
5x7mm SMD, LVPECL / LVDS / LVCMOS
* NOTE: Certain frequency above 500MHz (3.3VDD) and above 300MHz (2.5VDD) isn’t available.
Consult factory for availability.
Parameter Symbol Condition Min Typ Max Unit Note
Frequency
Range F 60
16 800
320 MHz PECL / LVDS
CMOS
Frequency
Stability ∆F/F
Vs. Operating
Temperature
± 50
± 25
± 20
ppm
Order Code B
Order Code C
Order Code D
Vs. Supply Voltage
Vs. Aging / Year
±
3
± 3
±1
ppm/V
ppm
ppm
First Year
After first year
Operating
Temperature T 0°
-40° +70°
+85° °C Order Code B
Order Code G
Output
LVPECL
LVDS
LVCMOS
Order Code L
Order Code D
Order Code C
Supply
Voltage Vcc 3.15
2.25
3.3
2.5
3.45
2.75 V Order Code E
Order Code G
Period Jitter
RMS
155.52 MHz
311.04 MHz
622.08 MHz
2.5
2.5
4
3
3
6
ps
Integrated
Jitter RMS
12KHz to 20MHz
155.52MHz
311.04MHz
622.08MHz
0.25
0.18
0.09
ps
Period Jitter
Peak-to-Peak
155.52MHz
311.04MHz
622.08MHz
18
18
25
20
20
30
ps
Features
¾ 16MHz to 800MHz Frequency Range
¾ Differential Output Levels (LVPECL/LVDS)
¾ Single Ended LVCMOS output available
¾ <0.2ps jitter RMS over 12KHz ~ 20MHz
¾ Selectable OE Logic
Applications
¾ Optical Networking, SONET / SDH
¾ 10 Gigabit Ethernet
¾ Broadband Access
Electrical Specifications
RoHS Status
75 South Street, Hopkinton, MA 01748 • 800-982-5737 • 508-497-6377 • FAX 508-435-5289 • www.valpeyfisher.com • RevE1108
2
VFXO321
XO Ultra Low Jitter 2.5V, 3.3V
5x7mm SMD, LVPECL / LVDS / LVCMOS
Phase Noise Performance
Parameter Symbol Condition Min Typ Max Unit Note
Supply
Current Icc
38 – 100MHz
100 – 300MHz
300 – 640MHz
65
80
90
mA PECL
38 – 100MHz
100 – 320MHz
320 – 640MHz
45
60
70
mA LVDS
At 100MHz,
load = 15pF 16 20 mA CMOS
Load 50 Ohm to VDD-2V (PECL)
100 Ohm (LVDS)
Output High
Voltage VOH
RL = 50 ohm to
(VDD-2V)
IOH = -8.5mA
2.4
VDD-1.025
1.4
1.6
V
PECL
LVDS
CMOS
Output Low
Voltage VOL
IOL = -8.5mA
0.9
1.1
VDD-1.620
0.4
V
PECL
LVDS
CMOS
Output
Differential
Voltage VOD 247 355 454 mV LVDS
Output Drive
Voltage IOSD VOL = 0.4V,
VOH = 2.4V 8.5 mA CMOS
Offset Voltage VOS 1.125 1.2 1.375 V LVDS
Rise / Fall
Time Tr/Tf 20% to 80%
0.25
0.3
1.2
0.45
0.7
1.6
ns
PECL
LVDS
CMOS
Duty Cycle
VDD – 1.3V
@ 1.25V
50% VDD
45 50 55 %
PECL
LVDS
CMOS
Tristate “1”: Output Enable – Pin 1 may float 2.8V min (3.3V VDD) or 2.25V min (2.5V VDD)
“0”: Tristate – Pin 1 requires 0.4V max (3.3V or 2.5V VDD)
Parameter Output
Type Frequency Range
(MHz)
Carrier
Freq.
(MHz) 10Hz 100Hz 1KHz 10
KHz 100
KHz 1
MHz 10
MHz
Phase
Noise
(dBc/Hz)
PECL
LVDS 300 - 800 622.08 -55 -85 -110 -130 -137 -148 -150
CMOS 120 – 320 155.52 -50 -82 -110 -128 -142 -148 -150
PECL
LVDS 120 – 320 155.52 -50 -82 -110 -128 -142 -148 -150
CMOS 16 – 160 155.52 -65 -95 -122 -138 -142 -148 -149
PECL
LVDS 60 – 160 155.52 -65 -95 -122 -138 -142 -148 -149
Electrical Specifications
75 South Street, Hopkinton, MA 01748 • 800-982-5737 • 508-497-6377 • FAX 508-435-5289 • www.valpeyfisher.com • RevE1108
3
VFXO321
XO Ultra Low Jitter 2.5V, 3.3V
5x7mm SMD, LVPECL / LVDS / LVCMOS
Absolute Maximum Ratings
Parameter Symbol Condition Min Typ Max Unit Note
Lead
Temperature Soldering, 10s max 260 °C
Storage
Temperature Ts -55
+125° °C
Junction
Temperature Tj +125° °C
ESD
Protection Input static discharge
voltage protection 2 kV
Supply
Voltage VDD 4.6 V
Output
Voltage Vo VDD-0.5 VDD+0.5 V
Stability
Code Specification
B 50 ppm
C 25 ppm
D 20 ppm
How to Order
—
VFXO321 — FREQUENCY, MHz
Temperature Range
Code Specification
B 0°C to 70°C
G -40°C to 85°C
Output
Code Output
L LVPECL
D LVDS
C CMOS
Supply Voltage
Code Output
E 3.3V
G 2.5V
Note: DG combination not available at all frequencies. Consult factory.
75 South Street, Hopkinton, MA 01748 • 800-982-5737 • 508-497-6377 • FAX 508-435-5289 • www.valpeyfisher.com • RevE1108
4
VFXO321
XO Ultra Low Jitter 2.5V, 3.3V
5x7mm SMD, LVPECL / LVDS / LVCMOS
Parameter Specification
Shock 1000 Gs, 0.35ms, ½ sine wave, 3 shocks in each plane
Humidity Resistant to 85 ºR.H. at 85 ºC
Vibration 10-2000 Hz of 0.06” d.a. or 20 Gs, whichever is less
Leak MIL STD 883, Method 1014, Condition A1
Case Ceramic with hermetic reistance-welded metal lid
Pads Solderable gold over nickel
Marking Epoxy ink or laser engraved
Resistance to Solvents MIL STD 202, Method 215
Environmental and Mechanical Conditions
LVCMOS
Pin # Connection
1 Tristate
2 N/C
3 Case, GND
4 Output
5* N/C
6 Supply Voltage
*For LVCMOS, Dual single ended
outputs available – consult factory
LVPECL, LVDS
Pin # Connection
1 Tristate
2 N/C
3 Case, GND
4 Output
5 Output
6 Supply Voltage
