LMH6553 www.ti.com SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 LMH6553 900 MHz Fully Differential Amplifier With Output Limiting Clamp Check for Samples: LMH6553 FEATURES DESCRIPTION 1 * 23 * * * * * * * * The LMH6553 is a 900 MHz differential amplifier with an integrated adjustable output limiting clamp. The clamp increases system performance and provides transient over-voltage protection to following stages. The internal clamp feature of the LMH6553 reduces or eliminates the need for external discrete overload protection networks. When used to drive ADCs, the amplifier's output clamp allows low voltage ADC inputs to be protected from being overdriven and damaged by large input signals appearing at the system input. Fast overdrive recovery of 600 ps ensures the amplifier output rapidly recovers from a clamping event and quickly resumes to follow the input signal. The LMH6553 delivers exceptional bandwidth, distortion, and noise performance ideal for driving ADCs up to 14-bits. The LMH6553 could also be used for automotive, communication, medical, test and measurement, video, and LIDAR applications. 900 MHz -3 dB Small Signal Bandwidth @ AV = 1 670 MHz -3 dB Large Signal Bandwidth @ AV = 1 -79 dB THD @ 20 MHz -92 dB IMD3 @ fc = 20 MHz 10 ns Settling Time to 0.1% 600 ps Clamp Overdrive Recovery Time 40 mV Clamp Accuracy with 100% Overdrive -0.1 mV/C Clamp Temperature Drift 4.5 to 12 Supply Voltage Operation APPLICATIONS * * * * * * * * * Differential ADC Driver Video Over Twisted Pair Differential Line Driver Single End to Differential Converter High Speed Differential Signaling IF/RF Amplifier SAW Filter Buffer/Driver CCD Output Limiting Amplifier Automotive Safety Applications With external gain set resistors and integrated common mode feedback, the LMH6553 can be configured as either a differential input to differential output or single ended input to differential output gain block. The LMH6553 can be AC or DC coupled at the input which makes it suitable for a wide range of applications including communication systems and high speed oscilloscope front ends. The LMH6553 is available in 8-pin SO PowerPAD and 8-pin WSON packages, and is part of our LMHTM high speed amplifier family. Typical Application 275: V 255: 59: 255: 49.9: ADC + 50: Single-Ended AC-Coupled Source VCM RO VIN+ + LMH6553 + - VIN- - V 59: 0.1PF C 8 to14 Bit 275: RO + - VCM VCLAMP Figure 1. Single-Ended Input Differential Output ADC Driver 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. LMH is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2008-2013, Texas Instruments Incorporated LMH6553 SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings ESD Tolerance (1) (2) (3) Human Body Model 4000V Machine Model 350V Supply Voltage 13.2V Common Mode Input Voltage VS Maximum Input Current (pins 1, 2, 7, 8) 30 mA (4) Maximum Output Current (pins 4, 5) Maximum Junction Temperature 150C For soldering specifications see product folder at http://www.ti.com and http://www.ti.com/lit/SNOA549 (1) (2) (3) (4) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications, see the Electrical Characteristics tables. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. Human Body Model, applicable std. MIL-STD-883, Method 30157. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC). Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC). The maximum output current (IOUT) is determined by device power dissipation limitations. See POWER DISSIPATION of Application Information for more details. Operating Ratings (1) Operating Temperature Range (2) -40C to +125C -65C to +150C Storage Temperature Range Total Supply Voltage 4.5V to 12V Package Thermal Resistance (JA) 8-Pin SO PowerPAD 59C/W 8-Pin WSON 58C/W (1) (2) 2 Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications, see the Electrical Characteristics tables. The maximum power dissipation is a function of TJ(MAX), JA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX)- TA) / JA. All numbers apply for packages soldered directly onto a PC Board. Submit Documentation Feedback Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 LMH6553 www.ti.com SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 VS = 5V Electrical Characteristics (1) Unless otherwise specified, all limits are ensured for TA = 25C, VS = 5V, AV = 1, VCM = 0V, VCLAMP = 3V, RF = RG = 275, RL = 200, for single-ended in, differential out. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (2) Typ (3) Max (2) Units AC Performance (Differential) SSBW LSBW Small Signal -3 dB Bandwidth (2) Large Signal -3 dB Bandwidth VOUT = 0.2 VPP, AV = 1, RL = 1 k 900 VOUT = 0.2 VPP, AV = 1 720 VOUT = 0.2 VPP, AV = 2 680 VOUT = 0.2 VPP, AV = 4 630 VOUT = 0.2 VPP, AV = 8, (RF = 400, RG = 50) 350 VOUT = 2 VPP, AV = 1, RL = 1 k 670 VOUT = 2 VPP, AV = 1 540 VOUT = 2 VPP, AV = 2 530 VOUT = 2 VPP, AV = 4 490 VOUT = 2 VPP, AV = 8, (RF = 400, RG = 50) 350 MHz MHz 0.1 dB Bandwidth VOUT = 0.2 VPP, AV = 1 50 MHz 0.5 dB Bandwidth VOUT = 0.2 VPP, AV = 1 525 MHz Slew Rate 4V Step, AV = 1 2300 V/s Rise/Fall Time, 10%-90% 2V Step 690 ps 0.1% Settling Time 2V Step 10 ns 1.0% Settling Time 2V Step 6 ns Distortion and Noise Response HD2 HD3 IMD3 2nd Harmonic Distortion VOUT = 2 VPP, f = 20 MHz, RL = 800 -79 VOUT = 2 VPP, f = 70 MHz, RL = 800 -78 VOUT = 2 VPP, f = 20 MHz, RL = 800 -90 VOUT = 2 VPP, f = 70 MHz, RL = 800 -71 fc = 20 MHz, , VOUT = 2 VPP Composite, RL = 200 -92 fc = 150 MHz, , VOUT = 2 VPP Composite, RL = 200 -76 Input Noise Voltage f = 100 kHz 1.2 nV/Hz Input Noise Current f = 100 kHz 13.6 pA/Hz Noise Figure (See Figure 58) 50 System, AV = 9, 10 MHz 10.3 dB 3rd Harmonic Distortion 3rd-Order Two-Tone Intermodulation dBc dBc dBc Input Characteristics IBI Input Bias Current (4) (3) IBoffset Input Bias Current Differential CMRR Common Mode Rejection Ratio RIN (3) VCM = 0V, VID = 0V, IBoffset = (IB - IB )/2 - + -95 50 95 -18 2.5 18 A A DC, VCM = 0V, VID = 0V 82 dBc Input Resistance Differential 15 CIN Input Capacitance Differential 0.5 pF CMVR Input Common Mode Voltage Range CMRR > 38 dB 3.6 V (1) (2) (3) (4) 3.3 Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. See Application Information for information on temperature de-rating of this device." Min/Max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Limits are 100% production tested at 25C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control (SQC) methods. Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production material. Exceeding limits could result in excessive device current. Submit Documentation Feedback Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 3 LMH6553 SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 www.ti.com VS = 5V Electrical Characteristics (1) (continued) Unless otherwise specified, all limits are ensured for TA = 25C, VS = 5V, AV = 1, VCM = 0V, VCLAMP = 3V, RF = RG = 275, RL = 200, for single-ended in, differential out. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (2) Typ (3) Max (2) Units Output Performance (5) Output Voltage Level IOUT Linear Output Current ISC Short Circuit Current (5) Single-Ended Output -3.7 3.78 VOUT = 0V 100 120 mA 150 mA One Output Shorted to Ground VIN = 2V Single-Ended (6) +3.7 V Clamp Performance VCLAMP VCLAMP Voltage Range VCLAMP Peak Voltage Continuous Operation (7) VCM VCM + 2.0 (8) VCM + 3.0 Default VCLAMP Voltage VCLAMP Floating 0.92 1.0 1.08 Upper Clamp Level Accuracy VCLAMP = 2V, VCM = 1.5V, VO = 2V, 100% Overdrive -53 -40 +53 Lower Clamp Level Accuracy VCLAMP = 2V, VCM = 1.5V, VO = 1V, 100% Overdrive -30 -8 +30 VIN = 0V, VCLAMP(MIN) = -3.1 V -200 -175 -0.1 Clamp Accuracy Temperature Drift Clamp Pin Bias Current VIN = 0V, VCLAMP(MAX) = +4.5V 150 Clamp Pin Bias Drift Linear to Clamped Operation Clamp Pin Input Impedance V mV mV/C 175 0.3 Diff Amp Input Bias Shift V A A/C 60 A 30 1 K/pF Clamp Pin Feedthrough f = 10 MHz -60 dB Clamp Bandwidth 0.5VDC + 40 mVPP, SE VIN = 2V 140 MHz Clamp Slew Rate 100% Overdrive 64 V/s Clamp Overshoot VIN = 2V Step, AV = 2 V/V, VCLAMP = 0.5V, VCM = 0V, 100% Overdrive 125 mV Clamp Overshoot VIN = 2V Step, AV = 2 V/V, VCLAMP = 2V, VCM = 1.5V, 100% Overdrive 250 mV Clamp Overshoot Width (9) 650 ps VIN = 2V Step, AV = 2 V/V, VCLAMP = 0.5V, VCM = 0V, 50% Output Crossing 600 ps f = 75 MHz, VOD = 2 VPP, RL = 800, SFDR Down 3 dB 22 mV Common Mode Small Signal Bandwidth VIN+ = VIN- = 0 220 MHz Slew Rate VIN+ = VIN- = 0 Output Common Mode Error Common Mode, VIN = Float, VCM = 0 Clamp Overdrive Recovery Time Linearity Guardband (10) Output Common Mode Control Circuit VOSCM 340 -25 1 V/s 25 mV (5) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production material. (6) Short circuit current should be limited in duration to no more than 10 seconds. See POWER DISSIPATION in Application Information for more details. (7) Exceeding limits could result in excessive device current. (8) This parameter is ensured by design and/or characterization and is not tested in production. The condition of VCLAMP = 3V is not intended for continuous operation; continuous operation with VCLAMP = 3V may incur permanent damage to the device. (9) Clamp Overshoot Width is the duration of overshoot in a 100% overdrive condition. (10) Linearity Guardband is defined for an output sinusoid (f = 75 MHz, VOD = 2 VPP). It is the difference between the VCLAMP level and the peak output voltage where the SFDR is decreased by 3 dB. 4 Submit Documentation Feedback Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 LMH6553 www.ti.com SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 VS = 5V Electrical Characteristics (1) (continued) Unless otherwise specified, all limits are ensured for TA = 25C, VS = 5V, AV = 1, VCM = 0V, VCLAMP = 3V, RF = RG = 275, RL = 200, for single-ended in, differential out. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Input Bias Current VCM(TYPICAL) = 0, (11) VCM(MIN) = -3.2 V, (11) VCM(MAX) = +3.2V, (11) Voltage Range Min (2) (3) -8 -3.5 -9 -4.5 -2.5 3.14 CMRR Typ Measure VOD, VID = 0V Input Resistance Max (2) A 2 3.18 V 80 dB 200 VO,CM/VCM Gain 0.995 Units 1 1.00 k 1.008 V/V Miscellaneous Performance ZT Open Loop Transimpedance Differential 112 PSRR Power Supply Rejection Ratio DC, VS = 1V 87 IS Supply Current RL = 25 dB dB 29.1 33 37 mA (11) Negative current implies current flowing out of the device. VS = 2.5V Electrical Characteristics (1) Unless otherwise specified, all limits are ensured for TA = 25C, VS = 2.5V, AV = 1, VCM = 0V, VCLAMP = 2V, RF = RG = 275, RL = 200, for single-ended in, differential out. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (2) Typ (3) Max (2) Units AC Performance (Differential) SSBW LSBW Small Signal -3 dB Bandwidth Large Signal -3 dB Bandwidth (2) VOUT = 0.2 VPP, AV = 1, RL = 1 k 875 VOUT = 0.2 VPP, AV = 1 630 VOUT = 0.2 VPP, AV = 2 580 VOUT = 0.2 VPP, AV = 4 540 VOUT = 0.2 VPP, AV = 8 , (RF = 400, RG = 50) 315 VOUT = 2 VPP, AV = 1, RL = 1 k 640 VOUT = 2 VPP, AV = 1 485 VOUT = 2 VPP, AV = 2 435 VOUT = 2 VPP, AV = 4 420 VOUT = 2 VPP, AV = 8, (RF = 400, RG = 50) 405 MHz MHz 0.1 dB Bandwidth VOUT = 0.2 VPP, AV = 1 60 MHz 0.5 dB Bandwidth VOUT = 0.2 VPP, AV = 1 236 MHz Slew Rate 2V Step, AV = 1 1350 V/s Rise/Fall Time, 10%-90% 2V Step 860 ps 0.1% Settling Time 2V Step 10 ns 1.0% Settling Time 2V Step 6 ns Distortion and Noise Response HD2 (1) (2) (3) 2nd Harmonic Distortion VOUT = 2 VPP, f = 20 MHz, RL = 800 -80 VOUT = 2 VPP, f = 70 MHz, RL = 800 -72 dBc Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. See Application Information for information on temperature de-rating of this device." Min/Max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Limits are 100% production tested at 25C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control (SQC) methods. Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production material. Submit Documentation Feedback Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 5 LMH6553 SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 www.ti.com VS = 2.5V Electrical Characteristics (1) (continued) Unless otherwise specified, all limits are ensured for TA = 25C, VS = 2.5V, AV = 1, VCM = 0V, VCLAMP = 2V, RF = RG = 275, RL = 200, for single-ended in, differential out. Boldface limits apply at the temperature extremes. Symbol HD3 IMD3 Parameter Conditions rd 3 Harmonic Distortion 3rd-Order Two-Tone Intermodulation Min (2) Typ (3) VOUT = 2 VPP, f = 20 MHz, RL = 800 -78 VOUT = 2 VPP, f = 70 MHz, RL = 800 -66 fc = 20 MHz, VOUT = 2 VPP Composite, RL = 200 -87 fc = 150 MHz, VOUT = 2 VPP Composite, RL = 200 -68 Max (2) Units dBc dBc Input Noise Voltage f = 100 kHz 1.1 nV/Hz Input Noise Current f = 100 kHz 13.6 pA/Hz Noise Figure (See Figure 58) 50 System, AV = 9, 10 MHz 10.3 dB Input Characteristics (4) (5) IBI Input Bias Current IBoffset Input Bias Current Differential (3) (3) (5) -90 45 90 A VCM = 0V, VID = 0V, IBoffset = (IB- - IB+)/2 -24 2 24 A CMRR Common Mode Rejection Ratio DC, VCM = 0V, VID = 0V 80 RIN Input Resistance Differential 15 dBc CIN Input Capacitance Differential 0.5 pF CMVR Input Common Mode Voltage Range CMRR > 38 dB 1.0 1.2 V Output Performance Output Voltage Swing (3) Differential Output 5.32 5.47 VPP IOUT Linear Output Current (3) VOUT = 0V 75 95 mA ISC Short Circuit Current 140 mA One Output Shorted to Ground VIN = 2V Single-Ended (6) Clamp Performance VCLAMP VCLAMP Voltage Range VCLAMP Peak Voltage Continuous Operation (7) VCLAMP Floating 0.42 0.48 0.54 Upper Clamp Level Accuracy VIN = 0V, VCLAMP = +0.5V, VCM = 0, VO = +0.5V, 100% Overdrive -39 -30 +39 Lower Clamp Level Accuracy VIN = 0V, VCLAMP = +0.5V, VCM = 0, VO = -0.5V, 100% Overdrive -18 6 +18 VIN = 0V, VCLAMP = 1V, VCM = 0 Clamp Pin Bias Drift Diff Amp Input Bias Shift Linear to Clamped Operation Clamp Pin Input Impedance 6 V VCM + 3.0 Default VCLAMP Voltage Clamp Pin Bias Current (7) (8) VCM + 2.0 (8) Clamp Accuracy Temperature Drift (4) (5) (6) VCM V mV -0.1 mV/C 23.5 A 0.3 A/C 50 A 30 1 k/pF Clamp Pin Feedthrough f = 10 MHz -60 dB Clamp Bandwidth 0.5VDC + 40 mVPP, SE VIN = 2V 125 MHz Clamp Slew Rate 100% Overdrive 52 V/s Exceeding limits could result in excessive device current. IBI is referred to a differential output offset voltage by the following relationship: VOD(offset) = IBI*2RF Short circuit current should be limited in duration to no more than 10 seconds. See POWER DISSIPATION in Application Information for more details. Exceeding limits could result in excessive device current. This parameter is ensured by design and/or characterization and is not tested in production. The condition of VCLAMP = 3V is not intended for continuous operation; continuous operation with VCLAMP = 3V may incur permanent damage to the device. Submit Documentation Feedback Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 LMH6553 www.ti.com SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 VS = 2.5V Electrical Characteristics (1) (continued) Unless otherwise specified, all limits are ensured for TA = 25C, VS = 2.5V, AV = 1, VCM = 0V, VCLAMP = 2V, RF = RG = 275, RL = 200, for single-ended in, differential out. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (2) Typ (3) Max (2) Units Clamp Overshoot VIN = 1V Step, AV = 2 V/V, VCLAMP = 0.5V, VCM= 0V, 100% Overdrive 105 mV Clamp Overshoot VIN = 1V Step, AV= 2 V/V, VCLAMP = 1V, VCM = 0.5V, 100% Overdrive 105 mV 650 ps VIN = 2V Step, AV = 2 V/V, VCLAMP = 0.5V, VCM = 0V, 50% Output Crossing 600 ps f = 75 MHz, VOD = 2 VPP, RL = 800, SFDR Down 3 dB 40 mV Common Mode Small Signal Bandwidth VIN+ = VIN- = 0 130 MHz Slew Rate VIN+ = VIN- = 0 Output Common Mode Error Common Mode, VIN = float, VCM = 0 Input Bias Current VCM = 0, (9) Clamp Overshoot Width Clamp Overdrive Recovery Time Linearity Guardband (10) Output Common Mode Control Circuit VOSCM (11) Voltage Range CMRR 186 -20 V/s 20 -3.5 0.75 Measure VOD, VID = 0V Input Resistance Gain 2 A 0.81 V 84 dB 200 VO,CM/VCM 0.995 mV 1.00 k 1.008 V/V Miscellaneous Performance ZT Open Loop Transimpedance Differential 105 dB PSRR Power Supply Rejection Ratio DC, VS = 1V 85 dB IS Supply Current RL = 23 26.5 30 34 mA (9) Clamp Overshoot Width is the duration of overshoot in a 100% overdrive condition. (10) Linearity Guardband is defined for an output sinusoid (f = 75 MHz, VOD = 2 VPP). It is the difference between the VCLAMP level and the peak output voltage where the SFDR is decreased by 3 dB. (11) Negative current implies current flowing out of the device. Submit Documentation Feedback Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 7 LMH6553 SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 www.ti.com CONNECTION DIAGRAM -IN VCM V+ +OUT 1 8 2 - + 7 +IN VCLAMP 6 3 V- 5 4 -OUT DAP Figure 2. 8-Pin SO PowerPAD Top View -IN 1 8 +IN VCM 2 7 VCLAMP V+ 3 6 V- +OUT 4 5 -OUT DAP Figure 3. 8-Pin WSON Top View 8 Submit Documentation Feedback Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 LMH6553 www.ti.com SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 PIN DESCRIPTIONS Pin No. Pin Name Description 1 -IN Negative Input 2 VCM Output Common Mode Control 3 V+ Positive Supply 4 +OUT Positive Output 5 -OUT Negative Output 6 V- Negative Supply 7 VCLAMP Output Voltage Clamp Control 8 +IN Positive Input DAP DAP Die Attach Pad (See THERMAL PERFORMANCE for more information) Submit Documentation Feedback Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 9 LMH6553 SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 www.ti.com Typical Performance Characteristics VS = 5V (TA = 25C, RF = RG = 275, RL = 200, AV = 1, for single ended in, differential out, unless specified). Frequency Response vs. Gain 1 AV = 1 0 -3 AV = 8 -4 -1 NORMALIZED GAIN (dB) AV = 4 -2 -5 -6 -7 -3 -5 -6 -7 NORMALIZED GAIN (dB) 1000 -9 1 10000 10 100 FREQUENCY (MHz) Figure 5. Frequency Response vs. VOUT -9 VO = 0.5 VPP VOD = 0.5 VPP -8 VO = 2 VPP VO = 4 VPP -4 -5 -6 -7 VS = +5V -8 AV = 2V/V DIFFERENTIAL INPUT -9 1 10 100 1000 FREQUENCY (MHz) 10000 -7 VOD = 2 VPP -6 -5 VOD = 4 VPP -4 -3 -2 -1 VS = +5V 0 AV = 2V/V SINGLE-ENDED INPUT 1 1 10 100 1000 FREQUENCY (MHz) 0 2 1 -1 -2 VS = +2.5V -4 RL = 200O -5 RF = 275O -6 -7 VOD = 0.2 VPP -8 AV = 1 V/V DIFFERENTIAL INPUT -9 1 10 100 3 RL = 200O RF = 275O -3 Frequency Response vs. Supply Voltage (RL = 1 k) VS = +5V NORMALIZED GAIN (dB) NORMALIZED GAIN (dB) 1 10000 Figure 7. Frequency Response vs. Supply Voltage (RL = 200) 2 10000 Frequency Response vs. VOUT Figure 6. 10 1000 Figure 4. -2 -3 VOUT = 0.2 VPP SINGLE-ENDED INPUT -8 FREQUENCY (MHz) 0 -1 AV = 8 -4 NORMALIZED GAIN (dB) 1 AV = 4 -2 -8 VOUT = 0.2 VPP -9 DIFFERENTIAL INPUT -10 1 10 100 AV = 1 AV = 2 0 AV = 2 -1 NORMALIZED GAIN (dB) Frequency Response vs. Gain 1 0 -1 VS = +2.5V -2 RL = 1 kO -3 RF = 225O -4 VS = +5V -5 RL = 1 kO -7 -8 1000 10000 RF = 225O -6 -9 1 VOD = 0.2 VPP AV = 1 V/V DIFFERENTIAL INPUT FREQUENCY (MHz) 10 100 1000 FREQUENCY (MHz) Figure 8. Figure 9. Submit Documentation Feedback 10000 Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 LMH6553 www.ti.com SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 Typical Performance Characteristics VS = 5V (continued) (TA = 25C, RF = RG = 275, RL = 200, AV = 1, for single ended in, differential out, unless specified). Frequency Response vs. Capacitive Load Suggested RO vs. Capacitive Load -9 60 CL = 82 pF, RO =16O -7 50 SUGGESTED RO (O) NORMALIZED GAIN (dB) -8 CL = 39 pF, RO = 21O -6 -5 CL = 15 pF, RO = 30O -4 CL = 5.6 pF, RO = 40O -3 -2 VOD = 200 mVPP -1 AV = 1 V/V 0 1 40 30 20 10 LOAD = (CL || 1 kO) IN 1 10 VS = +5V LOAD = 1 kO || CAP LOAD SERIES WITH 2 ROUTS 0 100 1 1000 10 Figure 10. Figure 11. Frequency Response vs. Resistive Load Frequency Response vs. Resistive Load 3 3 2 RL = 1 kO, RF = 400O RL = 800O 1 0 NORMALIZED GAIN (dB) NORMALIZED GAIN (dB) RL = 1 kO, RF = 400O 2 1 RL = 500O -1 -2 -3 RL = 200O -4 -5 VS = +5V -6 AV = 1V/V -7 RF = 275O RL = 800O 0 -1 RL = 500O -2 -3 RL = 200O -4 -5 -6 -7 VOUT = 0.2 VPP -8 SINGLE-ENDED INPUT -9 1 10 100 1000 FREQUENCY (MHz) VS = +5V AV = 1V/V RF = 275O VOUT = 2 VPP -8 SINGLE-ENDED INPUT -9 1 10 100 1000 FREQUENCY (MHz) 10000 Figure 12. 10000 Figure 13. Frequency Response vs. RF 1 VPP Pulse Response Single-Ended Input -0.8 3 2 100 CAPACITIVE LOAD (pF) FREQUENCY (MHz) RF = 200O -0.6 -0.4 0 -1 -2 -3 -0.2 RF = 275O VOD (V) NORMALIZED GAIN (dB) 1 RF = 350O -4 0 VS = +2.5V 0.2 -5 RL = 200O -6 AV = 1 V/V -7 VOUT = 2 VPP RL = 1 kO -8 DIFFERENTIAL INPUT -9 1 10 100 0.4 RF = 275O 0.6 VCLAMP = 3V VCM = 0V 0.8 1000 10000 FREQUENCY (MHz) Figure 14. 0 5 10 15 20 25 TIME (ns) 30 35 40 Figure 15. Submit Documentation Feedback Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 11 LMH6553 SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 www.ti.com Typical Performance Characteristics VS = 5V (continued) (TA = 25C, RF = RG = 275, RL = 200, AV = 1, for single ended in, differential out, unless specified). 2 VPP Pulse Response Single-Ended Input 4 VPP Pulse Response Single-Ended Input -2.5 1.5 -2.0 1.0 -1.5 -1.0 0.0 VS = +5V -0.5 -0.5 VOD (V) 0.0 RL = 200O RF = 275O -1.0 VS = +5V 1.0 RL = 200O RF = 275O 1.5 VCLAMP = 3V VCLAMP = 3V 2.0 VCM = 0V -1.5 VCM = 0V 2.5 0 5 10 15 20 25 30 35 40 0 1.5 10 3.0 VOD (V) 2.0 0 VS = +5V 1.0 AV = 2V/V RL = 200O 0.5 RL = 200O VCM = 1.5V VCM = 0V 0 0 10 15 20 25 30 35 40 45 50 5 TIME (ns) 10 15 20 25 30 35 40 45 50 TIME (ns) Figure 18. Figure 19. Overdrive Recovery with VS = 5V 2.0 4.8 8 1.6 6 1.2 OUTPUT VOLTAGE (VOD) INPUT 0.8 2 0.4 0 0 -2 -0.4 -4 -0.8 -6 -1.2 -10 -12 0 OUTPUT VCLAMP = 3V 200 400 600 VS = +5V AV = 5 V/V -1.6 RF = 275O -2.0 RL = 200O -2.4 800 1000 OUTPUT VOLTAGE (VOD) 10 INPUT VOLTAGE (V) 6.0 -8 12 Overdrive Recovery with VS = 2.5V 2.4 OUTPUT VCLAMP = 0.5V 40 100% Overdrive VCLAMP = 2V 0% Overdrive VCLAMP = 2.5V AV = 2V/V 4 35 1.5 VS = +5V 12 30 Pulse Response with 0% and 100% Overdrive 100% Overdrive VCLAMP = 0.5V 0.5 5 25 Figure 17. 2.5 -1.5 0 20 Figure 16. 1.0 -1.0 15 TIME (ns) 0% Overdrive VCLAMP = 1V -0.5 5 TIME (ns) Pulse Response with 0% and 100% Overdrive VOD (V) 0.5 INPUT 1.2 0.8 3.6 OUTPUT VCLAMP = 0.5V 2.4 1.2 0.4 0 0 -1.2 -0.4 -2.4 -3.6 -4.8 -6.0 0 OUTPUT VCLAMP = 3V 200 400 600 TIME (ns) TIME (ns) Figure 20. Figure 21. Submit Documentation Feedback VS = +2.5V AV = 5 V/V -0.8 RF = 275O RL = 200O -1.2 800 1000 INPUT VOLTAGE (V) VOD (V) 0.5 Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 LMH6553 www.ti.com SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 Typical Performance Characteristics VS = 5V (continued) (TA = 25C, RF = RG = 275, RL = 200, AV = 1, for single ended in, differential out, unless specified). Output Common Mode Pulse Response -50 -45 -40 -50 -30 -55 DISTORTION (dBc) COMMON MODE VOUT (mV) Distortion vs. Frequency Single-Ended Input (RL=800) -40 -60 -20 -10 0 10 20 VS = +5V 30 RL = 200O 40 RF = 275O 50 VOD = 2VPP 5 -60 -65 -70 VS = +5V -75 RL = 800O -80 VOD = 2VPP HD2 -85 RF = 275O -90 VCLAMP = 3V -95 VCM = 0V -100 10 30 50 70 90 110 130 150 170 190 FREQUENCY (MHz) 60 0 HD3 10 15 20 25 30 35 40 45 50 TIME (ns) Figure 22. Figure 23. Distortion vs. Supply Voltage (fc=20Mhz, RL=800) Distortion vs. Supply Voltage (fc=75Mhz, RL=800) -50 -40 RL = 800O VOD = 2 VPP VCLAMP = 3V VCM = 0 fc = 20 MHz DISTORTION (dBc) -60 -65 -50 -70 HD2 -75 -80 -85 -95 4 -55 -65 -70 -75 -80 HD2 -90 5 -10 6 7 8 9 10 11 -95 4 12 6 7 8 9 10 11 TOTAL SUPPLY VOLTAGE (V) Figure 24. Figure 25. Distortion vs. VCM (fc=20Mhz, RL=800) Distortion vs. VCM (fc=75Mhz, RL=800) -10 12 VS = +5V -20 VOD = 2VPP -40 VCLAMP = 3V DISTORTION (dBc) RL = 800O -30 HD3 fc = 20 MHz -50 5 TOTAL SUPPLY VOLTAGE (V) VS = +5V -20 DISTORTION (dBc) HD3 -60 -85 HD3 -90 RL = 800O VOD = 2 VPP VCLAMP = 3V VCM = 0 fc = 75 MHz -45 DISTORTION (dBc) -55 -60 -70 HD2 -30 RL = 800O VOD = 2VPP VCLAMP = 3V -40 fc = 75 MHz -50 HD3 -60 -70 -80 -90 -80 -100 -90 0 HD2 0 0.5 1 1.5 2 2.5 3 0.5 1 1.5 VCM (V) VCM (V) Figure 26. Figure 27. 2 2.5 3 Submit Documentation Feedback Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 13 LMH6553 SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 www.ti.com Typical Performance Characteristics VS = 5V (continued) (TA = 25C, RF = RG = 275, RL = 200, AV = 1, for single ended in, differential out, unless specified). Distortion vs. Frequency Single-Ended Input (RL=200) Distortion vs. Supply Voltage (fc=20Mhz, RL=200) -35 -50 -40 -55 -45 DISTORTION (dBc) DISTORTION (dBc) -60 HD3 -50 -55 -60 -65 -70 -75 VS = 5V RL = 200O VOD = 2VPP RF = 275O VCLAMP = 3V VCM = 0V -80 -85 HD2 -90 -95 -65 -70 -75 HD2 -80 -85 -90 -95 HD3 -100 -105 4 -100 10 30 50 70 90 110 130 150 170 190 200 5 6 7 8 9 10 11 FREQUENCY (MHz) TOTAL SUPPLY VOLTAGE (V) Figure 28. Figure 29. Distortion vs. Supply Voltage (fc=75Mhz, RL=200) Distortion vs. VCM (fc=20Mhz, RL=200) -40 12 -10 -50 -55 DISTORTION (dBc) RL = 200O VOD = 2VPP VCLAMP = 3V VCM = 0V fc = 75 MHz -45 DISTORTION (dBc) RL = 200O VOD = 2VPP VCLAMP = 3V VCM = 0V fc = 20 MHz -60 -65 HD3 -70 HD2 VS = 5V -20 RL = 200O VOD = 2 VPP -30 VCLAMP = 3V fc = 20MHz -40 HD3 -50 -60 HD2 -70 -75 -80 -80 -90 -85 4 -100 0 HD3 14 5 6 7 8 9 10 11 12 0.5 1 1.5 2 TOTAL SUPPLY VOLTAGE (V) VCM (V) Figure 30. Figure 31. Submit Documentation Feedback 2.5 3 Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 LMH6553 www.ti.com SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 Typical Performance Characteristics VS = 5V (continued) (TA = 25C, RF = RG = 275, RL = 200, AV = 1, for single ended in, differential out, unless specified). Distortion vs. VCM (fc=75Mhz, RL=200) Maximum VOUT vs. IOUT 4.5 VS = 5V R = 200O -20.0 L VOD = 2 VPP V = 3V -30.0 CLAMP fc = 75MHz HD2 4 MAXIMUM VOUT (V) DISTORTION (dBc) -10.0 -40.0 -50.0 HD3 -60.0 -70.0 3.5 3 VS = +5V RF = 275O VCM = 3V 2.5 VCLAMP = 5V -80.0 VIN = 3.5V SINGLE-ENDED INPUT HD2 2 -90.0 0 0.5 1 1.5 2 2.5 0 3 20 40 VCM (V) Figure 32. 80 Figure 33. Minimum VOUT vs. IOUT Closed Loop Output Impedance -2 1000 VS = +5V RF = 275O 100 -2.5 VCM = -3V VCLAMP = -1V VS = +5V VIN = 0V AV = 1 V/V 10 VIN = -3.5V SINGLE-ENDED INPUT 1 Z (:) MINIMUM VOUT (V) 60 OUTPUT CURRENT (mA) -3 0.1 0.01 -3.5 0.001 0.0001 0.01 -4 0 20 40 60 OUTPUT CURRENT (mA) 80 1000 Figure 35. Closed Loop Output Impedance Open Loop Transimpedance 1000 120 VS = +2.5V VIN = 0V AV = 1 V/V 1 0.1 0.01 0.001 0.0001 0.01 MAGNITUDE 100 90 0 80 PHASE 70 PHASE () MAGNITUDE, |Z| (dB O) 110 10 Z (:) 100 FREQUENCY (MHz) Figure 34. 100 10 1 0.1 -45 -90 60 -135 50 VS = +5V 0.1 1 10 100 1000 40 0.01 FREQUENCY (MHz) 0.1 1 10 100 -180 1000 FREQUENCY (MHz) Figure 36. Figure 37. Submit Documentation Feedback Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 15 LMH6553 SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 www.ti.com Typical Performance Characteristics VS = 5V (continued) (TA = 25C, RF = RG = 275, RL = 200, AV = 1, for single ended in, differential out, unless specified). Open Loop Transimpedance PSRR 120 100 90 100 90 0 80 PHASE 70 -45 -90 60 PSRR (dBc DIFFERENTIAL) MAGNITUDE PHASE () MAGNITUDE, |Z| (dB O) 110 -135 50 VS = +2.5V 40 0.01 0.1 1 10 100 -180 1000 80 -PSRR 70 60 50 +PSRR 40 30 AV = 2 V/V 20 RL = 200O VIN = 0V 10 VCM = 0V VCLAMP = 3V 0 0.1 1 10 100 FREQUENCY (MHz) FREQUENCY (MHz) Figure 38. Figure 39. PSRR 1000 CMRR 80 90.0 -PSRR 80.0 60 50 70.0 +PSRR CMRR (dB) PSRR (dBc DIFFERENTIAL) 70 40 30 20 60.0 50.0 40.0 AV = 2 V/V RL = 200O VOUT = 1.0 VPP VCM = 0V VCLAMP = 3V 30.0 AV = 2 V/V RL = 200O 10 V = 0V IN VCM = 0V 0 0.1 1 20.0 10 100 10.0 1.0e-1 1000 FREQUENCY (MHz) 1.0 1.0e1 1.0e2 1.0e3 FREQUENCY (MHz) Figure 40. Figure 41. Balance Error Noise Figure -15 14 -20 VS = +2.5V 13 -30 NOISE FIGURE (dB) BALANCE ERROR (dBc) -25 -35 -40 VS = +5V -45 -50 -55 -60 RL = 200O RF = 274O AV = 1 V/V -65 -70 1 10 100 12 11 10 1000 FREQUENCY (MHz) 20 40 60 80 100 120 140 160 180 200 FREQUENCY (MHz) Figure 42. 16 9 0 AV = 9 V/V RF = 275O VCM = 0V VCLAMP = 3V 50O SYSTEM Figure 43. Submit Documentation Feedback Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 LMH6553 www.ti.com SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 Typical Performance Characteristics VS = 5V (continued) (TA = 25C, RF = RG = 275, RL = 200, AV = 1, for single ended in, differential out, unless specified). Noise Figure Differential S-Parameter Magnitude vs. Frequency 10 AV = 9 V/V RF = 275O 13 VCM = 0V VCLAMP = 3V 50O SYSTEM 0 S21 -10 MAGNITUDE (dB) NOISE FIGURE (dB) 14 12 11 10 S11 -20 (SINGLE-ENDED INPUT) -30 -40 -50 S22 S11 -60 -70 9 0 -90 10 20 40 60 80 100 120 140 160 180 200 Figure 44. Figure 45. 3rd Order Intermodulation Products vs. VOUT -50 VS = 5V -55 RF = 324O A = 2 V/V -60 V VCM = 0V -65 VCLAMP = 3V S22 100 50 IMD3 (dBc) PHASE () S21 -50 S12 S11 -150 S11 -200 (SINGLE-ENDED INPUT) -250 VS = +5V -300 AV = 1 V/V 50: SYSTEM -350 10 100 RL = 800O -70 RL = 200O -75 -80 -85 -90 fc = 75 MHz (2MHz SPACING) SINGLE-ENDED INPUT -95 -100 1 1000 2 3 4 5 6 FREQUENCY (MHz) DIFFERENTIAL VOUT (VPP) Figure 46. Figure 47. 3rd Order Intermodulation Products vs. VOUT 3rd Order Intermodulation Products vs. Center Frequency -30 -50 VS = 2.5V RF = 324O -40 AV = 2 V/V VCM = 0V -50 VCLAMP = 3V RL = 200O IMD3 (dBc) IMD3 (dBc) 1000 FREQUENCY (MHz) Differential S-Parameter Phase vs. Frequency -100 100 FREQUENCY (MHz) 150 0 VS = +5V AV = 1 V/V 50: SYSTEM S12 -80 -60 -70 RL = 800O VS = 5V -55 RL = 200O RF = 324O -60 AV = 2 V/V -65 VOD = 2 VPP VCLAMP = 3V -70 VCM = 1.5V -75 -80 VCM = 0V -85 -80 -90 -90 -100 1 fc = 75 MHz (2MHz SPACING) SINGLE-ENDED INPUT 2 3 4 SINGLE-ENDED INPUT 2MHz SPACING -95 5 -100 25 50 75 100 125 DIFFERENTIAL VOUT (VPP) CENTER FREQUENCY (MHz) Figure 48. Figure 49. 150 Submit Documentation Feedback Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 17 LMH6553 SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 www.ti.com Typical Performance Characteristics VS = 5V (continued) (TA = 25C, RF = RG = 275, RL = 200, AV = 1, for single ended in, differential out, unless specified). 3rd Order Intermodulation Products vs. Center Frequency 3rd Order Intermodulation Products vs. Center Frequency -30 VS = 5V -55 RF = 324O RL = 800O -60 AV = 2 V/V V = 2 VPP -65 OD VCLAMP = 3V -70 VS = 2.5V RL = 200O -40 RF = 324O AV = 2 V/V -50 VOD = 2 VPP VCLAMP = 2V VCM = 1.5V IMD3 (dBc) IMD3 (dBc) -50 -75 -80 -60 -70 VCM = 0V -85 VCM = 1.5V VCM = 0V -80 -90 -100 25 -90 SINGLE-ENDED INPUT 2MHz SPACING -95 50 75 100 125 150 -100 25 SINGLE-ENDED INPUT 2 MHz SPACING 50 75 100 125 150 CENTER FREQUENCY (MHz) CENTER FREQUENCY (MHz) Figure 50. Figure 51. 3rd Order Intermodulation Products vs. Center Frequency 3rd Order Intermodulation Products vs. VCLAMP -30 -30 VS = 5V VCM = 1.5V RL = 200O -50 -60 -70 VCM = 0V fc = 150 Mhz VOD = 2 VPP -60 -70 AV = 2 V/V VCM = 0V fc = 50 Mhz -80 -80 -90 -90 -100 25 RF = 324O -40 IMD3 (dBc) IMD3 (dBc) VS = 2.5V RL = 800O -40 RF = 324O AV = 2V/V -50 VOD = 2VPP VCLAMP = 2V SINGLE-ENDED INPUT 2 MHz SPACING 50 75 100 125 150 SINGLE-ENDED INPUT 2 MHz SPACING -100 0.5 1.0 1.5 2.0 VCLAMP (V) 2.5 3.0 CENTER FREQUENCY (MHz) Figure 52. 18 Figure 53. Submit Documentation Feedback Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 LMH6553 www.ti.com SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 APPLICATION INFORMATION The LMH6553, a fully differential current feedback amplifier with integrated output common mode control and output limiting clamp, is designed to provide protection of following input stages. The common mode feedback circuit sets the output common mode voltage independent of the input common mode, as well as forcing the outputs to be equal in magnitude and opposite in phase, even when only one of the inputs is driven as in single ended to differential conversion. The proprietary current feedback architecture of the LMH6553 offers gain and bandwidth independence even at high values of gain, simply with the appropriate choice of RF1 and RF2. Generally RF1 is set equal to RF2, and RG1 equal to RG2, so that the gain is set by the ratio RF/RG. Matching of these resistors greatly affects CMRR, DC offset error, and output balance. Resistors with 0.1% tolerances are recommended for optimal performance, and the amplifier is internally compensated to operate with optimum gain flatness with values of RF between 250 and 350 depending on package selection, PCB layout, and load resistance. The output common mode voltage is set by the VCM pin with a fixed gain of 1 V/V. This pin should be driven by a low impedance source and should be bypassed to ground with a 0.1 F ceramic capacitor. Any unwanted signal coupling into the VCM pin will be passed along to the outputs, reducing the performance of the amplifier. This pin must not be left floating. The LMH6553 can be operated with either a single 5V supply or split +5V and -5V supplies. Operation on a single 5V supply, depending on gain, is limited by the input common mode range; therefore, AC coupling may be required. For example, in a DC coupled input application on a single 5V supply, with a VCM of 1.5V, the input common voltage at a gain of 1 will be 0.75V which is outside the minimum 1.5V to 3.5V input common mode range of the amplifier. The minimum VCM for this application should be greater than 1.5V depending on output signal swing. Alternatively, AC coupling of the inputs in this example results in equal input and output common mode voltages, so a 1.5V input common mode would result. Split supplies allow much less restricted AC and DC coupled operation with optimum distortion performance. The LMH6553 has a VCLAMP input which allows control of the maximum amplifier output swing to prevent overdriving of following stages such as sensitive ADC inputs and also provides fast recovery from transients that would otherwise saturate the signal path. RECOMMENDED FEEDBACK RESISTOR The LMH6553 is available in both an 8-pin WSON and SO PowerPAD package. The recommended feedback resistor, RF, for the WSON package is 275 and 325 for the SO PowerPAD to give a flat frequency response with minimal peaking. FULLY DIFFERENTIAL OPERATION The LMH6553 is ideal for a fully differential configuration. The circuit shown in Figure 54 is a typical fully differential application circuit as might be used to drive an analog to digital converter (ADC). In this circuit the closed loop gain AV = VOUT/ VIN = RF/RG, where the feedback is symmetric. The series output resistors, RO, are optional and help keep the amplifier stable when presented with a capacitive load. Refer to DRIVING CAPACITIVE LOADS for details. RO RF RG VIN + a CL VCM RL VO RG VCLAMP RF RO Figure 54. Typical Application Submit Documentation Feedback Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 19 LMH6553 SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 www.ti.com When driven from a differential source, the LMH6553 provides low distortion, excellent balance, and common mode rejection. This is true provided the resistors RF, RG and RO are well matched and strict symmetry is observed in board layout. 275: 50: 61: RS = 50: VIN 275: + VCM a RL RS = 50: 61: 275: VCLAMP 50: 275: Figure 55. Differential S-Parameter Test Circuit The circuit configuration shown in Figure 55 was used to measure differential S parameters in a 50 environment at a gain of 1 V/V. Refer to Figure 45 and Figure 46 in Typical Performance Characteristics for measurement results. SINGLE-ENDED INPUT TO DIFFERENTIAL OUTPUT OPERATION In many applications, it is required to drive a differential input ADC from a single-ended source. Traditionally, transformers have been used to provide single to differential conversion, but these are inherently bandpass by nature and cannot be used for DC coupled applications. The LMH6553 provides excellent performance as a single-to-differential converter down to DC. Figure 56 shows a typical application circuit where an LMH6553 is used to produce a differential signal from a single ended source. RF AV, RIN V RS VIN + RO RG + a VCM RT + RM RG + - - VCLAMP + - RG + R M E2 = R + R + R F M (c) G (c) (c) (c) 2RG + RM (1-E2) 1 + E2 (c) RG E1 = R + R G F (c) (c) RIN = ADC IN+ RO V RF 2(1 - E1) AV = (c) E1 + E2 IN- VOUT LMH6553 RS = RT || RIN RM = RT || RS Figure 56. Single-Ended Input with Differential Output When using the LMH6553 in single-to-differential mode, the complementary output is forced to a phase inverted replica of the driven output by the common mode feedback circuit as opposed to being driven by its own complementary input. Consequently, as the driven input changes, the common mode feedback action results in a varying common mode voltage at the amplifier's inputs, proportional to the driving signal. Due to the non-ideal common mode rejection of the amplifier's input stage, a small common mode signal appears at the outputs which is superimposed on the differential output signal. The ratio of the change in output common mode voltage to output differential voltage is commonly referred to as output balance error. The output balance error response of the LMH6553 over frequency is shown in the Typical Performance Characteristics. 20 Submit Documentation Feedback Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 LMH6553 www.ti.com SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 To match the input impedance of the circuit in Figure 56 to a specified source resistance, RS, requires that RT || RIN = RS. The equations governing RIN and AV for single-to-differential operation are also provided in Figure 56. These equations, along with the source matching condition, must be solved iteratively to achieve the desired gain with the proper input termination. Component values for several common gain configurations in a 50 environment are given in Table 1. Table 1. Gain Component Values for 50 System WSON Package Gain RF RG RT RM 0 dB 275 255 59 26.7 6 dB 275 127 68.1 28.7 12 dB 275 54.9 107 34 Table 2. Gain Component Values for 50 System SO PowerPAD Package Gain RF RG RT RM 0 dB 325 316 56.2 26.7 6 dB 325 150 64.9 28 12 dB 325 68.1 88.7 31.6 275: 50: 255: RS = 50: VIN a VCM 59: + RL 255: 26.7: VCLAMP 50: 275: Figure 57. Single Ended Input S-Parameter Test Circuit (50 System) The circuit shown in Figure 57 was used to measure S-parameters for a single-to-differential configuration. Figure 45 and Figure 46 in Typical Performance Characteristics are taken using the recommended component values for 0 dB gain. SINGLE SUPPLY OPERATION Single supply operation is possible on supplies from 5V to 10V; however, as discussed earlier, AC input coupling is recommended for low supplies due to input common mode limitations. An example of an AC coupled, single supply, single-to-differential circuit is shown in Figure 58. Note that when AC coupling, both inputs need to be AC coupled irrespective of single-to-differential or differential-to-differential configuration. For higher supply voltages, DC coupling of the inputs may be possible provided that the output common mode DC level is set high enough so that the amplifier's inputs and outputs are within their specified operating ranges. Submit Documentation Feedback Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 21 LMH6553 SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 www.ti.com RF RG RS RO VO1 VI1 - + VIN a RT CL VCM RL + RG RM VOUT VI2 VO2 RF RO VCLAMP *VCM = VO1 + VO2 2 *BY DESIGN VICM = VOCM VICM = VI1 + VI2 2 Figure 58. AC Coupled for Single Supply Operation SPLIT SUPPLY OPERATION For optimum performance, split supply operation is recommended using +5V and -5V supplies; however, operation is possible on split supplies as low as +2.25V and -2.25V and as high as +6V and -6V. Provided the total supply voltage does not exceed the 4.5V to 12V operating specification, asymmetric supply operation is also possible and in some cases advantageous. For example, if 5V DC coupled operation is required for low power dissipation but the amplifier input common mode range prevents this operation, it is still possible with split supplies of (V+) and (V-). Where (V+) - (V-) = 5V and V+ and V- are selected to set the amplifier input common mode voltage to suit the application. CLAMP OPERATION The output clamp allows control of the maximum amplifier output swing to prevent overdriving of following stages such as sensitive ADC inputs and provide fast recovery from signal transients that would otherwise saturate the signal path. Figure 59 shows the relationship between VCLAMP and the +OUT and -OUT outputs. The example circuit shown has a single ended input and is set for a gain of 2 V/V. For proper operation VCM < VCLAMP < VCM + 2.0V and the upper single ended output voltage is limited to the voltage level set at the VCLAMP input. The output common mode control loop forces the lower single ended voltage to be limited to 2*VCM - VCLAMP. The maximum clamped single ended output swing is therefore equal to 2*(VCLAMP - VCM) and the maximum differential output swing is therefore equal to 4*(VCLAMP - VCM). In the example of Figure 59 with VCLAMP set to 2V and VCM set to 1.5V, the maximum single ended output is therefore 1 VPP centered at 1.5V and the maximum differential output is 2 VPP. This is shown for the case of a 2 VPP input sine wave which for a gain of 2 V/V in unclamped operation would provide single ended outputs at +OUT and -OUT of 2 VPP but is shown being clamp limited to 1 VPP. 22 Submit Documentation Feedback Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 LMH6553 www.ti.com SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 V VON_SE 2.5 VCLAMP 2.0 VCM = 1.5 1 VPP 2*VCM VCLAMP 1.0 0.5 SE Unclampled output 0 RF t RG VIN = 2VPP 0V + VCM = 1.5V VCM VCLAMP Differential Output VON-VOP = 2VPP RG RF V Vclamp = 2.0V VOP_SE 2.5 VCLAMP 1 VPP 2.0 VCM = 1.5 1.0 2*VCM VCLAMP 0.5 SE Unclampled output 0 t Figure 59. Clamp Operation CLAMP PERFORMANCE Key clamp performance specifications are listed in the electrical characteristics section. Figure 60 illustrates the clamp overdrive recovery time which is defined as the difference in input to output propagation delay due to a step change at the input for a clamped output versus a normal linear unclamped, non-saturated output. Clamp Overdrive Recovery Time V 50% Response to step from clamped state Normal Linear response to step Time Figure 60. Clamp Overdrive Recovery Time MAXIMUM OUTPUT LEVEL The maximum unclamped output swing in normal operation is 4VPP single ended or 8 VPP differential due to the requirement that VCLAMP < VCM + 2.0V. For split supply operation of +5V and -5V, the maximum output voltage is limited by the output stage's ability to swing close to either supply (VOUT < 3.7V). As shown in Figure 61, if VCLAMP is set > 3.7V, the amplifier output will saturate at the positive supply before the clamp can operate and similarly if 2*VCM - VCLAMP < -3.7V, the amplifier output will saturate at the negative supply. Submit Documentation Feedback Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 23 LMH6553 SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 www.ti.com VOUT(MAX) +V VCLAMP 5 SE Unclamped output 4 VOUT(MAX) = + 3.7V VCM = 3 2 1 2*VCM VCLAMP 0 t VOUT(MIN) t 0 -1 VCLAMP -2 VCM = -3 VOUT(MIN) = -3.7V -4 SE Unclamped output 2*VCM VCLAMP -5 -V Figure 61. Split Supply VOUT(MAX) and VOUT(MIN) Output Levels OUTPUT NOISE PERFORMANCE AND MEASUREMENT Unlike differential amplifiers based on voltage feedback architectures, noise sources internal to the LMH6553 refer to the inputs largely as current sources, hence the low input referred voltage noise and relatively higher input referred current noise. The output noise is therefore more strongly coupled to the value of the feedback resistor and not to the closed loop gain, as would be the case with a voltage feedback differential amplifier. This allows operation of the LMH6553 at much higher gain without incurring a substantial noise performance penalty, simply by choosing a suitable feedback resistor. Figure 62 shows a circuit configuration used to measure noise figure for the LMH6553 in a 50 system. An RF value of 275 is chosen for the SO PowerPAD package to minimize output noise while simultaneously allowing both high gain (9 V/V) and proper 50 input termination. Refer to SINGLE-ENDED INPUT TO DIFFERENTIAL OUTPUT OPERATION for calculation of resistor and gain values. Noise figure values at various frequencies are shown in Figure 43 in Typical Performance Characteristics. 275: V RS = 50: VIN 1 PF 10: VCM a + + VO LMH6553 50: + 50: 2:1 (TURNS) - 10: 1 PF V - 275: AV = 9 V/V Figure 62. Noise Figure Circuit Configuration 24 Submit Documentation Feedback Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 LMH6553 www.ti.com SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 DRIVING ANALOG TO DIGITAL CONVERTERS Analog-to-digital converters present challenging load conditions. They typically have high impedance inputs with large and often variable capacitive components. As well, there are usually current spikes associated with switched capacitor or sample and hold circuits. Figure 63 shows the LMH6553 driving the ADC14C105. The amplifier is configured to provide a gain of 2 V/V in a single-to-differential mode. The LMH6553 common mode voltage is set by the ADC14C105. The 0.1 F capacitor, in series with the 49.9 resistor, is inserted to ground across the 68.1 resistor to balance the amplifier inputs. The circuit in Figure 63 has a 2nd order lowpass LC filter formed by the 620 nH inductors along with the 22 pF capacitor across the differential inputs of the ADC14C105. The filter has a pole frequency of about 50 MHz. The two 100 resistors serve to isolate the capacitive loading of the ADC from the amplifier and ensure stability. For switched capacitor input ADCs, the input capacitance will vary based on the clock cycle, as the ADC switches between the sample and hold mode. See your particular ADC's datasheet for details. 274: 50: Single-Ended AC-Coupled Source V 127: - + VCM 68.1: ADC14C105 100: 620 nH + - + 127: 49.9: V - 100: 620 nH VREF + V CLAMP 68.1: 0.1PF 14-Bit 105 MSPS 22 pF LMH6553 274: Figure 63. Driving a 14-bit ADC Figure 64 shows the SFDR and SNR performance vs. frequency for the LMH6553 and ADC14C105 combination circuit with the ADC input signal level at -1 dBFS. The ADC14C105 is a single channel 14-bit ADC with maximum sampling rate of 105 MSPS. The amplifier is configured to provide a gain of 2 V/V in single to differential mode. An external bandpass filter is inserted in series between the input signal source and the amplifier to reduce harmonics and noise from the signal generator. In order to properly match the input impedance seen at the LMH6553 amplifier inputs, RM is chosen to match ZS || RT for proper input balance. 100 95 90 SFDR (dBc) 85 (dB) 80 75 70 SNR (dBFs) 65 60 55 50 0 5 10 15 20 25 30 35 40 INPUT FREQUENCY (MHz) Figure 64. LMH6553/ADC14C105 SFDR and SNR Performance vs. Frequency The amplifier and ADC should be located as close together as possible. Both devices require that the filter components be in close proximity to them. The amplifier needs to have minimal parasitic loading on it's outputs and the ADC is sensitive to high frequency noise that may couple in on its inputs. Some high performance ADCs have an input stage that has a bandwidth of several times its sample rate. The sampling process results in all input signals presented to the input stage mixing down into the first Nyquist zone (DC to Fs/2). Submit Documentation Feedback Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 25 LMH6553 SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 www.ti.com The LMH6553 is capable of driving a variety of Texas Instruments Analog-to-Digital Converters. This is shown in Table 3, which offers a list of possible signal path ADC and amplifier combinations. The use of the LMH6553 to drive an ADC is determined by the application and the desired sampling process (Nyquist operation, subsampling or over-sampling). See application note AN-236 (SNAA079) for more details on the sampling processes and application note AN-1393, Using High Speed Differential Amplifiers to Drive ADCs (SNOA461). For more information regarding a particular ADC, refer to the particular ADC datasheet for details. Table 3. DIFFERENTIAL INPUT ADCs COMPATIBLE WITH LMH6553 DRIVER Product Number Max Sampling Rate (MSPS) Resolution Channels ADC1173 15 8 SINGLE ADC1175 20 8 SINGLE ADC08351 42 8 SINGLE ADC1175-50 50 8 SINGLE ADC08060 60 8 SINGLE ADC08L060 60 8 SINGLE ADC08100 100 8 SINGLE ADC08200 200 8 SINGLE ADC08500 500 8 SINGLE ADC081000 1000 8 SINGLE ADC08D1000 1000 8 DUAL ADC10321 20 10 SINGLE ADC10D020 20 10 DUAL ADC10030 27 10 SINGLE ADC10040 40 10 DUAL ADC10065 65 10 SINGLE ADC10DL065 65 10 DUAL ADC10080 80 10 SINGLE ADC11DL066 66 11 DUAL ADC11L066 66 11 SINGLE ADC11C125 125 11 SINGLE ADC11C170 170 11 SINGLE ADC12010 10 12 SINGLE ADC12020 20 12 SINGLE ADC12040 40 12 SINGLE ADC12D040 40 12 DUAL ADC12DL040 40 12 DUAL ADC12DL065 65 12 DUAL ADC12DL066 66 12 DUAL ADC12L063 63 12 SINGLE ADC12C080 80 12 SINGLE ADC12DS080 80 12 DUAL ADC12L080 80 12 SINGLE ADC12C105 105 12 SINGLE ADC12DS105 105 12 DUAL ADC12C170 170 12 SINGLE ADC14L020 20 14 SINGLE ADC14L040 40 14 SINGLE ADC14C080 80 14 SINGLE ADC14DS080 80 14 DUAL ADC14C105 105 14 SINGLE 26 Submit Documentation Feedback Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 LMH6553 www.ti.com SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 Table 3. DIFFERENTIAL INPUT ADCs COMPATIBLE WITH LMH6553 DRIVER (continued) Product Number Max Sampling Rate (MSPS) Resolution Channels ADC14DS105 105 14 DUAL ADC14155 155 14 SINGLE DRIVING CAPACITIVE LOADS As noted previously, capacitive loads should be isolated from the amplifier outputs with small valued resistors. This is particularly the case when the load has a resistive component that is 500 or higher. A typical ADC has capacitive components of around 10 pF and the resistive component could be 1000 or higher. If driving a transmission line, such as 50 coaxial or 100 twisted pair, using matching resistors will be sufficient to isolate any subsequent capacitance. BALANCED CABLE DRIVER With up to 8 VPP differential output voltage swing and 100 mA of linear drive current the LMH6553 makes an excellent cable driver as shown in Figure 65. The LMH6553 is also suitable for driving differential cables from a single ended source. 275: 50: 100: TWISTED PAIR 127: RS = 50: + VIN a VCM 61.8: - 2 VPP 127: 28.7: VCLAMP 50: 275: AV = 2 V/V Figure 65. Fully Differential Cable Driver POWER SUPPLY BYPASSING The LMH6553 requires supply bypassing capacitors as shown in Figure 66 and Figure 67. The 0.01 F and 0.1 F capacitors should be leadless SMT ceramic capacitors and should be no more than 3 mm from the supply pins. These capacitors should be star routed with a dedicated ground return plane or trace for best harmonic distortion performance. A small capacitor, ~0.01 F, placed across the supply rails, and as close to the chip's supply pins as possible, can further improve HD2 performance. Narrow traces or small vias will reduce the effectiveness of bypass capacitors. Also shown in both figures is a capacitor from the VCM and VCLAMP pins to ground. These inputs are high impedance and can provide a coupling path into the amplifier for external noise sources, possibly resulting in loss of dynamic range, degraded CMRR, degraded balance and higher distortion. Submit Documentation Feedback Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 27 LMH6553 SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 www.ti.com + V 10 PF 0.1 PF + VCM 0.01 PF - VCLAMP 0.1 PF 0.1 PF 10 PF - V 0.1 PF Figure 66. Split Supply Bypassing Capacitors V+ 0.1 PF 10 PF 0.01 PF + VCM 0.1 PF VCLAMP 0.01 PF Figure 67. Single Supply Bypassing Capacitors POWER DISSIPATION The LMH6553 is optimized for maximum speed and performance in the small form factor of the standard WSON package. To ensure maximum output drive and highest performance, thermal shutdown is not provided. Therefore, it is of utmost importance to make sure that the TJMAX of 150C is never exceeded. Follow these steps to determine the maximum power dissipation for the LMH6553: 1. Calculate the quiescent (no-load) power: PAMP = ICC* VS where * VS = V+ - V-. (Be sure to include any current through the feedback network if VCM is not mid-rail.) (1) 2. Calculate the RMS power dissipated in each of the output stages: PD (rms) = rms ((VS - V+OUT) * I+OUT) + rms ((VS - V-OUT) * I-OUT) where * VOUT and IOUT are the voltage and the current measured at the output pins of the differential amplifier as if they were single ended amplifiers and VS is the total supply voltage (2) 3. Calculate the total RMS power: PT = PAMP + PD 28 (3) Submit Documentation Feedback Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 LMH6553 www.ti.com SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 The maximum power that the LMH6553 package can dissipate at a given temperature can be derived with the following equation: PMAX = (150 - TAMB)/ JA where * * * * TAMB = Ambient temperature (C) JA = Thermal resistance, from junction to ambient, for a given package (C/W) For the SO PowerPAD package JA is 59C/W For WSON package JA is 58C/W (4) Note: If VCM is not mid-rail, then there will be quiescent current flowing in the feedback network. This current should be included in the thermal calculations and added into the quiescent power dissipation of the amplifier. THERMAL PERFORMANCE The LMH6553 is available in both the SO PowerPAD and WSON packages. Both packages are designed for enhanced thermal performance and features an exposed die attach pad (DAP) at the bottom center of the package that creates a direct path to the PCB for maximum power dissipation. The DAP is floating and is not electrically connected to internal circuitry. The thermal advantage of the two packages is fully realized only when the exposed die attach pad is soldered down to a thermal land on the PCB board with thermal vias planted underneath the thermal land. The thermal land can be connected to any power or ground plane within the allowable supply voltage range of the device. The junction-to-ambient thermal resistance (JA) of the LMH6553 can be significantly lowered, as opposed to an alternative with no direct soldering to a thermal land. Based on thermal analysis of the WSON package, the junction-to-ambient thermal resistance (JA) can be improved by a factor of two when the die attach pad of the WSON package is soldered directly onto the PCB with thermal land and thermal vias are 1.27 mm and 0.33 mm respectively. Typical copper via barrel plating is 1 oz, although thicker copper may be used to further improve thermal performance. For more information on board layout techniques for the WSON package, refer to Application Note 1187 (literature number SNOA401). This application note also discusses package handling, solder stencil and the assembly process. ESD PROTECTION The LMH6553 is protected against electrostatic discharge (ESD) on all pins. The LMH6553 will survive 4000V Human Body model and 350V Machine model events. Under normal operation the ESD diodes have no effect on circuit performance. The current that flows through the ESD diodes will either exit the chip through the supply pins or through the device, hence it is possible to power up a chip with a large signal applied to the input pins. BOARD LAYOUT The LMH6553 is a very high performance amplifier. In order to get maximum benefit from the differential circuit architecture, board layout and component selection are very critical. The circuit board should have a low inductance ground plane and well bypassed wide supply lines. External components should be leadless surface mount types. The feedback network and output matching resistors should be composed of short traces and precision resistors (0.1%). The output matching resistors should be placed within 3 or 4 mm of the amplifier as should the supply bypass capacitors. Refer to POWER SUPPLY BYPASSING for recommendations on bypass circuit layout. Evaluation boards are available free of charge through the product folder on TI's web site. By design, the LMH6553 is relatively insensitive to parasitic capacitance at its inputs. Nonetheless, ground and power plane metal should be removed from beneath the amplifier and from beneath RF and RG for best performance at high frequency. With any differential signal path, symmetry is very important. Even small amounts of asymmetry can contribute to distortion and balance errors. EVALUATION BOARD See the LMH6553 Product Folder for evaluation board availability and ordering information. Submit Documentation Feedback Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 29 LMH6553 SNOSB07H - SEPTEMBER 2008 - REVISED MARCH 2013 www.ti.com REVISION HISTORY Changes from Revision G (March 2013) to Revision H * 30 Page Changed layout of National Data Sheet to TI format .......................................................................................................... 29 Submit Documentation Feedback Copyright (c) 2008-2013, Texas Instruments Incorporated Product Folder Links: LMH6553 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (C) Device Marking (3) (4/5) (6) LMH6553MR/NOPB ACTIVE SO PowerPAD DDA 8 95 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LMH65 53MR LMH6553MRE/NOPB ACTIVE SO PowerPAD DDA 8 250 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LMH65 53MR LMH6553MRX/NOPB ACTIVE SO PowerPAD DDA 8 2500 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LMH65 53MR LMH6553SD/NOPB ACTIVE WSON NGS 8 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 6553 LMH6553SDE/NOPB ACTIVE WSON NGS 8 250 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 6553 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 9-Sep-2016 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LMH6553MRE/NOPB SO Power PAD DDA 8 250 178.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LMH6553MRX/NOPB SO Power PAD DDA 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LMH6553SD/NOPB WSON NGS 8 1000 178.0 12.4 3.3 2.8 1.0 8.0 12.0 Q1 LMH6553SDE/NOPB WSON NGS 8 250 178.0 12.4 3.3 2.8 1.0 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 9-Sep-2016 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMH6553MRE/NOPB SO PowerPAD DDA LMH6553MRX/NOPB SO PowerPAD DDA 8 250 210.0 185.0 35.0 8 2500 367.0 367.0 35.0 LMH6553SD/NOPB WSON LMH6553SDE/NOPB WSON NGS 8 1000 210.0 185.0 35.0 NGS 8 250 210.0 185.0 35.0 Pack Materials-Page 2 PACKAGE OUTLINE NGS0008C WSON - 0.8 mm max height SCALE 5.000 PLASTIC SMALL OUTLINE - NO LEAD 3.1 2.9 B A PIN 1 INDEX AREA 2.6 2.4 C 0.8 0.7 SEATING PLANE 0.08 C 1.6 0.1 (0.1) TYP SYMM EXPOSED THERMAL PAD 0.05 0.00 5 4 SYMM 9 2X 1.5 1.5 0.1 1 8 6X 0.5 8X PIN 1 ID 8X 0.5 0.3 0.3 0.2 0.1 0.05 C A B C 4214924/A 07/2018 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. www.ti.com EXAMPLE BOARD LAYOUT NGS0008C WSON - 0.8 mm max height PLASTIC SMALL OUTLINE - NO LEAD (1.6) SYMM 8X (0.6) 8 1 8X (0.25) (0.5) 9 SYMM (1.5) 6X (0.5) 4 (R0.05) TYP 5 ( 0.2) VIA TYP (2.8) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:20X 0.07 MIN ALL AROUND 0.07 MAX ALL AROUND EXPOSED METAL EXPOSED METAL SOLDER MASK OPENING METAL METAL UNDER SOLDER MASK NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK OPENING SOLDER MASK DEFINED SOLDER MASK DETAILS 4214924/A 07/2018 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. www.ti.com EXAMPLE STENCIL DESIGN NGS0008C WSON - 0.8 mm max height PLASTIC SMALL OUTLINE - NO LEAD 8X (0.6) SYMM METAL TYP 8 1 8X (0.25) 9 SYMM (1.38) 6X (0.5) 4 5 (R0.05) TYP (1.47) (2.8) SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL EXPOSED PAD 9: 82% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SCALE:20X 4214924/A 07/2018 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com PACKAGE OUTLINE DDA0008A PowerPAD TM SOIC - 1.7 mm max height SCALE 2.400 PLASTIC SMALL OUTLINE C 6.2 TYP 5.8 SEATING PLANE PIN 1 ID AREA A 0.1 C 6X 1.27 8 1 2X 3.81 5.0 4.8 NOTE 3 4 5 B 8X 4.0 3.8 NOTE 4 0.51 0.31 0.25 1.7 MAX C A B 0.25 TYP 0.10 SEE DETAIL A 5 4 EXPOSED THERMAL PAD 0.25 GAGE PLANE 2.34 2.24 8 1 0 -8 0.15 0.00 1.27 0.40 DETAIL A 2.34 2.24 TYPICAL 4218825/A 05/2016 PowerPAD is a trademark of Texas Instruments. NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MS-012. www.ti.com EXAMPLE BOARD LAYOUT DDA0008A PowerPAD TM SOIC - 1.7 mm max height PLASTIC SMALL OUTLINE (2.95) NOTE 9 SOLDER MASK DEFINED PAD (2.34) SOLDER MASK OPENING 8X (1.55) SEE DETAILS 1 8 8X (0.6) SYMM (1.3) TYP (2.34) SOLDER MASK OPENING (4.9) NOTE 9 6X (1.27) 5 4 (R0.05) TYP METAL COVERED BY SOLDER MASK SYMM ( 0.2) TYP VIA (1.3) TYP (5.4) LAND PATTERN EXAMPLE SCALE:10X 0.07 MIN ALL AROUND 0.07 MAX ALL AROUND SOLDER MASK OPENING METAL SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED NON SOLDER MASK DEFINED SOLDER MASK DETAILS 4218825/A 05/2016 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. 8. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature numbers SLMA002 (www.ti.com/lit/slma002) and SLMA004 (www.ti.com/lit/slma004). 9. Size of metal pad may vary due to creepage requirement. 10. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. www.ti.com EXAMPLE STENCIL DESIGN DDA0008A PowerPAD TM SOIC - 1.7 mm max height PLASTIC SMALL OUTLINE (2.34) BASED ON 0.125 THICK STENCIL 8X (1.55) (R0.05) TYP 1 8 8X (0.6) (2.34) BASED ON 0.125 THICK STENCIL SYMM 6X (1.27) 5 4 METAL COVERED BY SOLDER MASK SYMM (5.4) SEE TABLE FOR DIFFERENT OPENINGS FOR OTHER STENCIL THICKNESSES SOLDER PASTE EXAMPLE EXPOSED PAD 100% PRINTED SOLDER COVERAGE BY AREA SCALE:10X STENCIL THICKNESS SOLDER STENCIL OPENING 0.1 0.125 0.150 0.175 2.62 X 2.62 2.34 X 2.34 (SHOWN) 2.14 X 2.14 1.98 X 1.98 4218825/A 05/2016 NOTES: (continued) 11. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. 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