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LM340-N/LM78XX Series 3-Terminal Positive Regulators
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1FEATURES DESCRIPTION
The LM140/LM340A/LM340-N/LM78XXC monolithic
2• Complete Specifications at 1A Load 3-terminal positive voltage regulators employ internal
• Output Voltage Tolerances of ±2% at Tj= 25°C current-limiting, thermal shutdown and safe-area
and ±4% Over the Temperature Range compensation, making them essentially indestructible.
(LM340A) If adequate heat sinking is provided, they can deliver
over 1.0A output current. They are intended as fixed
• Line Regulation of 0.01% of VOUT/V of ΔVIN at voltage regulators in a wide range of applications
1A Load (LM340A) including local (on-card) regulation for elimination of
• Load Regulation of 0.3% of VOUT/A (LM340A) noise and distribution problems associated with
• Internal Thermal Overload Protection single-point regulation. In addition to use as fixed
voltage regulators, these devices can be used with
• Internal Short-circuit Current Limit external components to obtain adjustable output
• Output Transistor Safe Area Protection voltages and currents.
• P+Product Enhancement Tested Considerable effort was expended to make the entire
series of regulators easy to use and minimize the
number of external components. It is not necessary to
bypass the output, although this does improve
transient response. Input bypassing is needed only if
the regulator is located far from the filter capacitor of
the power supply.
The 5V, 12V, and 15V regulator options are available
in the steel TO-3 power package. The
LM340A/LM340-N/LM78XXC series is available in the
TO-220 plastic power package, and the LM340-N-5.0
is available in the SOT-223 package, as well as the
LM340-5.0 and LM340-12 in the surface-mount
DDPAK/TO-263 package.
Typical Applications
*Required if the regulator is located far from the power supply filter.
**Although no output capacitor is needed for stability, it does help
transient response. (If needed, use 0.1 μF, ceramic disc). VOUT = 5V + (5V/R1 + IQ) R2 5V/R1 > 3 IQ,
load regulation (Lr)≈[(R1 + R2)/R1] (Lrof LM340-5).
Figure 1. Fixed Output Regulator Figure 2. Adjustable Output Regulator
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2000–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SOT-223 DDPAK/TO-263
LM340-N, LM78xx
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ΔIQ= 1.3 mA over line and load changes.
Figure 3. Current Regulator Figure 4. Comparison between SOT-223 and
DDPAK/TO-263 Packages
Scale 1:1
Connection Diagrams
Figure 5. DDPAK/TO-263 Surface-Mount Package Figure 6. 3-Lead SOT-223
Top View Top View
See Package Number KTT0003B See Package Number DCY
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings(1)(2)(3)
DC Input Voltage 35V
Internal Power Dissipation(4) Internally Limited
Maximum Junction Temperature 150°C
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 10 sec.) TO-3 Package (NDS) 300°C
TO-220 Package (NDE), DDPAK/TO-263
Package (KTT) 230°C
ESD Susceptibility(5) 2 kV
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Conditions are conditions under which
the device functions but the specifications might not be ensured. For ensured specifications and test conditions see the Electrical
Characteristics.
(2) Military datasheets are available upon request. At the time of printing, the military datasheet specifications for the LM140K-5.0/883,
LM140K-12/883, and LM140K-15/883 complied with the min and max limits for the respective versions of the LM140. The LM140H and
LM140K may also be procured as JAN devices on slash sheet JM38510/107.
(3) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(4) The maximum allowable power dissipation at any ambient temperature is a function of the maximum junction temperature for operation
(TJMAX = 125°C or 150°C), the junction-to-ambient thermal resistance (θJA), and the ambient temperature (TA). PDMAX = (TJMAX −
TA)/θJA. If this dissipation is exceeded, the die temperature will rise above TJMAX and the electrical specifications do not apply. If the die
temperature rises above 150°C, the device will go into thermal shutdown. For the TO-3 package (NDS), the junction-to-ambient thermal
resistance (θJA) is 39°C/W. When using a heatsink, θJA is the sum of the 4°C/W junction-to-case thermal resistance (θJC) of the TO-3
package and the case-to-ambient thermal resistance of the heatsink. For the TO-220 package (NDE), θJA is 54°C/W and θJC is 4°C/W. If
SOT-223 is used, the junction-to-ambient thermal resistance is 174°C/W and can be reduced by a heatsink (see Applications Hints on
heatsinking).If the DDPAK\TO-263 package is used, the thermal resistance can be reduced by increasing the PC board copper area
thermally connected to the package: Using 0.5 square inches of copper area, θJA is 50°C/W; with 1 square inch of copper area, θJAis
37°C/W; and with 1.6 or more inches of copper area, θJA is 32°C/W.
(5) ESD rating is based on the human body model, 100 pF discharged through 1.5 kΩ.
Operating Conditions(1)
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Conditions are conditions under which
the device functions but the specifications might not be ensured. For ensured specifications and test conditions see the Electrical
Characteristics.
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Operating Conditions(1) (continued) LM140 −55°C to +125°C
Temperature Range (TA)(2) LM340A, LM340-N 0°C to +125°C
LM7808C 0°C to +125°C
(2) The maximum allowable power dissipation at any ambient temperature is a function of the maximum junction temperature for operation
(TJMAX = 125°C or 150°C), the junction-to-ambient thermal resistance (θJA), and the ambient temperature (TA). PDMAX = (TJMAX −
TA)/θJA. If this dissipation is exceeded, the die temperature will rise above TJMAX and the electrical specifications do not apply. If the die
temperature rises above 150°C, the device will go into thermal shutdown. For the TO-3 package (NDS), the junction-to-ambient thermal
resistance (θJA) is 39°C/W. When using a heatsink, θJA is the sum of the 4°C/W junction-to-case thermal resistance (θJC) of the TO-3
package and the case-to-ambient thermal resistance of the heatsink. For the TO-220 package (NDE), θJA is 54°C/W and θJC is 4°C/W. If
SOT-223 is used, the junction-to-ambient thermal resistance is 174°C/W and can be reduced by a heatsink (see Applications Hints on
heatsinking).If the DDPAK\TO-263 package is used, the thermal resistance can be reduced by increasing the PC board copper area
thermally connected to the package: Using 0.5 square inches of copper area, θJA is 50°C/W; with 1 square inch of copper area, θJAis
37°C/W; and with 1.6 or more inches of copper area, θJA is 32°C/W.
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LM340A Electrical Characteristics
IOUT = 1A, 0°C ≤TJ≤+ 125°C (LM340A) unless otherwise specified(1)
Output Voltage 5V 12V 15V
Symbol Input Voltage (unless otherwise noted) 10V 19V 23V Units
Parameter Conditions Min Typ Max Min Typ Max Min Typ Max
VOOutput TJ= 25°C 4.9 5 5.1 11.75 12 12.25 14.7 15 15.3 V
Voltage PD≤15W, 5 mA ≤IO≤1A 4.8 5.2 11.5 12.5 14.4 15.6 V
VMIN ≤VIN ≤VMAX (7.5 ≤VIN ≤20) (14.8 ≤VIN ≤27) (17.9 ≤VIN ≤30) V
ΔVOLine IO= 500 mA 10 18 22 mV
Regulation ΔVIN (7.5 ≤VIN ≤20) (14.8 ≤VIN ≤27) (17.9 ≤VIN ≤30) V
TJ= 25°C 3 10 4 18 4 22 mV
ΔVIN (7.5 ≤VIN ≤20) (14.5 ≤VIN ≤27) (17.5 ≤VIN ≤30) V
TJ= 25°C 4 9 10 mV
Over Temperature 12 30 30 mV
ΔVIN (8 ≤VIN ≤12) (16 ≤VIN ≤22) (20 ≤VIN ≤26) V
ΔVOLoad TJ= 5 mA ≤IO≤1.5A 10 25 12 32 12 35 mV
Regulation 25°C 250 mA ≤IO≤15 19 21 mV
750 mA
Over Temperature, 25 60 75 mV
5 mA ≤IO≤1A
IQQuiescent TJ= 25°C 6 6 6 mA
Current Over Temperature 6.5 6.5 6.5 mA
ΔIQQuiescent 5 mA ≤IO≤1A 0.5 0.5 0.5 mA
Current TJ= 25°C, IO= 1A 0.8 0.8 0.8 mA
Change VMIN ≤VIN ≤VMAX (7.5 ≤VIN ≤20) (14.8 ≤VIN ≤27) (17.9 ≤VIN ≤30) V
IO= 500 mA 0.8 0.8 0.8 mA
VMIN ≤VIN ≤VMAX (8 ≤VIN ≤25) (15 ≤VIN ≤30) (17.9 ≤VIN ≤30) V
VNOutput Noise TA= 25°C, 10 Hz ≤f≤100 40 75 90 μV
Voltage kHz
Ripple TJ= 25°C, f = 120 Hz, IO= 68 80 61 72 60 70 dB
Rejection 1A
or f = 120 Hz, IO= 500 mA, 68 61 60 dB
Over Temperature,
VMIN ≤VIN ≤VMAX (8 ≤VIN ≤18) (15 ≤VIN ≤25) (18.5 ≤VIN ≤28.5) V
RODropout TJ= 25°C, IO= 1A 2.0 2.0 2.0 V
Voltage
Output f = 1 kHz 8 18 19 mΩ
Resistance
Short-Circuit TJ= 25°C 2.1 1.5 1.2 A
Current
Peak Output TJ= 25°C 2.4 2.4 2.4 A
Current
Average TC Min, TJ= 0°C, IO= 5 mA −0.6 −1.5 −1.8 mV/°C
of VO
VIN Input Voltage TJ= 25°C
Required to 7.5 14.5 17.5 V
Maintain Line
Regulation
(1) All characteristics are measured with a 0.22 μF capacitor from input to ground and a 0.1 μF capacitor from output to ground. All
characteristics except noise voltage and ripple rejection ratio are measured using pulse techniques (tw≤10 ms, duty cycle ≤5%).
Output voltage changes due to changes in internal temperature must be taken into account separately.
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LM140 Electrical Characteristics(1)
−55°C ≤TJ≤+150°C unless otherwise specified
Output Voltage 5V 12V 15V
Symb Input Voltage (unless otherwise noted) 10V 19V 23V Units
ol Parameter Conditions Min Typ Max Min Typ Max Min Typ Max
VOOutput Voltage TJ= 25°C, 5 mA ≤IO≤1A 4.8 5 5.2 11.5 12 12.5 14.4 15 15.6 V
PD≤15W, 5 mA ≤IO≤1A 4.75 5.25 11.4 12.6 14.25 15.75 V
VMIN ≤VIN ≤VMAX (8 ≤VIN ≤20) (15.5 ≤VIN ≤27) (18.5 ≤VIN ≤30) V
ΔVOLine IO= 500 TJ= 25°C 3 50 4 120 4 150 mV
Regulation mA ΔVIN (7 ≤VIN ≤25) (14.5 ≤VIN ≤30) (17.5 ≤VIN ≤30) V
−55°C ≤TJ≤50 120 150 mV
+150°C
ΔVIN (8 ≤VIN ≤20) (15 ≤VIN ≤27) (18.5 ≤VIN ≤30) V
IO≤1A TJ= 25°C 50 120 150 mV
ΔVIN (7.5 ≤VIN ≤20) (14.6 ≤VIN ≤27) (17.7 ≤VIN ≤30) V
−55°C ≤TJ≤25 60 75 mV
+150°C
ΔVIN (8 ≤VIN ≤12) (16 ≤VIN ≤22) (20 ≤VIN ≤26) V
ΔVOLoad TJ= 5 mA ≤IO≤10 50 12 120 12 150 mV
Regulation 25°C 1.5A
250 mA ≤IP≤25 60 75 mV
750 mA
−55°C ≤TJ≤+150°C, 50 120 150 mV
5 mA ≤IO≤1A
IQQuiescent IO≤1A TJ= 25°C 6 6 6 mA
Current −55°C ≤TJ≤7 7 7 mA
+150°C
ΔIQQuiescent 5 mA ≤IO≤1A 0.5 0.5 0.5 mA
Current TJ= 25°C, IO≤1A 0.8 0.8 0.8 mA
Change VMIN ≤VIN ≤VMAX (8 ≤VIN ≤20) (15 ≤VIN ≤27) (18.5 ≤VIN ≤30) V
IO= 500 mA, −55°C ≤TJ≤0.8 0.8 0.8 mA
+150°C
VMIN ≤VIN ≤VMAX (8 ≤VIN ≤25) (15 ≤VIN ≤30) (18.5 ≤VIN ≤30) V
VNOutput Noise TA= 25°C, 10 Hz ≤f≤100 40 75 90 μV
Voltage kHz
Ripple f = 120 IO≤1A, TJ= 68 80 61 72 60 70 dB
Rejection Hz 25°C or
IO≤500 mA, 68 61 60 dB
−55°C ≤TJ
≤+150°C
VMIN ≤VIN ≤VMAX (8 ≤VIN ≤18) (15 ≤VIN ≤25) (18.5 ≤VIN ≤28.5) V
RODropout TJ= 25°C, IO= 1A 2.0 2.0 2.0 V
Voltage
Output f = 1 kHz 8 18 19 mΩ
Resistance
Short-Circuit TJ= 25°C 2.1 1.5 1.2 A
Current
Peak Output TJ= 25°C 2.4 2.4 2.4 A
Current
Average TC of 0°C ≤TJ≤+150°C, IO= 5 −0.6 −1.5 −1.8 mV/°C
VOUT mA
(1) All characteristics are measured with a 0.22 μF capacitor from input to ground and a 0.1 μF capacitor from output to ground. All
characteristics except noise voltage and ripple rejection ratio are measured using pulse techniques (tw≤10 ms, duty cycle ≤5%).
Output voltage changes due to changes in internal temperature must be taken into account separately.
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LM140 Electrical Characteristics(1) (continued)
−55°C ≤TJ≤+150°C unless otherwise specified
Output Voltage 5V 12V 15V
Symb Input Voltage (unless otherwise noted) 10V 19V 23V Units
ol Parameter Conditions Min Typ Max Min Typ Max Min Typ Max
VIN Input Voltage TJ= 25°C, IO≤1A
Required to 7.5 14.6 17.7 V
Maintain Line
Regulation
LM340-N Electrical Characteristics(1)
0°C ≤TJ≤+125°C unless otherwise specified
Output Voltage 5V 12V 15V
Symbol Input Voltage (unless otherwise noted) 10V 19V 23V Units
Parameter Conditions Min Typ Max Min Typ Max Min Typ Max
VOOutput Voltage TJ= 25°C, 5 mA ≤IO≤1A 4.8 5 5.2 11.5 12 12.5 14.4 15 15.6 V
PD≤15W, 5 mA ≤IO≤1A 4.75 5.25 11.4 12.6 14.25 15.75 V
VMIN ≤VIN ≤VMAX (7.5 ≤VIN ≤20) (14.5 ≤VIN ≤27) (17.5 ≤VIN ≤30) V
ΔVOLine Regulation IO= 500 TJ= 25°C 3 50 4 120 4 150 mV
mA ΔVIN (7 ≤VIN ≤25) (14.5 ≤VIN ≤30) (17.5 ≤VIN ≤30) V
0°C ≤TJ≤50 120 150 mV
+125°C
ΔVIN (8 ≤VIN ≤20) (15 ≤VIN ≤27) (18.5 ≤VIN ≤30) V
IO≤1A TJ= 25°C 50 120 150 mV
ΔVIN (7.5 ≤VIN ≤20) (14.6 ≤VIN ≤27) (17.7 ≤VIN ≤30) V
0°C ≤TJ≤25 60 75 mV
+125°C
ΔVIN (8 ≤VIN ≤12) (16 ≤VIN ≤22) (20 ≤VIN ≤26) V
ΔVOLoad Regulation TJ= 5 mA ≤IO≤10 50 12 120 12 150 mV
25°C 1.5A
250 mA ≤IO≤25 60 75 mV
750 mA
5 mA ≤IO≤1A, 0°C ≤TJ50 120 150 mV
≤+125°C
IQQuiescent IO≤1A TJ= 25°C 8 8 8 mA
Current 0°C ≤TJ≤8.5 8.5 8.5 mA
+125°C
ΔIQQuiescent 5 mA ≤IO≤1A 0.5 0.5 0.5 mA
Current Change TJ= 25°C, IO≤1A 1.0 1.0 1.0 mA
VMIN ≤VIN ≤VMAX (7.5 ≤VIN ≤20) (14.8 ≤VIN ≤27) (17.9 ≤VIN ≤30) V
IO≤500 mA, 0°C ≤TJ≤1.0 1.0 1.0 mA
+125°C
VMIN ≤VIN ≤VMAX (7 ≤VIN ≤25) (14.5 ≤VIN ≤30) (17.5 ≤VIN ≤30) V
VNOutput Noise TA= 25°C, 10 Hz ≤f≤40 75 90 μV
Voltage 100 kHz
Ripple Rejection IO≤1A, TJ= 62 80 55 72 54 70 dB
25°C
f = 120 or IO≤500 62 55 54 dB
Hz mA,
0°C ≤TJ≤
+125°C
VMIN ≤VIN ≤VMAX (8 ≤VIN ≤18) (15 ≤VIN ≤25) (18.5 ≤VIN ≤28.5) V
(1) All characteristics are measured with a 0.22 μF capacitor from input to ground and a 0.1 μF capacitor from output to ground. All
characteristics except noise voltage and ripple rejection ratio are measured using pulse techniques (tw≤10 ms, duty cycle ≤5%).
Output voltage changes due to changes in internal temperature must be taken into account separately.
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LM340-N Electrical Characteristics(1) (continued)
0°C ≤TJ≤+125°C unless otherwise specified
Output Voltage 5V 12V 15V
Symbol Input Voltage (unless otherwise noted) 10V 19V 23V Units
Parameter Conditions Min Typ Max Min Typ Max Min Typ Max
RODropout Voltage TJ= 25°C, IO= 1A 2.0 2.0 2.0 V
Output f = 1 kHz 8 18 19 mΩ
Resistance
Short-Circuit TJ= 25°C 2.1 1.5 1.2 A
Current
Peak Output TJ= 25°C 2.4 2.4 2.4 A
Current
Average TC of 0°C ≤TJ≤+125°C, IO= 5 −0.6 −1.5 −1.8 mV/°C
VOUT mA
VIN Input Voltage TJ= 25°C, IO≤1A
Required to 7.5 14.6 17.7 V
Maintain Line
Regulation
LM7808C
Electrical Characteristics
0°C ≤TJ≤+150°C, VI= 14V, IO= 500 mA, CI= 0.33 μF, CO= 0.1 μF, unless otherwise specified
Symbol Parameter Conditions(1) LM7808C Units
Min Typ Max
VOOutput Voltage TJ= 25°C 7.7 8.0 8.3 V
ΔVOLine Regulation TJ= 25°C 10.5V ≤VI≤25V 6.0 160 mV
11.0V ≤VI≤17V 2.0 80
ΔVOLoad Regulation TJ= 25°C 5.0 mA ≤IO≤1.5A 12 160 mV
250 mA ≤IO≤750 mA 4.0 80
VOOutput Voltage 11.5V ≤VI≤23V, 5.0 mA ≤IO≤1.0A, P ≤15W 7.6 8.4 V
IQQuiescent Current TJ= 25°C 4.3 8.0 mA
ΔIQQuiescent With Line 11.5V ≤VI≤25V 1.0 mA
Current Change With Load 5.0 mA ≤IO≤1.0A 0.5
VNNoise TA= 25°C, 10 Hz ≤f≤100 kHz 52 μV
ΔVI/ΔVORipple Rejection f = 120 Hz, IO= 350 mA, TJ= 25°C 56 72 dB
VDO Dropout Voltage IO= 1.0A, TJ= 25°C 2.0 V
ROOutput Resistance f = 1.0 kHz 16 mΩ
IOS Output Short Circuit Current TJ= 25°C, VI= 35V 0.45 A
IPK Peak Output Current TJ= 25°C 2.2 A
ΔVO/ΔT Average Temperature Coefficient of IO= 5.0 mA 0.8 mV/°C
Output Voltage
(1) All characteristics are measured with a 0.22 μF capacitor from input to ground and a 0.1 μF capacitor from output to ground. All
characteristics except noise voltage and ripple rejection ratio are measured using pulse techniques (tw≤10 ms, duty cycle ≤5%).
Output voltage changes due to changes in internal temperature must be taken into account separately.
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Typical Performance Characteristics
Maximum Average Power Dissipation Maximum Average Power Dissipation
Figure 7. Figure 8.
Maximum Power Dissipation (DDPAK/TO-263)
(See Note 2) Output Voltage (Normalized to 1V at TJ= 25°C)
Shaded area refers to LM340A/LM340-N, LM7805C, LM7812C and
LM7815C.
Figure 9. Figure 10.
Ripple Rejection Ripple Rejection
Figure 11. Figure 12.
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Typical Performance Characteristics (continued)
Output Impedance Dropout Characteristics
Figure 13. Figure 14.
Quiescent Current Peak Output Current
Shaded area refers to LM340A/LM340-N, LM7805C, LM7812C and
LM7815C. Figure 15. Figure 16.
Dropout Voltage Quiescent Current
Shaded area refers to LM340A/LM340-N, LM7805C, LM7812C and
LM7815C. Figure 17. Figure 18.
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Typical Performance Characteristics (continued)
Line Regulation Line Regulation
140AK-5.0, IOUT = 1A, TA= 25°C 140AK-5.0, VIN = 10V, TA= 25°C
Figure 19. Figure 20.
Equivalent Schematic
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APPLICATION HINTS
The LM340-N/LM78XX series is designed with thermal protection, output short-circuit protection and output
transistor safe area protection. However, as with any IC regulator, it becomes necessary to take precautions to
assure that the regulator is not inadvertently damaged. The following describes possible misapplications and
methods to prevent damage to the regulator.
SHORTING THE REGULATOR INPUT
When using large capacitors at the output of these regulators, a protection diode connected input to output
(Figure 21) may be required if the input is shorted to ground. Without the protection diode, an input short will
cause the input to rapidly approach ground potential, while the output remains near the initial VOUTbecause of the
stored charge in the large output capacitor. The capacitor will then discharge through a large internal input to
output diode and parasitic transistors. If the energy released by the capacitor is large enough, this diode, low
current metal and the regulator will be destroyed. The fast diode in Figure 21 will shunt most of the capacitors
discharge current around the regulator. Generally no protection diode is required for values of output capacitance
≤10 μF.
RAISING THE OUTPUT VOLTAGE ABOVE THE INPUT VOLTAGE
Since the output of the device does not sink current, forcing the output high can cause damage to internal low
current paths in a manner similar to that just described in the “Shorting the Regulator Input” section.
REGULATOR FLOATING GROUND (Figure 22)
When the ground pin alone becomes disconnected, the output approaches the unregulated input, causing
possible damage to other circuits connected to VOUT. If ground is reconnected with power “ON”, damage may
also occur to the regulator. This fault is most likely to occur when plugging in regulators or modules with on card
regulators into powered up sockets. Power should be turned off first, thermal limit ceases operating, or ground
should be connected first if power must be left on.
TRANSIENT VOLTAGES
If transients exceed the maximum rated input voltage of the device, or reach more than 0.8V below ground and
have sufficient energy, they will damage the regulator. The solution is to use a large input capacitor, a series
input breakdown diode, a choke, a transient suppressor or a combination of these.
Figure 21. Input Short
Figure 22. Regulator Floating Ground
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Figure 23. Transients
When a value for θ(H–A) is found using the equation shown, a heatsink must be selected that has a value that is
less than or equal to this number.
θ(H–A) is specified numerically by the heatsink manufacturer in this catalog, or shown in a curve that plots
temperature rise vs power dissipation for the heatsink.
HEATSINKING DDPAK/TO-263 AND SOT-223 PACKAGE PARTS
Both the DDPAK/TO-263 (KTT) and SOT-223 (DCY) packages use a copper plane on the PCB and the PCB
itself as a heatsink. To optimize the heat sinking ability of the plane and PCB, solder the tab of the plane.
shows for the DDPAK/TO-263 the measured values of θ(J–A) for different copper area sizes using a typical PCB
with 1 ounce copper and no solder mask over the copper area used for heatsinking.
Figure 24. θ(J–A) vs Copper (1 ounce) Area for the DDPAK/TO-263 Package
As shown in the figure, increasing the copper area beyond 1 square inch produces very little improvement. It
should also be observed that the minimum value of θ(J–A) for the DDPAK/TO-263 package mounted to a PCB is
32°C/W.
As a design aid, Figure 25 shows the maximum allowable power dissipation compared to ambient temperature
for the DDPAK/TO-263 device (assuming θ(J–A) is 35°C/W and the maximum junction temperature is 125°C).
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Figure 25. Maximum Power Dissipation vs TAMB for the DDPAK/TO-263 Package
Figure 26 and Figure 27 show the information for the SOT-223 package. Figure 26 assumes a θ(J–A) of 74°C/W
for 1 ounce copper and 51°C/W for 2 ounce copper and a maximum junction temperature of 125°C.
Figure 26. θ(J–A) vs Copper (2 ounce) Area
for the SOT-223 Package
Figure 27. Maximum Power Dissipation vs
TAMB for the SOT-223 Package
Please see AN-1028 (SNVA036) for power enhancement techniques to be used with the SOT-223 package.
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0.1 PF
0.22 PF
OUTPUTINPUT
GND
VO
VI
0.1 PF
(NOTE 1)
0.22 PF
OUTPUTINPUT
GND
VO
VI
0.1 PF0.22 PF
OUTPUTINPUT
GND
VO
VI++
LM340-N, LM78xx
SNOSBT0I –FEBRUARY 2000–REVISED MARCH 2013
www.ti.com
Typical Applications
Bypass capacitors are recommended for optimum stability and transient response, and should be located as close as
possible to the regulator.
Figure 28. Fixed Output Regulator
Figure 29. High Input Voltage Circuits
14 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated
Product Folder Links: LM340-N LM78xx
0.1 PF
0.22 PF
OUTPUT
INPUT
GND
OUT
R1
3.0:
Q1
2N6132
IN
RSC
Q2
2N6124
0.1 PF
0.22 PF
OUTPUT
INPUT
GND
VO
R1
3.0:
Q1
2N6133
IO MAX
IQ1
IREG
VI
LM340-N, LM78xx
www.ti.com
SNOSBT0I –FEBRUARY 2000–REVISED MARCH 2013
Figure 30. High Current Voltage Regulator
Figure 31. High Output Current, Short Circuit Protected
Copyright © 2000–2013, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Links: LM340-N LM78xx
LM340-N, LM78xx
www.ti.com
SNOSBT0I –FEBRUARY 2000–REVISED MARCH 2013
REVISION HISTORY
Changes from Revision H (March 2013) to Revision I Page
• Changed layout of National Data Sheet to TI format .......................................................................................................... 16
Copyright © 2000–2013, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Links: LM340-N LM78xx
PACKAGE OPTION ADDENDUM
www.ti.com 1-Nov-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM340AT-5.0 NRND TO-220 NDE 3 45 TBD Call TI Call TI 0 to 70 LM340AT
5.0 P+
LM340AT-5.0/NOPB ACTIVE TO-220 NDE 3 45 Pb-Free (RoHS
Exempt) CU SN Level-1-NA-UNLIM 0 to 70 LM340AT
5.0 P+
LM340K-5.0 ACTIVE TO-3 NDS 2 50 TBD Call TI Call TI 0 to 70 LM340K
-5.0 7805P+
LM340K-5.0/NOPB ACTIVE TO-3 NDS 2 50 Green (RoHS
& no Sb/Br) POST-PLATE Level-1-NA-UNLIM 0 to 70 LM340K
-5.0 7805P+
LM340MP-5.0 NRND SOT-223 DCY 4 1000 TBD Call TI Call TI 0 to 70 N00A
LM340MP-5.0/NOPB ACTIVE SOT-223 DCY 4 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 N00A
LM340MPX-5.0/NOPB ACTIVE SOT-223 DCY 4 2000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 N00A
LM340S-12/NOPB ACTIVE DDPAK/
TO-263 KTT 3 45 Pb-Free (RoHS
Exempt) CU SN Level-3-245C-168 HR 0 to 70 LM340S
-12 P+
LM340S-5.0 NRND DDPAK/
TO-263 KTT 3 45 TBD Call TI Call TI 0 to 70 LM340S
-5.0 P+
LM340S-5.0/NOPB ACTIVE DDPAK/
TO-263 KTT 3 45 Pb-Free (RoHS
Exempt) CU SN Level-3-245C-168 HR 0 to 70 LM340S
-5.0 P+
LM340SX-12 NRND DDPAK/
TO-263 KTT 3 500 TBD Call TI Call TI 0 to 70 LM340S
-12 P+
LM340SX-12/NOPB ACTIVE DDPAK/
TO-263 KTT 3 500 Pb-Free (RoHS
Exempt) CU SN Level-3-245C-168 HR 0 to 70 LM340S
-12 P+
LM340SX-5.0 NRND DDPAK/
TO-263 KTT 3 500 TBD Call TI Call TI 0 to 70 LM340S
-5.0 P+
LM340SX-5.0/NOPB ACTIVE DDPAK/
TO-263 KTT 3 500 Pb-Free (RoHS
Exempt) CU SN Level-3-245C-168 HR 0 to 70 LM340S
-5.0 P+
LM340T-12 NRND TO-220 NDE 3 45 TBD Call TI Call TI 0 to 70 LM340T12
7812 P+
LM340T-12/NOPB ACTIVE TO-220 NDE 3 45 Green (RoHS
& no Sb/Br) CU SN Level-1-NA-UNLIM 0 to 70 LM340T12
7812 P+
LM340T-15 NRND TO-220 NDE 3 45 TBD Call TI Call TI 0 to 70 LM340T15
7815 P+
PACKAGE OPTION ADDENDUM
www.ti.com 1-Nov-2013
Addendum-Page 2
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM340T-15/NOPB ACTIVE TO-220 NDE 3 45 Green (RoHS
& no Sb/Br) CU SN Level-1-NA-UNLIM 0 to 70 LM340T15
7815 P+
LM340T-5.0 NRND TO-220 NDE 3 45 TBD Call TI Call TI 0 to 70 LM340T5
7805 P+
LM340T-5.0/LF01 ACTIVE TO-220 NDG 3 45 Pb-Free (RoHS
Exempt) CU SN Level-4-260C-72 HR LM340T5
7805 P+
LM340T-5.0/NOPB ACTIVE TO-220 NDE 3 45 Pb-Free (RoHS
Exempt) CU SN Level-1-NA-UNLIM 0 to 70 LM340T5
7805 P+
LM7812CT NRND TO-220 NDE 3 45 TBD Call TI Call TI 0 to 70 LM340T12
7812 P+
LM7812CT/NOPB ACTIVE TO-220 NDE 3 45 Green (RoHS
& no Sb/Br) CU SN Level-1-NA-UNLIM 0 to 70 LM340T12
7812 P+
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
PACKAGE OPTION ADDENDUM
www.ti.com 1-Nov-2013
Addendum-Page 3
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM340MP-5.0 SOT-223 DCY 4 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3
LM340MP-5.0/NOPB SOT-223 DCY 4 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3
LM340MPX-5.0/NOPB SOT-223 DCY 4 2000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3
LM340SX-12 DDPAK/
TO-263 KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2
LM340SX-12/NOPB DDPAK/
TO-263 KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2
LM340SX-5.0 DDPAK/
TO-263 KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2
LM340SX-5.0/NOPB DDPAK/
TO-263 KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2
PACKAGE MATERIALS INFORMATION
www.ti.com 8-Apr-2013
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM340MP-5.0 SOT-223 DCY 4 1000 367.0 367.0 35.0
LM340MP-5.0/NOPB SOT-223 DCY 4 1000 367.0 367.0 35.0
LM340MPX-5.0/NOPB SOT-223 DCY 4 2000 367.0 367.0 35.0
LM340SX-12 DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0
LM340SX-12/NOPB DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0
LM340SX-5.0 DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0
LM340SX-5.0/NOPB DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0
PACKAGE MATERIALS INFORMATION
www.ti.com 8-Apr-2013
Pack Materials-Page 2
MECHANICAL DATA
NDS0002A
www.ti.com
MECHANICAL DATA
NDE0003B
www.ti.com
MECHANICAL DATA
NDG0003F
www.ti.com
T03F (Rev B)
MECHANICAL DATA
MPDS094A – APRIL 2001 – REVISED JUNE 2002
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DCY (R-PDSO-G4) PLASTIC SMALL-OUTLINE
4202506/B 06/2002
6,30 (0.248)
6,70 (0.264)
2,90 (0.114)
3,10 (0.122)
6,70 (0.264)
7,30 (0.287) 3,70 (0.146)
3,30 (0.130)
0,02 (0.0008)
0,10 (0.0040)
1,50 (0.059)
1,70 (0.067)
0,23 (0.009)
0,35 (0.014)
1 2 3
4
0,66 (0.026)
0,84 (0.033)
1,80 (0.071) MAX
Seating Plane
0°–10°
Gauge Plane
0,75 (0.030) MIN
0,25 (0.010)
0,08 (0.003)
0,10 (0.004) M
2,30 (0.091)
4,60 (0.181) M
0,10 (0.004)
NOTES: A. All linear dimensions are in millimeters (inches).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion.
D. Falls within JEDEC TO-261 Variation AA.
MECHANICAL DATA
KTT0003B
www.ti.com
BOTTOM SIDE OF PACKAGE
TS3B (Rev F)
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