M40Z300AVMQ1E - STMicroelectronics

1/20March 2004

M40Z300AV

3V NVRAM Supervisor for Up to 8 LPSRAMs

FEATURES SUMMARY

■CONVERTS LOW POWER SRAM INTO

NVRAMs

■PRECISION POWER MONIT ORING AND

POWER SWIT CHING CIRCUITRY

■AUTOMAT IC WRITE-PROT ECTION WHEN

VCC IS OUT-OF-T OLE RA N CE

■TWO -INPUT DECODER ALLOWS

C ONTR OL FOR UP TO 8 SRAMs (with 2

devices active in parallel)

■SUPPLY VOLT AGE AND PO WE R- FAIL

DESELECT VOLTAG E:

– M40Z300AV:

VCC = 3.0V to 3.6V

THS = VSS: 2. 8 V ≤ VPFD ≤ 3.0V

■RESET OUTPUT (RST) F OR POWER ON

RESET

■BATTE RY LOW PIN (BL)

■LESS THAN 20ns CH IP EN ABL E AC CESS

PROPAGATION DEL AY

■PACKAGING INCL UDES A 16-LEAD SOIC

OR A 28-LEAD SOIC AND SNAPHAT® TOP

(to be ordered separately)

■SOIC PACKAGE PROVIDES DIRECT

CONNECTION FOR A SNAP HAT TOP

WHICH CO NTAIN S THE BATTERY

Figu re 1. 16- pi n S OI C Package

Figu re 2. 28- pi n S OI C Package*

16

1

SO16 (MQ)

28

1

SOH28 (MH)

SNAPHAT (SH)

Crystal/Battery

M40Z300AV

2/20

TABLE OF CONTENTS

FEATUR ES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Figure 1. 16-pin SOIC Packag e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Figure 2. 28-pin SOIC Packag e*. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Figure 3. Logi c Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Table 1. Signa l Na mes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Figure 4. 28-pin S O IC Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 5. M40Z300AV 16-pin SO IC Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 6. Hardware Hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Two to Four Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 2. Truth Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 7. A ddres s-Dec ode Time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Data Re tention Lifetime Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7

Po wer-o n Reset Ou tput . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Batte ry Low Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

VCC Noise And Negative Going Transients . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 8. Suppl y Voltage Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

MAXIMU M RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 3. Absolute Maximum Rati ngs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

DC AND AC PARAM ETERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 4. DC and AC Measurem ent Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 9. A C Testing Load Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 0

Table 5. Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 0

Table 6. DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1

Figure 10.Power Down Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 11.Power Up Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2

Table 7. Power Down/Up Mode AC Characte ristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

PACKAGE MECHANICAL INFORMATIO N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 12. SOH28 – 28-lead Plastic Small Outli ne, 4-socket battery SNAPHA T, Package Outline. 14

Table 8. SOH28 – 28-lead Plastic Small Outline, battery SNAPHAT, Package M echanical Data 14

Figure 13.SH – 4-pin SNAPHA T Housing for 48mAh Ba ttery, Package Outline. . . . . . . . . . . . . . . 15

Table 9. S H – 4-pin SNAPHA T Housing for 48mAh Battery, Packag e Mechani cal Data . . . . . . . 15

Figure 14.SH – 4-pin SNAPHA T Housing for 120mAh B attery, Package Outline. . . . . . . . . . . . . . 16

Table 10. SH – 4-pin SNAPH AT Housing for 120mAh B attery, Package Mechanical Data . . . . . . 16

Figure 15.SO16 – 16-lead Plastic Small Outline, 150 mils body width, Package Out lin e . . . . . . . . 17

Table 11. SO16 – 16-lead Plastic Smal l Outline, 150 mils body width, Package Mec hanical Data 17

3/20

M40Z300AV

PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Table 12. Ordering Information Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Table 13. SNAPHAT® Battery Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

REVISION HISTO RY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Table 14. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

M40Z300AV

4/20

DESCRIPTION

The M40Z300AV NVRAM SUPERVISOR is a self -

contained device which converts a standard low-

power SRAM into a non-vol atile m em ory. A preci-

sion voltage reference and comparator monitors

the VCC input for an out-of-tolerance condition.

When an invalid VCC con dition occurs, t he condi-

tioned chip enable outputs (E1CON to E4CON) are

forced inactive to write-protect the stored data in

the SRAM. During a power failure, the SRAM is

switched from the VCC pin to the lithium cell within

the SNAPHAT® to provide the energy required for

data retention. On a subsequent power-up, the

SRAM rem ain s write prot ect ed un til a valid power

condition returns.

The 28-pin, 330mil SOIC provides sockets with

gold plated contacts for direct connecti on to a sep-

arate SNAPHAT housing containing the battery.

The SNAPHAT housing has gold plated pins

which mate with the sockets, ensuring reliable

connection. The housing is keyed to prevent im-

proper insertion. This unique design allows the

SNAPHA T battery p ac kage t o be mounted on top

of the SOIC package after the completion of the

surface mount process which g reatly reduces the

board manufac turin g process complexity of either

directly soldering or inserting a battery into a sol-

dered holder. Providing non-volatility becomes a

“SNAP.” The 16- pin SOIC provides battery pins for

an external user-supplied battery.

Insertion of the SNAPHAT housing after reflow

prevents potential battery dam age due to the high

temperatures required for device surface-mount-

ing. The S NAPHA T housing is also k eyed to pre-

vent reverse insertion.

The 28-pin SOIC and battery packages are

shipped separately in plastic anti-static tubes or in

Tape & Reel form. For the 28-lead SOIC, the bat-

tery/crystal package (e.g., SNAPHAT) part num-

ber is “M4ZXX-BR00SH” (see Table

13., page 18).

Caution: Do not place the SNAPHAT battery top

in conductive foam, as this will drain the lithium

button-cell bat tery.

Figure 3. Logic Diagram

Note: 1. For 16 -pin SO IC package only.

2. THS pin m ust be co nnecte d to VSS.

Table 1. Signal Names

Note: 1. THS pi n m ust be co nnected to VSS.

2. For M40Z3 00AV , B – mu st be conn ecte d to t he ne gat ive

battery t erminal on l y (n ot to P i n 8, V SS).

AI08893

THS

(2)

VCC

M40Z300AV

BL

VSS

E

VOUT

B

A

E1CON

E2CON

E3CON

E4CON

RST

B+

(1)

B–

(1)

THS(1) Threshold Select Input

EChip Enable Input

E1CON - E4CON Conditioned Chip Enable

Output

A, B Decoder Inputs

RST Reset Output (Open Drain)

BL Battery Low Output (Open

Drain)

VOUT Supply Voltage Output

VCC Supply Voltage

VSS Ground

B + Positive Battery Pin

B –(2) Negative Battery Pin

NC Not Connected Internally

5/20

M40Z300AV

Figure 4. 28-pin SOIC Connections Figure 5. M40Z300AV 16-pin SOIC

Connections

Note : 1. For M40Z 300A V, B– mu st be c onnec ted t o the ne gativ e

battery t erminal on l y (n ot to P i n 8, V SS).

Figure 6. Hardware Hookup

Note: 1. If the second ch ip enable pi n (E 2) is unused, it sh ould be ti ed t o VOUT.

2. THS pin m ust be co nnecte d to VSS.

AI08894

8

2

3

4

5

6

7

9

10

11

12

13

14

22

21

20

19

18

17

16

15

28

27

26

25

24

23

1

NC

BL

NC

A

NC

B

RST

NC

E1CON

NC

E3CON

E

E2CON

NC

NCNC

THS NCVSS E4CON

NC

VOUT VCC

M40Z300AV

AI08895

8

2

3

4

5

6

710

16

15

14

13

12

11

1

A

RST

BE1CON

E

E2CON

B+

VSS

NC

VOUT VCC

M40Z300AV

BL

THS E3CON

E4CON

9

B–

(1)

AI08896

V

CC

E

E2

(1)

E1

CON

V

SS

V

OUT

V

CC

CMOS

SRAM

3.3V

THS

(2)

A

0.1µF

M40Z300AV

Threshold

E

BE2

CON

E3

CON

E4

CON

RST

BL

E2

(1)

E2

(1)

E2

(1)

E

V

CC

CMOS

SRAM

0.1µF

E

V

CC

CMOS

SRAM

0.1µF

E

V

CC

CMOS

SRAM

0.1µF

To Microprocessor

To Battery Monitor Circuit

M40Z300AV

6/20

OPERATION

The M40Z300AV, as shown in Figure 6., page 5,

can control up to four (eight, if placed in parallel)

standard low-power SRA Ms. T hese SRA Ms mu st

be configured to have the chip enable input dis-

able all ot her input signal s. Most slow, l ow-power

SRAMs are configured like this, however many

fast SRAMs are not. During nor mal operating con-

ditions, the conditioned chip enable (E1CON to

E4CON) output pins follow the chip enable (E) input

pin with timing shown in Figure 7., page 6 and Ta-

ble 7., page 13. An internal switch connects VCC

to VOUT. This switch has a voltage drop of less

than 0.3V (IOUT1).

When VCC degrades during a power failure,

E1CON to E4CON a re forced inactive independent

of E. In this situat ion, the SRAM is unconditionally

write protected as VCC f alls bel ow an out-of-toler-

ance threshold (VPFD). For the M40Z300AV, the

THS pin must be tied to ground (as shown in Table

6., page 11).

If chip enable access is in progress during a power

fail detection, that memory cycle continues to com-

pletion before the memory is write protected. If the

memory cycle is not terminated within time tWPT,

E1CON to E4CON are unconditionally driven high,

write protecting the SRAM . A power fa ilure during

a WRITE cycle may corrupt data at the currently

addressed location, but does not jeopardize the

rest of the SRAM's contents. At voltages below

VPFD (min), th e user can be assured the memory

will be write protected within the Write Protect

Time (tWPT) provided the VCC fall t ime ex ceeds tF

(see Figure 7., page 6).

As VCC continues to degrade, the internal switch

disconnects VCC and connects t he i nternal batt ery

to VOUT. This occurs at the switchover voltage

(VSO). Below the VSO, t he bat tery provides a volt-

age VOHB to the SRAM and can supply current

IOUT2 (se e Table 6., page 11).

When VCC rises above VSO, VOUT is switched

back to the supply voltage. Outputs E1CON to

E4CON are held inactive for tCER (120ms maxi-

mum) after the power supply has reached VPFD,

independent of t he E input, to allow for processor

stabilization (see Figure 11., page 12).

Two to Four Decode

The M40Z300AV includes a 2 input (A, B) decoder

which allows the control of up to 4 independent

SRAMs. The Truth Table for these inputs is shown

in Table 2.

Tabl e 2. Trut h Table

Figure 7. Address-Deco de Time

Note: During system design, compliance with the SRAM timing parameters must comprehend the propagation delay between E1CON -

E4CON.

Inputs Outputs

EBA

E1CON E2CON E3CON E4CON

HXXHHHH

LLLLHHH

LLHHLHH

LHLHHLH

LHHHHHL

AI02551

A, B

E

E1CON - E4CON

tAS

tEDH

tEDL

7/20

M40Z300AV

Data Reten tion Lifetime Calculation

Most low po wer SRAMs on the market today can

be used wi th the M40Z300AV NVRAM SUPERVI-

SOR. There are, however some criteria which

should be used i n making the f inal choice of which

SRAM to use. The SRAM must b e designed in a

way where the chip enable input di sables all other

inputs to the SRAM. This allows inputs to the

M40Z300AV and SRAMs to be “Don't care” once

VCC falls below VPFD(min). The SRAM should also

guarantee dat a r etention down to VCC = 2.0V. The

chip enable access time must be sufficient to meet

the system needs with the chip enable propaga-

tion delays i ncluded. If the SR AM includes a sec-

ond chip enable pin (E2), this pin should be tied to

VOUT.

If data rete ntio n lifetime is a critical pa rameter for

th e syste m, it i s im portant t o revi ew the dat a rete n-

tion current specifications for the particular

SRAMs being evaluated. Most SRAMs specify a

data retention current at 3.0V. Manuf acturers gen-

erally specify a ty pical condition for room temper-

ature along with a wors t case con dition (gen erally

at elevated temperatures). The system level re-

quirements will determine the choice of which val-

ue to use.

The data retention current value of the SRAMs can

then be added to the I BAT value of the M40Z300AV

to determine the total current requirements for

data retention. The available battery capacity for

the SNAPHAT® of your choice can then be divided

by this current to determine the amount of data re-

tention availabl e (see Table 13., page 18).

CAUTION: Take care to avoid inadvertent dis-

charge through VOUT and E1CON - E4CON after

battery has been at tached.

For a further more detailed review of lifetime calcu-

lations, please see Application Note AN1012.

Power-on Reset Ou tput

All microprocessors have a reset input which forc-

es them to a known state when starting. The

M40Z300A V has a reset output (RST) pin which is

guaranteed to be low within tWPT of VPFD (see Ta-

ble 7., page 13 ). This s ignal is an open drain con-

figuration. An appropriate pull-up resistor should

be chosen to control the rise time. This signal will

be valid for all voltage conditions, even when VCC

equals VSS.

Once VCC exceeds the power failure detect volt-

age VPFD, an internal timer keeps RST low for

tREC to all ow the power supply to stabilize.

Battery Low Pin

The M40Z300AV automatically performs battery

voltage monitoring upon power-up, and at factory-

programmed time intervals of at least 24 hours.

The Battery Low (BL) pin will be asserted if the

battery voltage is found to be less than approxi-

mately 2.5V. The BL pi n will rema in asserte d until

completion of battery replacement and subse-

quent battery low monitoring tests, either during

the next power-up sequenc e or the next scheduled

24-hour interval.

If a battery low is generated during a power-up se-

quence, this indicates that the battery is below

2.5V and may not be able to maintain data integr ity

in the SRAM . Data should be considered suspect,

and verified as correct. A fresh battery should be

installed.

If a battery low indication is genera ted during the

24-hour interval check, this indicates that the bat-

tery is n ear end of life. Howe ver, dat a i s not com -

promised due to the fact that a nominal VCC is

supplied. In order to insure data integrity during

subsequent pe riods of bat tery back-up m ode, the

battery should be replaced. The SNAPHAT® top

should be replaced with valid VCC applied to the

device.

The M40Z300AV onl y moni tors the battery when a

nominal VCC is applied to the device. Thus appli-

cations which require extensive durations in the

battery back- up mode should be powered-up peri-

odically (at least once every few mont hs) in order

for this technique to be beneficial. Addit ionally , if a

battery low is indicated, data integrity should be

verified upon power-up via a checksum or other

technique. The BL pin is an open drain output and

an appropriate pull-up resistor to VCC should be

chosen to control the rise time.

M40Z300AV

8/20

VCC Noise And Negative Go ing Transients

ICC transients, including those produced by output

switching, can produce voltage fluctuations, re-

sulting in spi kes on the VCC bus. These trans ien ts

can be reduced if capaci tors are used to store en-

ergy which stabilizes the VCC bus. The energy

stored in the bypass c apacit ors will be released as

low going spikes are generated or energy will be

absorbed when overshoots occur. A ceramic by-

pass capaci tor v alue of 0.1µF (as shown in Figure

8) i s recommended in order to provide th e needed

filtering.

In addition to t ransients that are caused by normal

SRAM operation, power cycling can generate neg-

ative voltage s pikes on VCC that drive it to values

below VSS by as much as one volt. These negative

spikes can cause data corruption in the SRAM

while in battery backup mode. To protect from

these voltage spikes, STMicroelectronics recom-

mends connecting a schottky diode from VCC to

VSS (cathode connected to VCC, anode to VSS).

Schottky diode 1N5817 is recommended for

through hole and MBRS120T3 is recommended

for surfac e m ount.

Figure 8. Supply Voltage Protection

AI00622

VCC

0.1µF DEVICE

VCC

VSS

9/20

M40Z300AV

MAXI MUM RAT IN G

Stressing the device ab ove t he rating l isted in t he

“Absolute Maximum Ratings” table may cause

permanent damage to the device. These are

stress ratings only and operation of the device at

these or any other conditions above those indicat-

ed in the Oper ating sections of this specification is

not impl ied. Exposure to Absol ute Max imum Ra t-

ing conditions for extended periods may affect de-

vice reliability. Refer also to the

STMicroelectronics S URE P rogram and other rel-

evant quality documents.

Table 3. Absolute Maximum Ratings

Note: 1. Reflow at pea k t em perature of 2 15°C to 225°C for < 60 seconds ( total the rm al budg et not to exceed 180°C for between 90 to 12 0

seconds).

2. For SO package, standard lead finish: Ref low at peak temperature of 225°C (total thermal budget not to exceed 180°C for between

90 to 150 s econds).

3. For SO package, Lead-fr ee (Pb-f ree) lead fini sh: Refl ow at peak tem perature of 260°C (t ot al th erm al bu dget not t o exceed 245° C

for greater than 30 seconds).

CAUTION: Ne gative undershoots bel ow –0.3V are not all owed on any pin whi l e i n th e Battery B ack-u p mode.

CAUTION: Do NO T wave sold er SOI C t o avoi d damag i n g S NA PHAT s o c ket s.

Symbol Parameter Value Unit

TAAmbient Operating Temperature Grade 1 0 to 70 °C

Grade 6 –40 to 85 °C

TSTG Storage Temperature SNAPHAT®–40 to 85 °C

SOIC –55 to 125 °C

TSLD(1,2,3) Lead Solder Temperature for 10 seconds 260 °C

VIO Input or Output Voltage –0.3 to VCC + 0.3 V

VCC Supply Voltage –0.3 to 4.6 V

IOOutput Current 20 mA

PDPower Dissipation 1 W

M40Z300AV

10/20

DC AND AC PARAM ETERS

This section summarizes the operating and mea-

surement conditions, as well as the DC and AC

characteristics of the device. The parameters in

the following DC and AC Characteristic tables are

derived from tests pe rf ormed unde r t he Measure-

ment Condition s listed in the relevant tables. De-

signers should check that the operating conditions

in their projects match the measurement condi-

tions when using the quoted parameters.

Table 4. DC an d AC Measureme nt Conditions

Note: Output Hi gh Z is defi ned as the point where dat a i s no long er driven.

Fi gure 9. AC Testi ng Load Cir cuit

Table 5. Capacitance

Note: 1. Sampled only, not 100% tested.

2. At 25°C, f = 1MHz.

3. Outputs deselected .

Parameter M40Z300AV

VCC Supply Voltage 3.0 to 3.6V

Ambient Operating Temperature Grade 1 0 to 70°C

Grade 6 –40 to 85°C

Load Capacitance (CL)50pF

Input Rise and Fall Times ≤ 5ns

Input Pulse Voltages 0 to 3V

Input and Output Timing Ref. Voltages 1.5V

AI08897

CL = 50pF

CL includes JIG capacitance

333Ω

DEVICE

UNDER

TEST

1.73V

Symbol Parameter(1,2) Min Max Unit

CIN Input Capacitance 8 pF

COUT(3) Input/Output Capacitance 10 pF

11/20

M40Z300AV

Table 6. DC Characteristics

Note: 1. Vali d for Ambient Operating T em perature: TA = 0 to 7 0 °C or –40 t o 85°C; VCC = 3.0 to 3. 6V (except wher e noted).

2. Outputs deselected .

3. For R ST & BL pins (Open Drai n).

4. Chip Enable outputs (E1CON - E4CON) can only sus tain CMOS leaka ge currents in the batter y back-u p m ode.

Higher lea kage currents will reduc e battery life.

5. Meas ured with VOUT and E1CON - E4CON open.

6. THS pin m ust ben ti ed to VSS.

Sym Parameter Test Condition(1) Min Typ Max Unit

ILI(2) Input Leakage Current 0V ≤ VIN ≤ VCC ±1 µA

ICC Supply Current Outputs open 2 4 mA

VIL Input Low Voltage –0.3 0.8 V

VIH Input High Voltage 2.0 VCC + 0.3 V

VOL Output Low Voltage IOL = 4.0mA 0.4 V

Output Low Voltage (open drain)(3) IOL = 10mA 0.4 V

VOH Output High Voltage IOH = –2.0mA 2.4 V

VOHB VOH Battery Back-up(4) IOUT2 = –1.0µA 2.0 2.9 3.6 V

IOUT1 VOUT Current (Active) VOUT > VCC –0.3 150 mA

VOUT > VCC –0.2 100 mA

IOUT2 VOUT Current (Battery Back-up) VOUT > VBAT –0.3 100 µA

ICCDR Data Retention Mode Current(5) 100 nA

VPFD Power-fail Deselect Voltage (THS = VSS)(6) 2.8 2.9 3.0 V

VSO Battery Back-up Switchover Voltage 2.7 2.8 2.9 V

VBAT Battery Voltage 2.0 2.9 3.6 V

M40Z300AV

12/20

Figu re 10. P ow e r Down T im i n g

Figu re 11. P ower Up Tim in g

AI02398B

VCC

E

E1CON-E4CON

tF

tFB

VOHB

VPFD (max)

VPFD (min)

VSO

tWPT

VPFD

RST

AI02399B

VCC

E

E1CON-E4CON

tR

tCER

VOHB

VPFD (max)

VPFD (min)

VSO

VPFD

tEDLtEDH

RST

tREC

tRB

13/20

M40Z300AV

Table 7. Power Down/Up M ode AC Characteristics

Note: 1. Vali d for Ambient Operating T em perature: TA = 0 to 7 0 °C or –40 t o 85°C; VCC = 3.0 to 3. 6V (except wher e noted).

2. VPFD (ma x) to VPFD (min) fa ll time of le ss th an tF may result in desele ct ion/write prot ection not occurr in g until 20 0 µs after VCC

passes VPFD (m i n).

3. VPFD (m i n) to VSS fall time of less than tFB may caus e corrupt i on of RAM data.

4. tREC (min) = 20ms for industrial temperature Grade 6 device.

Symbol Parameter(1) Min Max Unit

tF(2) VPFD (max) to VPFD (min) VCC Fall Time 300 µs

tFB(3) VPFD (min) to VSS VCC Fall Time 150 µs

tRVPFD(min) to VPFD (max) VCC Rise Time 10 µs

tEDL Chip Enable Propagation Delay Low 20 ns

tEDH Chip Enable Propagation Delay High 20 ns

tAS A, B set up to E 0ns

tCER Chip Enable Recovery 40 120 ms

tREC(4) VPFD (max) to RST High 40 120 ms

tWPT Write Protect Time 40 250 µs

tRB VSS to VPFD (min) VCC Rise Time 1µs

M40Z300AV

14/20

P ACKAGE MECHANICAL INFO RMATION

Figure 12. SOH28 – 28-lead Plastic Small Outline, 4-socket battery SNAP HAT, Package Ou tline

No te : Drawi ng is not to scale.

Table 8. SOH28 – 28-lea d Plas tic S mall Ou tlin e, battery SN APHAT, Packag e M echa n i cal Data

Symbol mm inches

Typ Min Max Typ Min Max

A 3.05 0.120

A1 0.05 0.36 0.002 0.014

A2 2.34 2.69 0.092 0.106

B 0.36 0.51 0.014 0.020

C 0.15 0.32 0.006 0.012

D 17.71 18.49 0.697 0.728

E 8.23 8.89 0.324 0.350

e1.27– –0.050– –

eB 3.20 3.61 0.126 0.142

H 11.51 12.70 0.453 0.500

L 0.41 1.27 0.016 0.050

α0° 8° 0° 8°

N 28 28

CP 0.10 0.004

SOH-A

E

N

D

C

LA1 α

1

H

A

CP

Be

A2

eB

15/20

M40Z300AV

Figure 13. SH – 4-pin SNA PH AT Ho using for 4 8m Ah Battery, Package Ou tline

No te : Drawi ng is not to scale.

Tabl e 9. SH – 4- pi n S N APH AT Housing for 48mAh Batt ery, Pack age Mechanical D a ta

Symbol mm inches

Typ Min Max Typ Min Max

A 9.78 0.385

A1 6.73 7.24 0.265 0.285

A2 6.48 6.99 0.255 0.275

A3 0.38 0.015

B 0.46 0.56 0.018 0.022

D 21.21 21.84 0.835 0.860

E 14.22 14.99 0.560 0.590

eA 15.55 15.95 0.612 0.628

eB 3.20 3.61 0.126 0.142

L 2.03 2.29 0.080 0.090

SHZP-A

A1 A

D

E

eA

eB

A2

BL

A3

M40Z300AV

16/20

Figure 14. SH – 4-pin SNAPHA T Hou sing for 120mA h Battery, Package Outline

No te : Drawi ng is not to scale.

Table 10. SH – 4-pin SNAPHAT Housing for 120mAh Battery, Package Mechanical Data

Symbol mm inches

Typ Min Max Typ Min Max

A 10.54 0.415

A1 8.00 8.51 0.315 .0335

A2 7.24 8.00 0.285 0.315

A3 0.38 0.015

B 0.46 0.56 0.018 0.022

D 21.21 21.84 0.835 0.860

E 17.27 18.03 0.680 0.710

eA 15.55 15.95 0.612 0.628

eB 3.20 3.61 0.126 0.142

L 2.03 2.29 0.080 0.090

SHZP-A

A1 A

D

E

eA

eB

A2

BL

A3

17/20

M40Z300AV

Figure 15. SO16 – 16-lead Plas tic Small Outline, 150 mi ls body width , Packag e Outline

No te : Drawi ng is not to scale.

Table 11. SO 16 – 16-lead Plastic Small Outline, 150 m ils body width, P ackage Mechanical Data

Symbol mm inches

Typ. Min. Max. Typ. Min. Max.

A 1.75 0.069

A1 0.10 0.25 0.004 0.010

A2 1.60 0.063

B 0.35 0.46 0.014 0.018

C 0.19 0.25 0.007 0.010

D 9.80 10.00 0.386 0.394

E 3.80 4.00 0.150 0.158

e1.27––0.050––

H 5.80 6.20 0.228 0.244

L 0.40 1.27 0.016 0.050

α0° 8° 0° 8°

N16 16

CP 0.10 0.004

SO-b

E

N

CP

Be

A2

D

C

LA1 α

H

A

1

M40Z300AV

18/20

PART NUMBERING

Table 12. Ordering Information Example

Note: 1. The SOIC package (SOH 28) requ i res the ba t tery package (SN A PHAT®) wh i ch i s ordered separ ately under the part number

“M4Zxx-BR00SH” in plas t i c tube or “M 4Zxx-B R00SH T R” i n Tape & Reel form .

Caution: Do not place the SN APHAT batte ry package “M4Zxx-BR00SH” in con ductive f oa m as it will drain the lithium button-cell

battery.

2. Contact Local Sales Office for a vailability of SNAPHAT (MH) pa ckag e.

For a list of available options (e.g., Speed, Pac kage) or for further information on any aspect of this device,

please contact the ST Sales Office nearest to you.

Table 13. SNAPHAT ® B at te ry Table

Example: M40Z 300AV MQ 6 F

Device Type

M40Z

Supply and Write Protect Voltage

300AV = VCC = 3.0 to 3.6V

THS = VSS; 2.8V ≤ VPFD ≤ 3.0V

Package

MQ = SO16

MH (1,2) = SOH28

Tem pera ture Rang e

1 = 0 to 70°C

6 = –40 to 85°C

Shipping Method for SOIC

E = Lead-free Package (ECO PACK®), Tubes

F = Lead-free Package (ECO PACK®), Tape & Reel

Part Number Description Packag e

M4Z28-BR00SH Lithium Battery (48mAh) SNAPHAT SH

M4Z32-BR00SH Lithium Battery (120mAh) SNAPHAT SH

19/20

M40Z300AV

REVISION HISTORY

Table 14. Document Revi sion History

M40Z300AV, 40Z300AV, Z300AV, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZE-

ROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOW-

ER, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR,

SUPER VISOR, SU PERVISO R, SUPERVI SOR, SUPE RVISOR, S UPERVIS OR, SUPER VISOR, SU PERVISOR, NVRAM, NVRAM, NVRA M,

NV RAM , NV RAM, NVR AM, N VRAM , NVR AM , NVRA M, NVR AM, N VRA M, NV RAM, NVR AM, NVRA M, NVRA M, N VRAM, NVR AM, N VRA M,

NVRAM, NVRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM,

LPS RAM, LP SRAM, LPSR AM, LPSRA M, RTC, RTC, RTC, R TC, RT C, RTC , R TC, RT C, RTC , RTC, RTC, RTC, RTC, RT C, RTC , R TC,

RT C, R TC, RTC , RT C, RT C, RTC , RTC, RTC, RTC, RTC , RTC, R TC, RTC, RTC, R TC, RTC, RTC , RTC, R TC, RT C, RTC, R TC, RTC, RTC,

RTC, Microprocessor , Microprocessor, Microprocessor, Microprocesso r, Microprocesso r, Microprocessor, Microp rocessor, Microp rocessor,

Microprocessor, Microprocessor, Microprocess or, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Micro-

proce ssor, Micro process or, Mic roproce ssor, Microp rocess or, Low, Low, Low , Low, L ow, Low, Low, Low, Low , Lo w, Low, Low, Low, Low,

Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low,

Lo w, Low , Low, Lo w, Low, L ow, Lo w, Low, L ow, Lo w, Low, L ow, Lo w , Low, Lo w, Low , Low, Lo w, PFI, PF I, PFI, PF I , PF I, PFI, PFI, PFI, PFI,

PFI , PFI, PFI, PFI, PF I, PFI, PFI, PF I, PFI, PFI, PFI, PFI, PFI, PFI, PF I, PFI, PFI, PFI , PFI, PFI, PFI, PF I, PFI, PFI , P FI, PFI, PFO, PFO, PFO ,

PFO, PFO, PF O, PFO, PFO, PFO , PFO, PFO, PFO , PFO, PFO, PFO , PFO, PFO, PFO , PFO, PFO, Batt ery, Battery , Batt ery, Ba ttery, Batte ry,

Ba ttery, Battery, Battery, Battery, Battery, Batter y, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Batte r y, Bat te ry , Bat-

tery, Battery, Battery , Battery, Ba ttery, Battery, Battery, Battery, Battery, Battery, Batter y, Ba ttery, Batte ry, Battery, Batter y, Ba tte ry , Bat te ry ,

Ba ttery, Battery, Battery, Battery, Battery, Batter y, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Batte r y, Bat te ry , Bat-

ter y, Ba ttery, Ba tte r y, Batter y,Ba tt er y, Ba ttery, Ba ck up , Ba cku p , B ac ku p, Ba ck up, Backup , B ac ku p, Ba ck up, Backup , B ac ku p, Ba ck up, B ack-

up, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Power -fail, Power-fa il, Power-fail, Power-fail, Power-fail,

Power-fail, Power-fail, Power-fail, Power-fail, Power-fail, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator,

Com parator , Co mparator, Com parato r, Comp arator, Compa rator, Compara tor, Comparator, Co mparator, Comparato r, Comp arator, Com-

parator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator,

Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, SNAPHAT, SNAPHAT,

SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT,

SNAPHAT, SNAPHAT, SNAPH AT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPH AT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPH AT, SOIC,

SOI C, SO IC, SO IC , SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, THS, THS, THS, THS, T H S, T HS, T HS, THS ,

TH S, THS, 5V, 5 V, 5V , 5V, 5V, 5V , 5V, 5V, 5V, 5V , 5V, 5V, 5 V, 5V , 5V, 5V, 5 V, 5V, 5V, 5V, 5V , 5V, 5V, 5 V, 5V , 5V, 5V, 5 V, 5V, 5V, 5V, 5V ,

5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3 V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V,

Date Version Revision Details

November 14, 2003 1.0 First Issue

19-Nov-03 1.1 Correct shipping information (Table 12)

09-Mar-04 2.0 Reformatted; updated Lead-free information (Table 3, 12)

M40Z300AV

20/20

Information fur nished is believed to b e accurate and relia ble. However, STMicroelectronics a ssumes no responsibility for the conseq

u

of use of such information nor for any inf ringement of patents or other rights of third parties which may result from its use. No license is

g

by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are

s

to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronic s products

a

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