LT5503 1.2GHz to 2.7GHz Direct IQ Modulator and Mixer U FEATURES DESCRIPTIO The LT(R)5503 is a front-end transmitter IC designed for low voltage operation. The IC contains a high frequency quadrature modulator with a variable gain amplifier (VGA) and a balanced mixer. The modulator includes a precision 90 phase shifter which allows direct modulation of an RF signal by the baseband I and Q signals. Single 1.8V to 5.25V Supply Direct IQ Modulator with Integrated 90 Phase Shifter* Four Step RF Power Control 120MHz Modulation Bandwidth Independent Double-Balanced Mixer Modulation Accuracy Insensitive to Carrier Input Power Modulator I/Q Inputs Internally Biased Available in 20-Lead FE Package In a superheterodyne system, the mixer can be used to generate the high-frequency RF input for the modulator by mixing the system's 1st and 2nd local oscillators. The LT5503 modulator output P 1dB is -3dBm at 2.5GHz. The VGA allows output power reduction in three steps up to 13dB with digital control. The baseband inputs are internally biased for maximum input voltage swing at low supply voltage. If needed, they can be driven with external bias voltages. U APPLICATIO S IEEE 802.11 DSSS and FHSS High Speed Wireless LAN (WLAN) Wireless Local Loop (WLL) PCS Wireless Data MMDS , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. *Patent Pending U TYPICAL APPLICATIO 2.45GHz Transmitter Application, Carrier for Modulator Generated by Upmixer 2.45GHz BPF SSB Output Power vs I, Q Amplitude VCC1 2V VCC2 2V 0 5.25 VDC SSB OUTPUT POWER (dBm) -5 BQ+ BQ- MX - VCCLO2 VCCLO1 MIXER ENABLE MODULATOR ENABLE LO2IN (750MHz) MX + MODIN VCCRF VCCMOD VCCVGA MIXEN MODEN LO2 /2 MODOUT VGA 0 /1 90 DMODE -15 -20 -25 -30 -35 -45 0.1 10 0.01 1 I, Q DIFFERENTIAL INPUT VOLTAGE (VP-P) CONTROL LOGIC GC1 GC2 LO1 5503 TA01 LO1IN (2075MHz) -10 -40 LT5503 GND 3 VDC 1.8 VDC + BI BI- 2.45GHz MODULATED RFOUT 5503 G04 5503f 1 LT5503 U U U W W W AXI U RATI GS U ABSOLUTE PI CO FIGURATIO (Note 1) Supply Voltage ...................................................... 5.5V Control Voltages .......................... -0.3V to (VCC + 0.3V) Baseband Voltages (BI+ to BI- and BQ+ to BQ-) ...... 2V Baseband Common Mode Voltage .....1V to (VCC - 0.3V) LO1 Input Power .................................................. 4dBm LO2 Input Power .................................................. 4dBm MODIN Input Power ............................................. 4dBm Operating Temperature Range .................-40C to 85C Storage Temperature Range ..................-65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C TOP VIEW BQ - 1 20 BI - BQ+ 2 19 BI+ GC1 3 18 GC2 MODIN 4 VCCMOD 5 VCCRF 6 LO1 7 17 MODOUT 21 16 VCCVGA 15 VCCLO2 14 LO2 VCCLO1 8 13 MODEN DMODE 9 12 MIXEN MX + 10 11 MX - FE PACKAGE 20-LEAD PLASTIC TSSOP TJMAX = 150C, JA = 38C/W EXPOSED PAD IS GND (PIN 21) MUST BE SOLDERED TO PCB U W U ORDER I FOR ATIO LEAD FREE FINISH LT5503EFE#PBF TAPE AND REEL LT5503EFE#TRPBF PART MARKING 5503 PACKAGE DESCRIPTION 20-Lead Plastic TSSOP TEMPERATURE RANGE -40C to 85C Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on nonstandard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 5503f 2 LT5503 ELECTRICAL CHARACTERISTICS (I/Q Modulator) VCC1 = 3VDC, 2.4GHz matching, MODEN = High, GC1 = GC2 = Low, TA = 25C, MODRFIN = 2.45GHz at -16dBm, [I - IB] and [Q - QB] = 100kHz CW signal at 1VP-P differential, Q leads I by 90, unless otherwise noted. (Test circuit shown in Figure 2.) (Note 3) PARAMETER CONDITIONS MIN TYP MAX UNITS RF Carrier Input (MODRFIN) Frequency Range2 Requires Appropriate Matching Input VSWR ZO = 50 1.2 to 2.7 GHz 1.3:1 Input Power -20 to -10 dBm 120 MHz 1 VP-P Baseband Inputs (BI +, BI -, BQ +, BQ -) Frequency Bandwidth (3dB) Differential Input Voltage for 1dB Compressed Output DC Common-Mode Voltage 1.4 VDC Differential Input Resistance Internally Biased 18 k Input Capacitance 0.8 pF Gain Error 0.2 Phase Error 1 DEG -3 dBm dB Modulated RF Carrier Output (MODRFOUT) Output Power, Max Gain Output VSWR -6 ZO = 50 1.5:1 Image Suppression - 26 -34 Carrier Suppression - 24 -32 dBc -3 dBm 2 dBm Output 1dB Compression Output 3rd Order Intercept fI = 100kHz, fQ = 120kHz Output 2rd Order Intercept fI = 100kHz, fQ = 120kHz Broadband Noise 20MHz Offset dBc 16 dBm -142 dBm/Hz VGA Control Logic (GC2, GC1) Switching Time Input Current 100 ns 2 A Input Low Voltage 0.4 Input High Voltage 1.7 VDC VDC Output Power Attenuation GC2 = Low, GC1 = High 4.5 dB Output Power Attenuation GC2 = High, GC1 = Low 9 dB Output Power Attenuation GC2 = High, GC1 = High 13.5 dB 1 s Modulator Enable (MODEN) Low = Off, High = On Turn ON/OFF Time Input Current A 105 Enable VCC - 0.4 VDC Disable 0.4 VDC 5.25 VDC 38 mA 50 A Modulator Power Supply Requirements Supply Voltage 1.8 Modulator Supply Current MODEN = High Modulator Shutdown Current MODEN = Low 29 5503f 3 LT5503 ELECTRICAL CHARACTERISTICS (Mixer) VCC2 = 3VDC, 2.4GHz matching, MIXEN = High, DMODE = Low (LO2 / 2 mode), TA = 25C, LO2IN = 750MHz at -18dBm, LO1IN = 2075MHz at -12dBm. MIXRFOUT measured at 2450MHz, unless otherwise noted. (Test circuit shown in Figure 2.) (Note 3) PARAMETER CONDITIONS MIN TYP MAX UNITS Mixer 2nd LO Input (LO2IN) Frequency Range Internally Matched Input VSWR ZO = 50 50 to 1000 MHz 1.4:1 Input Power -20 to -12 dBm 1400 to 2400 MHz Mixer 1st LO Input (LO1IN) Frequency Range2 Requires Appropriate Matching Input VSWR ZO = 50 1.5:1 Input 3rd Order Intercept -30dBm/Tone, f = 200kHz -12 dBm 1700 to 2700 MHz Mixer RF Output (MIXRFOUT) Frequency Range2 Requires Appropriate Matching Output VSWR ZO = 50 Small-Signal Conversion Gain PLO1 = -30dBm 1.5:1 5 Output Power LO1 Suppression -14.7 -12.7 dBm - 22 - 29 dBc -15 dBm -152 dBm/Hz Output 1dB Compression Broadband Noise dB 20MHz Offset LO2 Divider Mode Control (DMODE) Low = fLO2 / 2, High = fLO2 / 1 Input Current A 1 Input Low Voltage (/2) 0.4 Input High Voltage (/1) VCC - 0.4 VDC VDC Mixer Enable (MIXEN) Low = Off, High = On Turn ON/OFF Time Input Current Enable 1 s 130 A VCC - 0.4 VDC Disable 0.4 VDC 5.25 VDC 15.5 mA Mixer Power Supply Requirements Supply Voltage 1.8 Supply Current (/2 mode) DMODE = Low, MIXEN = High 11.9 Supply Current (/1 mode) DMODE = High, MIXEN = High 10.8 Shutdown Current MIXEN = Low Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. mA 10 A Note 2: External component values on the final test circuit shown in Figure 2 are optimized for operation in the 2.4GHz to 2.5GHz band. Note 3: Specifications over the -40C to 85C temperature range are assured by design, characterization and correlation with statistical process controls. 5503f 4 LT5503 U W TYPICAL PERFOR A CE CHARACTERISTICS (I/Q Modulator) VCC1 = 3VDC, 2.4GHz matching, MODEN = high, GC1 = GC2 = low (max gain), TA = 25C, MODRFIN = 2.45GHz at -16dBm, (I-IB) and (Q-QB) = 100kHz sine at 1VP-P differential, Q leads I by 90, unless otherwise noted. (Test circuit shown in Figure 2.) Modulator Supply Current vs Supply Voltage MODEN Current vs Enable Voltage Modulator Shutdown Current vs Supply Voltage 38 100 220 MODEN = LOW 32 TA = 25C 30 28 26 24 180 10 TA = 85C 1 TA = 25C 20 1.8 0.1 1.8 5.3 TA = -40C TA = -40C 0 DESIRED SIDEBAND PLO1 = -12dBm PLO2 = -18dBm BASEBAND = 1VP-P TA = 25C 4.8 -15 -20 -25 -30 -20 -30 MODRFIN CARRIER -35 -40 0.1 5.4 MODRFOUT -10 -10 RETURN LOSS (dB) OUTPUT POWER (dBm) -5 -4 5.3 4.6 3.9 3.2 MODEN VOLTAGE (V) MODRFIN and MODRFOUT Return Loss 2.4GHz Matching 0 -3 2.5 5503 G03 Baseband Frequency Response I/Q Amplitude = 1VP-P -2 IMAGE 10 1 I, Q INPUT FREQUENCY (MHz) 5503 TA01b 5503 G05 -40 2050 2250 2450 2650 FREQUENCY (MHz) 2850 5503 G06 Typical SSB Spectrum 0 -10 -20 -30 POUT (dBm) 3.0 3.6 4.2 SUPPLY VOLTAGE (V) 100 5503 G02 2.45GHz Modulated Output Power vs Supply Voltage 2.4 TA = 25C 120 40 1.8 5.3 4.6 2.5 3.9 3.2 VCC1 SUPPLY VOLTAGE (V) 5503 G01 1.8 140 60 4.6 2.5 3.9 3.2 VCC1 SUPPLY VOLTAGE (V) -5 TA = 85C 160 80 TA = -40C 22 OUTPUT POWER (dBm) INPUT CURRENT (A) TA = 85C 34 -6 MODEN = VCC1 200 SHUTDOWN CURRENT (A) SUPPLY CURRENT (mA) 36 -40 -50 -60 -70 -80 -90 -100 2449.6 2449.8 2450.0 2450.2 2450.4 FREQUENCY (MHz) 2450.6 5503 G07 5503f 5 LT5503 U W TYPICAL PERFOR A CE CHARACTERISTICS (I/Q Modulator) 2.4GHz matching, MODEN = high, GC1 = GC2 = low (max gain), MODRFIN = 2.45GHz, (I-IB) and (Q-QB) = 100kHz sine at 1VP-P differential, Q leads I by 90, unless otherwise noted. (Test circuit shown in Figure 2.) -20 -2 -20 TA = -40C -8 TA = 85C -10 -12 -14 -16 IMAGE SUPPRESSION (dBc) -6 CARRIER SUPPRESSION (dBc) TA = 25C -4 SSB OUTPUT POWER (dBm) Image Suppression vs Input Power VCC1 = 1.8V Carrier Suppression vs Input Power VCC1 = 1.8V SSB Output Power vs Input Power VCC1 = 1.8V -30 TA = 25C TA = -40C -40 TA = 85C -30 TA = 25C TA = -40C -40 TA = 85C -18 -20 -24 -22 -20 -18 -16 -14 -12 MODRFIN INPUT POWER (dBm) -50 -24 -10 -22 -20 -18 -16 -14 -12 MODRFIN INPUT POWER (dBm) -22 -20 -18 -16 -14 -12 MODRFIN INPUT POWER (dBm) 5503 G09 5503 G08 0 -10 5503 G10 Carrier Suppression vs Input Power VCC1 = 3V SSB Output Power vs Input Power VCC1 = 3V Image Suppression vs Input Power VCC1 = 3V -20 -20 -4 TA = -40C -6 -8 TA = 85C -10 -12 -14 -30 IMAGE SUPPRESSION (dBc) CARRIER SUPPRESSION (dBc) TA = 25C -2 SSB OUTPUT POWER (dBm) -50 -24 -10 TA = 25C TA = -40C -40 TA = 85C -30 TA = 25C TA = -40C TA = 85C -40 -16 -22 -20 -18 -16 -14 -12 MODRFIN INPUT POWER (dBm) -50 -24 -10 -22 -20 -18 -16 -14 -12 MODRFIN INPUT POWER (dBm) 5503 G11 CARRIER SUPPRESSION (dBc) SSB OUTPUT POWER (dBm) TA = -40C -6 -8 Image Suppression vs Input Power VCC1 = 5.25V -20 -20 TA = 25C TA = 85C -10 -12 -14 -30 TA = 25C TA = -40C -40 -10 5503 G13 Carrier Suppression vs Input Power VCC1 = 5.25V 0 -4 -22 -20 -18 -16 -14 -12 MODRFIN INPUT POWER (dBm) 5503 G12 SSB Output Power vs Input Power VCC1 = 5.25V -2 -50 -24 -10 IMAGE SUPPRESSION (dBc) -18 -24 TA = 85C -30 TA = 25C TA = -40C TA = 85C -40 -16 -18 -24 -22 -20 -18 -16 -14 -12 MODRFIN INPUT POWER (dBm) -10 5503 G14 6 -50 -24 -22 -20 -18 -16 -14 -12 MODRFIN INPUT POWER (dBm) -10 5503 G15 -50 -24 -22 -20 -18 -16 -14 -12 MODRFIN INPUT POWER (dBm) -10 5503 G16 5503f LT5503 U W TYPICAL PERFOR A CE CHARACTERISTICS (I/Q Modulator) VCC1 = 3VDC, MODEN = high, TA = 25C, PMODRFIN = -16dBm, (I-IB) and (Q-QB) = 100kHz sine at 1VP-P differential, Q leads I by 90, unless otherwise noted. (Test circuit shown in Figure 2.) Output Power vs Frequency 1.2GHz Matching Carrier Feedthrough vs Frequency 1.2GHz Matching 0 -30 -30 GC2, GC1 = 00 -2 GC2, GC1 = 00 -4 GC2, GC1 = 00 01 -8 -10 -12 10 -14 -40 IMAGE (dBm) -6 CARRIER (dBm) SSB OUTPUT POWER (dBm) SSB Image vs Frequency 1.2GHz Matching 01 10 -50 01 -40 10 11 -50 11 -16 11 -18 -20 1000 1100 1200 1300 MODRFIN FREQUENCY (MHz) -60 1000 1400 1100 1200 1300 MODRFIN FREQUENCY (MHz) Output Power vs Frequency 1.9GHz Matching SSB Image vs Frequency 1.9GHz Matching -30 -30 GC2, GC1 = 00 GC2, GC1 = 00 1400 5503 G19 Carrier Feedthrough vs Frequency 1.9GHz Matching 2 0 1100 1200 1300 MODRFIN FREQUENCY (MHz) 5503 G18 5503 G17 GC2, GC1 = 00 -2 01 01 -6 -8 10 -10 -12 -40 IMAGE (dBm) -4 CARRIER (dBm) SSB OUTPUT POWER (dBm) -60 1000 1400 10 11 -50 01 -40 10 11 -50 11 -14 -16 1750 1850 1950 2050 MODRFIN FREQUENCY (MHz) -60 1650 2150 1750 1850 1950 2050 MODRFIN FREQUENCY (MHz) 5503 G20 GC2, GC1 = 00 GC2, GC1 = 00 01 CARRIER (dBm) SSB OUTPUT POWER (dBm) -30 GC2, GC1 = 00 01 -8 10 -12 -14 SSB Image vs Frequency 2.4GHz Matching -30 -4 -10 2150 5503 G22 Carrier Feedthrough vs Frequency 2.4GHz Matching 0 -6 1750 1850 1950 2050 MODRFIN FREQUENCY (MHz) 5503 G21 Output Power vs Frequency 2.4GHz Matching -2 -60 1650 2150 -40 10 IMAGE (dBm) -18 1650 11 -50 -40 01 10 11 -50 11 -16 -18 2250 2350 2450 2550 MODRFIN FREQUENCY (MHz) 2650 5503 G23 -60 2250 2350 2450 2550 MODRFIN FREQUENCY (MHz) 2650 5503 G24 -60 2250 2350 2450 2550 MODRFIN FREQUENCY (MHz) 2650 5503 G25 5503f 7 LT5503 U W TYPICAL PERFOR A CE CHARACTERISTICS (Mixer) 2.4GHz matching, MIXEN = high, DMODE = low (LO2 / 2 mode), LO2IN = 750MHz at -18dBm, LO1IN = 2075MHz. MIXRFOUT measured at 2450MHz, unless otherwise noted. (Test circuit shown in Figure 2.) Mixer Supply Current vs Supply Voltage (LO2 / 2 Mode) 14 14 100 DMODE = HIGH TA = 85C MIXEN = LOW SUPPLY CURRENT (mA) TA = 25C 12 11 TA = -40C 10 SHUTDOWN CURRENT (A) 13 13 SUPPLY CURRENT (mA) Mixer Shutdown Current vs Supply Voltage Mixer Supply Current vs Supply Voltage (LO2 / 1 Mode) TA = 85C 12 TA = 25C 11 10 TA = -40C 9 9 8 8 10 TA = 85C 1 TA = 25C 1.8 5.3 2.5 3.2 3.9 4.6 VCC2 SUPPLY VOLTAGE (V) 0.1 1.8 RF Output Power vs LO1 Input Power (VCC2 = 1.8V) -12 -14 MIXRFOUT POWER (dBm) -18 TA = 25C -20 TA = 85C -22 -24 -16 -14 TA = -40C MIXRFOUT POWER (dBm) -14 -18 TA = 25C -20 TA = 85C -22 -24 -26 -26 -28 -30 -27 -24 -21 -18 -15 -12 -9 LO1IN POWER (dBm) -16 TA = -40C -18 TA = 25C -20 TA = 85C -22 -24 -26 -28 -30 -27 -24 -21 -18 -15 -12 -9 LO1IN POWER (dBm) -6 -28 -30 -27 -24 -21 -18 -15 -12 -9 LO1IN POWER (dBm) -6 1195 G30 1195 G29 LO1 Feedthrough vs LO1 Input Power (VCC2 = 1.8V) -6 1195 G31 LO1 Feedthrough vs LO1 Input Power (VCC2 = 5.25V) LO1 Feedthrough vs LO1 Input Power (VCC2 = 3V) -20 -20 -20 5.3 RF Output Power vs LO1 Input Power (VCC2 = 5.25V) -12 -12 -16 TA = -40C 2.5 3.2 3.9 4.6 VCC2 SUPPLY VOLTAGE (V) 5503 G28 RF Output Power vs LO1 Input Power (VCC2 = 3V) TA = -40C 1.8 5503 G27 5503 G26 MIXRFOUT POWER (dBm) 5.3 2.5 3.2 3.9 4.6 VCC2 SUPPLY VOLTAGE (V) TA = 25C TA = 85C -30 -35 -40 -30 -27 -24 -21 -18 -15 -12 -9 LO1IN POWER (dBm) -6 1195 G32 8 -25 LO1 FEEDTHROUGH (dBc) -25 LO1 FEEDTHROUGH (dBc) LO1 FEEDTHROUGH (dBc) TA = -40C TA = 85C TA = 25C -30 TA = -40C -35 -40 -30 -27 -24 -21 -18 -15 -12 -9 LO1IN POWER (dBm) -6 1195 G33 -25 TA = 25C TA = 85C TA = -40C -30 -35 -40 -30 -27 -24 -21 -18 -15 -12 -9 LO1IN POWER (dBm) -6 1195 G34 5503f LT5503 U W TYPICAL PERFOR A CE CHARACTERISTICS (Mixer) VCC2 = 3VDC, MIXEN = high, DMODE = low (LO2 / 2mode), TA = 25C, unless otherwise noted. (Test circuit shown in Figure 2.) RF Output Power and LO1 Feedthrough 1.9GHz Matching Small-Signal Conversion Gain and IIP3 1.9GHz Matching 0 6 -14 -10 4 -16 -20 -18 -30 -12 LO1IN and MIXRFOUT Return Loss 1.9GHz Matching 0 -3 -40 -20 -22 1650 IIP3 LO2IN = 480MHz AT -18dBm LO1IN = fRF -240MHz AT -30dBm/TONE -4 1650 1750 1950 2050 1850 RF OUTPUT FREQUENCY (MHz) 5503 G35 6 -10 4 LO1 FEEDTHROUGH -30 -18 -40 -20 -18 2150 -30 1100 1300 1500 1700 1900 2100 2300 2500 FREQUENCY (MHz) 5503 G37 LO1 and MIXRFOUT Return Loss 2.4GHz Matching SMALL-SIGNAL CONVERSION GAIN -9 IIP3 0 -12 -15 LO2IN = 750MHz AT -18dBm LO1IN = fRF -375MHz AT -30dBm/TONE -4 2250 -5 -6 -2 -50 2650 0 -3 2 LO2IN = 750MHz AT -18dBm LO1IN = fRF -375MHz AT -12dBm 2350 2550 2450 RF OUTPUT FREQUENCY (MHz) 5503 G38 -18 2650 5503 G39 -10 MIXRFOUT -15 LO1 -20 -25 -30 1450 1650 1850 2050 2250 2450 2650 2850 FREQUENCY (MHz) 5503 G40 MIXEN Input Current vs Enable Voltage (MIXEN = VCC2) 300 270 TA = 85C 240 INPUT CURRENT (A) 2350 2550 2450 RF OUTPUT FREQUENCY (MHz) -25 IIP3 (dBm) -20 -16 CONVERSION GAIN (dB) 0 LO1 (dBc) RF OUTPUT (dBm) OUTPUT POWER MIXRFOUT -20 Small-Signal Conversion Gain and IIP3 2.4GHz Matching -12 -22 2250 -15 5503 G36 RF Output Power and LO1 Feedthrough 2.4GHz Matching -14 -10 LO1IN -15 -2 -50 2150 1750 1950 2050 1850 RF OUTPUT FREQUENCY (MHz) -12 0 RETURN LOSS (dB) LO2IN = 480MHz AT -18dBm LO1IN = fRF -240MHz AT -12dBm -9 2 RETURN LOSS (dB) CONVERSION GAIN (dB) LO1 FEEDTHROUGH -5 -6 SMALL-SIGNAL CONVERSION GAIN IIP3 (dBm) LO1 (dBc) RF OUTPUT (dBm) OUTPUT POWER 210 TA = -40C 180 150 TA = 25C 120 90 60 30 1.8 2.5 3.9 3.2 MIXEN VOLTAGE (V) 4.6 5.3 5503 G41 5503f 9 LT5503 U U U PI FU CTIO S BQ- (Pin 1): Negative Baseband Input Pin of the Modulator Q-Channel. This pin is internally biased to 1.4V, but can also be overdriven with an external DC voltage greater than 1.4V, but less than VCC - 0.4V. MIXEN (Pin 12): Mixer Enable Pin. When the input voltage is higher than VCC - 0.4V, the mixer circuits supplied through pins 8, 10, 11 and 15 are enabled. When the input voltage is less than 0.4V, these circuits are disabled. BQ+ (Pin 2): Positive Baseband Input Pin of Modulator QChannel. This pin is internally biased to 1.4V, but can also be overdriven with an external DC voltage greater than 1.4V, but less than VCC - 0.4V. MODEN (Pin 13): Modulator Enable Pin. When the input voltage is higher than VCC - 0.4V, the modulator circuits supplied through pins 5, 6, 16 and 17 are enabled. When the input voltage is less than 0.4V, these circuits are disabled. GC1 (Pin 3): Gain Control Pin. This pin is the least significant bit of the four-step modulator gain control. MODIN (Pin 4): Modulator Carrier Input Pin. This pin is internally biased and should be AC-coupled. An external matching network is required for a 50 source. VCCMOD (Pin 5): Power Supply Pin for the I/Q Modulator. This pin should be externally connected to the other VCC pins and decoupled with 1000pF and 0.1F capacitors. VCCRF (Pin 6): Power Supply Pin for the I/Q Modulator Input RF Buffer and Phase Shifter. This pin should be externally connected to the other VCC pins and decoupled with 1000pF and 0.1F capacitors. LO1 (Pin 7): Mixer 1st LO Input Pin. This pin is internally biased and should be AC-coupled. An external matching network is required for a 50 source. VCCLO1 (Pin 8): Power Supply Pin for the Mixer LO1 Circuits. This pin should be externally connected to the other VCC pins and decoupled with 1000pF and 0.1F capacitors. DMODE (Pin 9): Mixer 2nd LO Divider Mode Control Pin. Low = divide-by-2, High = divide-by-1. MX+ (Pin 10): Mixer Positive RF Output Pin. This pin must be connected to VCC through an external matching network. MX- (Pin 11): Mixer Negative RF Output Pin. This pin must be connected to VCC through an external matching network. LO2 (Pin 14): Mixer 2nd LO Input Pin. This pin is internally biased and should be AC-coupled. An external matching network is not required, but can be used for improved matching to a 50 source. VCCLO2 (Pin 15): Power Supply Pin for the Mixer LO2 Circuits. This pin should be externally connected to the other VCC pins and decoupled with 1000pF and 0.1F capacitors. VCCVGA (Pin 16): Power Supply Pin for the Modulator Variable Gain Amplifier. This pin should be externally connected to the other VCC pins through a 47 resistor and decoupled with a good high frequency capacitor (2pF typical) placed close to the pin. MODOUT (Pin 17): Modulator RF Output Pin. This pin must be externally biased to VCC through a bias choke. An external matching network is required to match to 50. GC2 (Pin 18): Gain Control Pin. This pin is the most significant bit of the four-step modulator gain control. BI+ (Pin 19): Positive Baseband Input Pin of the Modulator I-Channel. This pin is internally biased to 1.4V, but can also be overdriven with an external DC voltage greater than 1.4V, but less than VCC - 0.4V. BI- (Pin 20): Negative Baseband Input Pin of the Modulator I-Channel. This pin is internally biased to 1.4V, but can also be overdriven with an external DC voltage greater than 1.4V, but less than VCC - 0.4V. Exposed Pad (Pin 21): Circuit Ground Return for the Entire IC. This must be soldered to the printed circuit board ground plane 5503f 10 LT5503 W BLOCK DIAGRA BQ+ BQ- 1 2 BI- 20 V-I BI+ 19 V-I VCCMOD 5 16 VCCVGA VGA 17 MODOUT VCCRF 6 18 GC2 RF BUFFER 90 CONTROL LOCIC 0 3 GC1 MODIN 4 VCCLO1 8 MODULATOR BIAS CIRCUITS 13 MODEN MIXER BIAS CIRCUITS 12 MIXEN LO1 BUFFER 15 VCCLO2 LIM LO1 7 21 GND (BACKSIDE) 10 11 MX+ MX- /2 /1 9 LIM 14 LO2 5503 BD DMODE 5503f 11 LT5503 TEST CIRCUIT 21 (BACKSIDE) C17 1F QB Q LT5503 GND 1 BQ - BI - 20 2 BQ+ BI+ 19 C15 1F 3 GC1 GC1 18 GC2 C18 1F IB I GC2 C16 1F C2 L2 C3 L3 4 MODRFIN MODIN MODRFOUT 17 MODOUT R2 47 C10 5 16 VCCMOD VCCVGA C4 6 L4 VCCRF 7 LO1IN 15 VCCLO2 LO1 C7 C11 8 C43 8.2pF 9 DMODE 10 C12 1000pF L5 VCCLO1 MODEN DMODE MIXEN MX + 13 12 VCC1 C19 0.01F C22 1000pF 14 LO2 C23 R1 C1 2.2pF VCC1 C20 1000pF L1 LO2IN MODEN C14 100pF MIXEN 11 MX - L6 C13 8.2pF VCC2 C21 0.01F C5 4 2 1 C9 3 C6 5 T1 NOTE: VCC1 AND VCC2 POWER THE MODULATOR AND UPMIXER SECTIONS RESPECTIVELY. MIXRFOUT 5503 F01 Application Dependent Component Values 1.2GHz Matching (Modulator Only) 1.9GHz Matching 2.4GHz Matching L1 33nH 22nH 18nH L2 12nH 5.6nH 2.7nH L3 12nH 4.7nH 2.7nH C2, C3, C7 39pF 15pF 8.2pF C10 2.7pF 1.8pF 1.2pF C23 n/a 1.5pF 1.5pF R1 240 390 390 C4 n/a 15pF 8.2pF C5, C6 n/a 1.8pF 2.2pF C9 n/a 15pF 2.7pF C11 n/a 2.2pF 1.2pF L4 n/a 6.8nH 4.7nH L5,L6 n/a 5.6nH 2.2nH T1 n/a LDB211G9010C-001 LDB212G4005C-001 Figure 1. Test Schematic for 1.2GHz, 1.9GHz and 2.4GHz Applications 5503f 12 LT5503 U W U U APPLICATIO S I FOR ATIO The LT5503 consists of a direct quadrature modulator and a mixer. The mixer operates over the range of 1.7GHz to 2.7GHz, and the modulator operates with an output range of 1.2GHz to 2.7GHz. The LT5503 is designed specifically for high accuracy digital modulation with supply voltages as low as 1.8V. It is suitable for IEEE 802.11b wireless local area network (WLAN), MMDS and wireless local loop (WLL) transmitters. bandpass filter loss. The balanced output from the modulator is applied to a variable gain amplifier (VGA) that provides a single-ended output. Note that the modulator can also be used independently of the mixer, freeing the mixer to be used anywhere in the system. In this case, MODRFIN will be driven from an external frequency source. A dual-conversion RF system requires two local oscillators to convert signals between the baseband and RF domains (see Figure 2). The LT5503's double-balanced mixer can be used to generate the LT5503 modulator's high frequency carrier input (MODRFIN) by mixing the systems 1st and 2nd local oscillators (LO1 and LO2). In this case, a bandpass filter is required to select the desired mixer output for the modulator input. The mixer's RF differential output produces -12dBm typically at 2.45GHz and the modulator MODIN pin requires -16dBm, driven single-ended. This allows approximately 4dB margin for The baseband I and Q inputs (BI+/BI - and BQ+/BQ -) are internally biased to 1.4V to maximize the input signal range at low supply voltage. This bias voltage is stable over temperature, and increases by approximately 50mV at the maximum supply voltage. The modulator I and Q inputs have very wide bandwidth (120MHz typical), making the LT5503 suitable for even the most wideband modulation applications. For best carrier suppression and lowest distortion, differential input drive should be used. Singleended drive is possible too, with the unused inputs ACcoupled to ground. LT5500 Modulator Baseband LT5502 LT5506 I A/D 90 LNA /2 0 Q 1ST LO A/D 2ND LO LT5503 VGA /2 90 0 I Q /1 D/A D/A 5503 F02 Figure 2. Example System Block Diagram for a Dual Conversion System 5503f 13 LT5503 U W U U APPLICATIO S I FOR ATIO AC-Coupled Baseband. Figure 3 shows the simplified circuit schematic of a high-pass AC-coupled baseband interface. CCPL BI+ LT5503 CCPL BI- I 18k 0.8pF Figure 4 shows a simplified circuit schematic for interfacing the LT5503's baseband inputs to the outputs of a D/A converter. OIP and OIN are the positive and negative baseband outputs, respectively, of the converter's I-channel. Similarly, OQP and OQN are the positive and negative baseband outputs, respectively, of the converter's Q-channel. IB 0.8pF CCPL BI+ LT5503 IINPUT BI- IINPUT BQ+ IINPUT BQ- BQ+ Q CCPL IINPUT OIP BQ- 18k 0.8pF 18k 0.8pF OIN 0.8pF D/A QB 0.8pF OQP 5505 F03 Figure 3. AC-Coupled Baseband Interface 18k 0.8pF OQN 0.8pF With approximately 18k of differential input resistance, the suggested minimum AC-coupling capacitor can be determined using the following equation: C CPL = 1 (18 * 103 * * fC ) where fC is the 3dB cut-off frequency of the baseband input signal. A larger capacitor may be used where the settling time of charging and discharging the AC-coupling capacitor is not critical. DC-Coupled Baseband. The baseband inputs' internal bias voltage can be overdriven with an external bias circuit. This facilitates direct interfacing to a D/A converter for faster transient response. In this case, the LT5503's baseband inputs are DC biased by the converter. The optimal VBIAS is 1.4V, independent of VCC. In general, the maximum VBIAS should be less than VCC - 0.4V. The DC load on each converter output can be approximated using the following equation where IINPUT is the current flowing into a modulator input: IINPUT V - 1.4V = BIAS 9k 5505 F04 Figure 4. DC-Coupled Baseband Interface Modulator RF Input (MODRFIN) The modulator RF input buffer is driven single-ended. An internal active balun circuit produces balanced signals to drive the integrated phase shifter. Limiters following the phase shifter output accommodate a wide range of MODRFIN power, resulting in minimal degradation of modulation gain/phase accuracy performance or carrier feedthrough. This pin is easily matched to a 50 source with the simple lowpass network shown in Figure 1. This pin is internally biased, therefore an AC-coupling capacitor is required. Modulator VGA (Variable Gain Amp) The VGA has two digital selection lines to provide a nominal 0dB, 4.5dB, 9dB and 13.5dB attenuation from the maximum modulator output power setting. The logic table is shown below: GC2 Attenuation GC1 Low High Low 0dB 9dB High 4.5dB 13.5dB 5503f 14 LT5503 U W U U APPLICATIO S I FOR ATIO Pin 16 should be connected externally to VCC through a low value series resistor (47 typical). To assure proper output power control, a good, local high frequency AC ground for Pin 16 is essential. The MODOUT port of the VGA is an open collector configuration. An inductor with high self resonance frequency is required to connect Pin 17 to VCC as a DC return path, and as a part of the output matching network. Additional matching components are required to drive a 50 load as shown in Figure 1. The amplifier is designed to operate in Class A for low distortion performance. The typical output 1dB compression point (P1dB) is -3dBm at 2.45GHz. When the differential baseband input voltages are higher than 1VP-P, the VGA operates in Class AB mode, and the distortion performance of the modulator is degraded. The logic control inputs do not draw current when they are low. They draw about 2A each when high. Mixer LO1 Port The mixer LO1 input port is the linear input to the mixer. It consists of an active balun amplifier designed to operate over the 1.4GHz to 2.4GHz frequency range. There is a linear relationship between LO1 input power and MIXRFOUT power for LO1 input levels up to approximately -20dBm. After that, the mixer output begins to compress. When operated in the recommended -14dBm to -8dBm input power range, the mixer is well compressed, which in turn creates a stable output level for the modulator input. As shown in Figure 1, a simple lowpass matching network is required to match this pin to 50. This pin is internally biased, therefore an AC-coupling capacitor is required. MX + 10 Mixer LO2 Port The mixer LO2 port is designed to operate in the 50MHz to 1000MHz range. The first stage is a limiting amplifier. This stage produces the correct output levels to drive the internal divider circuit reliably, with LO2 input levels down to -20dBm. The output of the divider then drives another stage, which in turn switches the nonlinear inputs of the double-balanced mixer. Note that the mixer output will produce broadband noise if the LO2 signal level is too low. The input amplifier is designed for a good match over the entire frequency range. The only requirement (Figure 1) is an external AC-coupling capacitor. Mixer Output Ports (MX+/MX-) The mixer output is a differential open collector configuration. Bias current is supplied to these two pins through the center tap of a balun as shown in Figure 1. Simple lowpass matching is used to transform each leg of the mixer output to 25 for the balun's 50 input impedance. The balun approach provides the highest output power and best LO1 suppression, but is not absolutely necessary. It is also possible to match each output to 50 and couple power from one output. The unused output should be terminated in the same characteristic impedance. In this case, output power is approximately 2dB lower and LO1 suppression degrades to approximately 15dBc. A schematic for this approach is shown in Figure 6 where inductors LB + and LB - supply bias current to the mixer's differential outputs, and resistor RTERM terminates the unused output. 11 MX - L5 LB+ VCC L6 LB- RTERM 51 C5 1.9GHz 2.4GHz L5,L6 5.6nH 2.7nH C5, C6 1.8pF 0.68pF C9 15pF 8.2pF C6 C9 MIXRFOUT CBYPASS 5503 F05 Figure 5. 50 Mixer Output Matching Without a Balun 5503f 15 LT5503 U W U U APPLICATIO S I FOR ATIO EVALUATION BOARD RF Layout Tips: Figure 6 shows the circuit schematic of the evaluation board. The MODRFIN, MODRFOUT and MIXRFOUT ports are matched to 50 at 2.45GHz. The LO1IN port is matched to 50 at 2.1GHz and the LO2IN port is internally matched. * Use 50 impedance transmission lines up to the matching networks, use of a ground plane is a must. A 390 resistor is used to reduce the quality factor (Q) of the modulator output and deliver an output power of -3dBm typically. A lower value resistor may be used if the desired output power is lower. For example, the output power will be 3dB lower if a 200 resistor is used. Inductors with high self-resonance frequency should be used for L1 to L6. For simpler evaluation in a lab environment, the evaluation board includes op amps to convert single-ended I and Q input signals to differential . The op amp configuration has a voltage gain of two; therefore the peak baseband input voltage should be halved to maintain the same RF output power. The op amp configuration shown will maintain acceptable differential balance up to 10MHz typically. It is also possible to bypass the op amps and drive the modulator's differential inputs directly by connecting to the four oversized vias on the board (V1, V2, V3 and V4). Figure 6 also shows a table of matching network values for designs centered at 1.9GHz and1.2GHz. Figure 7 shows the evaluation board with connectors and ICs. Figure 8 shows the test set-up with the upconverting mixer and IQ modulator connected in a transmit configuration. Refer to the demo board DC365A Quick Start Guide for detailed testing information. * Keep the matching networks as close to the pins as possible. * Surface mount 0402 outline (or smaller) parts are recommended to minimize parasitic inductances and capacitances. * Isolate the MODOUT pin from the LO2 input by putting the LO2 transmission line on the bottom side of the board. * The only ground connection is through the exposed pad on the bottom of the package. This exposed pad must be soldered to the board in such a way to get complete RF contact. * Low impedance RF ground connections are essential and can only be obtained by one or more vias tying directly into the ground plane. * VCC lines must be decoupled with low impedance, broadband capacitors to prevent instability. * Separate power supply lines should be used to isolate the MODIN signal and other stray signals from the MODOUT line. If possible, power planes should be used. * Avoid use of long traces whenever possible. Long RF traces in particular can lead to signal radiation and degraded isolation, as well as higher losses. 5503f 16 LT5503 U W U U APPLICATIO S I FOR ATIO E4 VCC4 J1 VCC4 C33 4.7F 5 Q-IN R3 56 1% R13 510 1% R14 510 1% 6 C27 0.01F C32 4.7F C29 0.01F C34 4.7F C28 4.7F 8 + 8 7 U2-1 LT1807 - 7 4 R17 510 1% U3-1 LT1807 - R18 4 510 1% C16 1F C15 R25 1F 49.9 C35, 39pF + R28 49.9 2 R21 10k 1% R23 10k 1% 3 R16 510 1% R12 56 1% C38, 1pF R19 510 1% - U2-2 LT1807 C40 4.7F I-IN R15 510 1% 6 C36, 39pF C37, 1pF VCC4 J4 5 + C41 1F OPT 1 C17 1F V1 R26 49.9 1 2 V2 3 *C3 J2 *L3 MODRFIN R20 510 1% 1 C42 1F OPT 4 V3 LT5503 - BI - BQ+ BI+ GC1 GC2 BQ C18 1F 20 5 R22 10k 1% U3-2 LT1807 R27 49.9 + 3 C39 4.7F R24 10k 1% V4 *C2 *L2 18 J5 MODRFOUT 17 MODIN VCC4 2 19 *L1 MODOUT *C23 *R1 R2 47 *C10 E1 - 16 VCC1 VCCMOD VCCVGA VCC1 C20 1000pF *C4 J3 *L4 LO1IN C43 8.2pF E3 R29 10 9 C12 1000pF 10 SW1 12 11 10 9 8 7 R5 20k R6 20k 15 VCCRF VCCLO2 14 LO1 C14 100pF VCC2 J6 LO2IN LO2 C22 1000pF 13 VCCLO1 MODEN DMODE MIXEN C1 *C7 2.2pF C19 0.01F *C11 C45 0.1F 1 2 3 4 5 6 7 8 VCC2 VCC3 C24 4.7F 6 R7 20k R8 2.7k R4 2.7k 12 MX + *L5 GND 21 MX - *L6 *C5 E2 11 *C6 VCC2 C21 0.01F C13 8.2pF J7 MIXER OUT *C9 4 2 1 3 5 T1 5503 F06 L1 L2 L3 C2, C3, C7 C10 C23 R1 C4 C5, C6 C9 C11 L4 L5,L6 T1 *Application Dependent Component Values 1.2GHz Matching (Modulator Only) 1.9GHz Matching 2.4GHz Matching 33nH 22nH 18nH 12nH 5.6nH 2.7nH 12nH 4.7nH 2.7nH 39pF 15pF 8.2pF 2.7pF 1.8pF 1.2pF n/a 1.5pF 1.5pF 240 390 390 n/a 15pF 8.2pF n/a 1.8pF 2.2pF n/a 15pF 2.7pF n/a 2.2pF 1.2pF n/a 6.8nH 4.7nH n/a 5.6nH 2.2nH n/a LDB211G9010C-001 LDB212G4005C-001 Figure 6. Evaluation Circuit Schematic for 1.2GHz, 1.9GHz and 2.4GHz Applications 5503f 17 LT5503 U W U U APPLICATIO S I FOR ATIO QIN IIN VCC4 GND VCC1 LT1807 V2 LT1807 V3 V4 V1 MODRFIN MODRFOUT LT5503 IC LO1IN LO2IN GND 1 2 3 4 5 6 VCC2 VCC3 5503 F07 MIXRFOUT Figure 7. LT5503 Evaluation Board Layout 5503f 18 LT5503 U W U U APPLICATIO S I FOR ATIO + - DUAL SIGNAL GENERATOR POWER SUPPLY 4 0 + 90 - QIN POWER SUPPLY 1 IIN VCC4 GND LT1807 MODRFIN V2 SPECTRUM ANALYZER LT1807 V3 V1 V4 MODRFOUT SIGNAL GENERATOR 1 SIGNAL GENERATOR 1 LT5503 IC 1 2 3 4 5 6 LO1IN GND VCC2 LO2IN VCC3 + - + POWER SUPPLY 2 POWER SUPPLY 3 MIXRFOUT - EXTERNAL 3dB ATTENUATOR PAD, OR 2.45GHz BPF 5503 F08 Figure 8. Test Set-Up for Upconverting Mixer and I/Q Modulator Transmit Chain Measurements. 5503f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LT5503 U PACKAGE DESCRIPTIO FE Package 20-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663) Exposed Pad Variation CB 6.40 - 6.60* (.252 - .260) 3.86 (.152) 3.86 (.152) 20 1918 17 16 15 14 13 12 11 6.60 0.10 2.74 (.108) 4.50 0.10 6.40 2.74 (.252) (.108) BSC SEE NOTE 4 0.45 0.05 1.05 0.10 0.65 BSC 1 2 3 4 5 6 7 8 9 10 RECOMMENDED SOLDER PAD LAYOUT 4.30 - 4.50* (.169 - .177) 0.09 - 0.20 (.0035 - .0079) 0.25 REF 0.50 - 0.75 (.020 - .030) NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2. DIMENSIONS ARE IN (INCHES) 3. DRAWING NOT TO SCALE 1.20 (.047) MAX 0 - 8 0.65 (.0256) BSC 0.195 - 0.30 (.0077 - .0118) TYP 0.05 - 0.15 (.002 - .006) FE20 (CB) TSSOP 0204 4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT5500 RF Front End Dual LNA Gain Setting +13.5dB/-14dB at 2.5GHz, Double-Balanced Mixer, 1.8V VSUPPLY 5.25V LT5502 400MHz Quadrature Demodulator with RSSI 1.8V to 5.25V Supply, 70MHz to 400MHz IF, 84dB Limiting Gain, 90dB RSSI Range LT5504 800MHz to 2.7GHz RF Measuring Reciever 80dB Dynamic Range, Temperature Compensated, 2.7V to 5.5V Supply LT5505 300MHz to 3.5GHz RF Power Detector >40dB Dynamic Range, Temperature Compensated, 2.7V to 6V Supply LT5506 500MHz Quadrature IF Demodulator with VGA 1.8V to 5.25V Supply, 40MHz to 500MHz IF, -4dB to 57dB Linear Power Gain LTC5507 100kHz to 1GHz RF Power Detector 48dB Dynamic Range, Temperature Compensated, 2.7V to 6V Supply LTC5508 300MHz to 7GHz RF Power Detector SC70 Package LTC5509 300MHz to 3GHz RF Power Detector 36dB Dynamic Range, SC70 Package LT5511 High Signal Level Up Converting Mixer RF Output to 3GHz, 17dBm IIP3, Integrated LO Buffer LT5512 High Signal Level Down Converting Mixer DC-3GHz, 20dBm IIP3, Integrated LO Buffer LT5515 1.5GHz to 2.5GHz Direct Conversion Demodulator 20dBm IIP3, Integrated LO Quadrature Generator LT5516 0.8GHz to 1.5GHz Direct Conversion Quadrature Demodulator 21.5dBm IIP3, Integrated LO Quadrature Generator LT5522 600MHz to 2.7GHz High Signal Level Mixer 25dBm IIP3 at 900MHz, 21.5dBm IIP3 at 1.9GHz, Matched 50 RF and LO Ports, Integrated LO Buffer LTC5532 300MHz to 7GHz Precision RF Power Detector Precision VOUT Offset Control, Adjustable Gain and Offset Voltage 5503f 20 Linear Technology Corporation LT 1107 * PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 www.linear.com (c) LINEAR TECHNOLOGY CORPORATION 2001