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FEATURES
ULTRALOWDRIFT|VGS12/T|≤5µV/°CTYP.
ULTRALOWLEAKAGEIG=80fATYP.
LOWNOISEen=70nV/HzTYP.
LOWCAPACITANCECISS=3pFMAX.
ABSOLUTEMAXIMUMRATINGS@25°C(unlessotherwisenoted)
MaximumTemperatures
StorageTemperature‐65°Cto+150°C
OperatingJunctionTemperature+150°C
MaximumVoltageandCurrentforEachTransistorNote1
VGSSGateVoltagetoDrainorSource40V
VDSODraintoSourceVoltage40V
IG
(
f
)
GateForwardCurrent10mA
IGGateReverseCurrent10µA
MaximumPowerDissipation
DeviceDissipation@FreeAirTotal400mW@+125°C
MATCHINGCHARACTERISTICS@25°CUNLESSOTHERWISENOTED
SYMBOLCHARACTERISTICSVALUEUNITSCONDITIONS
|VGS12/T|max.DRIFTVS.
TEMPERATURE
5µV/°CVDG=10V,ID=30µA
TA=55°Cto+125°C
|VGS12|max.OFFSETVOLTAGE25mVVDG=10V,ID=30µA
ELECTRICALCHARACTERISTICS@25°C(unlessotherwisenoted)
SYMBOLCHARACTERISTICSMIN.TYP.MAX.UNITSCONDITIONS
BVGSSBreakdownVoltage4060 ‐‐ VVDS=0ID=1nA
BVGGOGateToGateBreakdown40 ‐‐ ‐‐ V IG=1nAID=0IS=0
YfSS
TRANSCONDUCTANCE
FullConduction
70
300
500
µmho
VDG=10VVGS=0Vf=1kHz
YfSTypicalOperation50100200µmho VDG=10VID=30µAf=1kHz
|YFS12/YFS|Mismatch ‐‐ 0.63%
IDSS
DRAINCURRENT
FullConduction
0.5
‐‐
10
mA
VDG=10VVGS=0V
|IDSS12/IDSS|MismatchatFullConduction ‐‐ 15%
VGS(off)orV
p
GATEVOLTAGE
Pinchoffvoltage
0.6
2
4.5
V
VDS=10VID=1nA
VGS(on)OperatingRange ‐‐ ‐‐ 4V VDS=10VID=30µA
IGmax.
GATECURRENT
Operating
‐‐
‐‐
0.1
pA
VDG=10VID=30µA
IGmax.HighTemperature ‐‐ ‐‐ 0.1nATA=+125°C
IGSSmax.AtFullConduction ‐‐ ‐‐ 0.2pAVDS =0
IGSSmax.HighTemperature550.5nAVGS=0V,VGS=‐20V,TA=+125°C
IGGOGatetoGateLeakage ‐‐ 1 ‐‐ pAVGG =20V
YOSS
OUTPUTCONDUCTANCE
FullConduction
‐‐
‐‐
5
µmho
VDG=10VVGS=0V
YOSOperating ‐‐ ‐‐ 0.5µmhoVDG=10VID=30µA
CMR
COMMONMODEREJECTION
20log|VGS12/VDS|
‐‐
90
‐‐
dB
VDS=10to20VID=30µA
20log|VGS12/VDS|‐‐ 90 ‐‐ VDS=5to10VID=30µA
NF
NOISE
Figure
‐‐
‐‐
1
dB
VDS=10VVGS=0VRG=10MΩ
f=100HzNBW=6Hz
enVoltage ‐‐ 2070nV/HzVDS=10VID=30µAf=10HzNBW=1Hz
CISS
CAPACITANCE
Input
‐‐
‐‐
3
pF
VDS=10V,VGS=0V,f=1MHz
CRSSReverseTransfer ‐‐ ‐‐ 1.5pFVDS=10V,VGS=0V,f=1MHz
CDDDraintoDrain ‐‐ ‐‐ 0.1pFVDS=10V,ID=30µA
LS830
MONOLITHIC DUAL
N-CHANNEL JFET
Linear S
y
stems Ultra Low Leaka
g
e Low Drift Monolithic Dual JFET
LS830 Applications:
Wideband Differential Amps
High-Speed,Temp-Compensated Single-
Ended Input Amps
High-Speed Comparators
Impedance Converters and vibrations
detectors.
The LS830 is a high-performance monolithic dual
JFET featuring extremely low noise, tight offset voltage
and low drift over temperature specifications, and is
targeted for use in a wide range of precision
instrumentation applications. The LS830 features a 5-
mV offset and 10-µV/°C drift.
The hermetically sealed TO-71 & TO-78 packages are
well suited for military applications.
(See Packaging Information).
Available Packages:
LS830 / LS830 in TO-71 & TO-78
LS830 / LS830 available as bare die
Please contact Micross for full
p
acka
g
e and die dimensions
Note 1 – These ratings are limiting values above which the serviceability of any semiconductor may be impaired
Tel: +44 1603 788967
Email: chipcomponents@micross.com
Web: http://www.micross.com/distribution
TO-71 & TO-78 (Top View)