MMBT2222AWT1/D - ON Semiconductor

Motorola Small–Signal Transistors, FETs and Diodes Device Data

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NPN Silicon

These transistors are designed for general purpose amplifier applica-

tions. They are housed in the SOT–323/SC–70 package which is

designed for low power surface mount applications.

MAXIMUM RATINGS

Rating Symbol Value Unit

Collector–Emitter Voltage VCEO 40 Vdc

Collector–Base Voltage VCBO 75 Vdc

Emitter–Base Voltage VEBO 6.0 Vdc

Collector Current — Continuous IC600 mAdc

THERMAL CHARACTERISTICS

Characteristic Symbol Max Unit

Total Device Dissipation FR–5 Board

TA = 25°CPD150 mW

Thermal Resistance Junction to Ambient R

JA 833 °C/W

Junction and Storage Temperature TJ, Tstg –55 to +150 °C

DEVICE MARKING

MMBT2222AWT1 = 1P

ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)

Characteristic Symbol Min Max Unit

OFF CHARACTERISTICS

Collector–Emitter Breakdown Voltage(1)

(IC = 1.0 mAdc, IB = 0) V(BR)CEO 40 — Vdc

Collector–Base Breakdown Voltage

(IC = 10

Adc, IE = 0) V(BR)CBO 75 — Vdc

Emitter–Base Breakdown Voltage

(IE = 10

Adc, IC = 0) V(BR)EBO 6.0 — Vdc

Base Cutoff Current

(VCE = 60 Vdc, VEB = 3.0 Vdc) IBL —20 nAdc

Collector Cutoff Current

(VCE = 60 Vdc, VEB = 3.0 Vdc) ICEX — 10 nAdc

1. Pulse Test: Pulse Width

300

s, Duty Cycle

2.0%.

Thermal Clad is a registered trademark of the Berquist Company.

Preferred devices are Motorola recommended choices for future use and best overall value.

Order this document

by MMBT2222A WT1/D

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SEMICONDUCTOR TECHNICAL DATA



Motorola Preferred Device

CASE 419–02, STYLE 3

SOT–323/SC–70

 Motorola, Inc. 1997

COLLECTOR

BASE

EMITTER

MMBT2222AWT1

2 Motorola Small–Signal Transistors, FETs and Diodes Device Data

ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued)

Characteristic Symbol Min Max Unit

ON CHARACTERISTICS(1)

DC Current Gain (1)

(IC = 0.1 mAdc, VCE = 10 Vdc)

(IC = 1.0 mAdc, VCE = 10 Vdc)

(IC = 10 mAdc, VCE = 10 Vdc)

(IC = 150 mAdc, VCE = 10 Vdc)

(IC = 500 mAdc, VCE = 10 Vdc)

HFE 35

100

—

Collector–Emitter Saturation V oltage (1)

(IC = 150 mAdc, IB = 15 mAdc)

(IC = 500 mAdc, IB = 50 mAdc)

VCE(sat) —

—0.3

1.0

Vdc

Base–Emitter Saturation V oltage (1)

(IC = 150 mAdc, IB = 15 mAdc)

(IC = 500 mAdc, IB = 50 mAdc)

VBE(sat) 0.6

—1.2

2.0

Vdc

SMALL–SIGNAL CHARACTERISTICS

Current–Gain — Bandwidth Product

(IC = 20 mAdc, VCE = 20 Vdc, f = 100 MHz) fT300 — MHz

Output Capacitance

(VCB = 10 Vdc, IE = 0, f = 1.0 MHz) Cobo —8.0 pF

Input Capacitance

(VEB = 0.5 Vdc, IC = 0, f = 1.0 MHz) Cibo —30 pF

Input Impedance

(VCE = 10 Vdc, IC = 10 mAdc, f = 1.0 kHz) hie 0.25 1.25 k ohms

Voltage Feedback Ratio

(VCE = 10 Vdc, IC = 10 mAdc, f = 1.0 kHz) hre — 4.0 X 10–4

Small–Signal Current Gain

(VCE = 10 Vdc, IC = 10 mAdc, f = 1.0 kHz) hfe 75 375 —

Output Admittance

(VCE = 10 Vdc, IC = 10 mAdc, f = 1.0 kHz) hoe 25 200

mhos

Noise Figure

(VCE = 10 Vdc, IC = 100

Adc, RS = 1.0 k ohms, f = 1.0 kHz) NF — 4.0 dB

SWITCHING CHARACTERISTICS

Delay T ime (VCC = 3.0 Vdc, VBE = –0.5 Vdc, td— 10

Rise T ime

(CC ,BE ,

IC = 150 mAdc, IB1 = 15 mAdc) tr— 25

Storage T ime (VCC = 30 Vdc, IC = 150 mAdc, ts— 225

Fall T ime

(CC ,C,

IB1 = IB2 = 15 mAdc) tf— 60

1. Pulse Test: Pulse Width

300

s, Duty Cycle

2.0%.

MMBT2222AWT1

Motorola Small–Signal Transistors, FETs and Diodes Device Data

INFORMATION FOR USING THE SOT–323/SC–70 SURFACE MOUNT PACKAGE

MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS

Surface mount board layout is a critical portion of the total

design. The footprint for the semiconductor packages must

be the correct size to insure proper solder connection

interface between the board and the package. With the

correct pad geometry, the packages will self align when

subjected to a solder reflow process.

SOT–323/SC–70

inches

0.035

0.9

0.075

0.7

1.9

0.028

0.65

0.025

0.65

0.025

SOT–323/SC–70 POWER DISSIPATION

The power dissipation of the SOT–323/SC–70 is a function

of the pad size. This can vary from the minimum pad size for

soldering to a pad size given for maximum power dissipation.

Power dissipation for a surface mount device is determined

by TJ(max), the maximum rated junction temperature of the

die, RθJA, the thermal resistance from the device junction to

ambient, and the operating temperature, TA. Using the

values provided on the data sheet for the SOT–323/SC–70

package, PD can be calculated as follows:

PD = TJ(max) – TA

RθJA

The values for the equation are found in the maximum

ratings table on the data sheet. Substituting these values into

the equation for an ambient temperature T A of 25°C, one can

calculate the power dissipation of the device which in this

case is 150 milliwatts.

PD = 150°C – 25°C

833°C/W = 150 milliwatts

The 833°C/W for the SOT–323/SC–70 package assumes

the use of the recommended footprint on a glass epoxy

printed circuit board to achieve a power dissipation of

150 milliwatts. There are other alternatives to achieving

higher power dissipation from the SOT–323/SC–70

package. Another alternative would be to use a ceramic

substrate or an aluminum core board such as Thermal

Clad. Using a board material such as Thermal Clad, an

aluminum core board, the power dissipation can be doubled

using the same footprint.

SOLDERING PRECAUTIONS

The melting temperature of solder is higher than the rated

temperature of the device. When the entire device is heated

to a high temperature, failure to complete soldering within a

short time could result in device failure. Therefore, the

following items should always be observed in order to

minimize the thermal stress to which the devices are

subjected.

•Always preheat the device.

•The delta temperature between the preheat and

soldering should be 100°C or less.*

•When preheating and soldering, the temperature of the

leads and the case must not exceed the maximum

temperature ratings as shown on the data sheet. When

using infrared heating with the reflow soldering method,

the difference shall be a maximum of 10°C.

•The soldering temperature and time shall not exceed

260°C for more than 10 seconds.

•When shifting from preheating to soldering, the

maximum temperature gradient shall be 5°C or less.

•After soldering has been completed, the device should

be allowed to cool naturally for at least three minutes.

Gradual cooling should be used as the use of forced

cooling will increase the temperature gradient and result

in latent failure due to mechanical stress.

•Mechanical stress or shock should not be applied during

cooling.

* Soldering a device without preheating can cause excessive

thermal shock and stress which can result in damage to the

device.

MMBT2222AWT1

4 Motorola Small–Signal Transistors, FETs and Diodes Device Data

PACKAGE DIMENSIONS

CASE 419–02

ISSUE H

SOT–323/SC–70

CRN

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A0.071 0.087 1.80 2.20

B0.045 0.053 1.15 1.35

C0.035 0.049 0.90 1.25

D0.012 0.016 0.30 0.40

G0.047 0.055 1.20 1.40

H0.000 0.004 0.00 0.10

J0.004 0.010 0.10 0.25

K0.017 REF 0.425 REF

L0.026 BSC 0.650 BSC

N0.028 REF 0.700 REF

R0.031 0.039 0.80 1.00

S0.079 0.087 2.00 2.20

V0.012 0.016 0.30 0.40

0.05 (0.002) STYLE 3:

PIN 1. BASE

2. EMITTER

3. COLLECTOR

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MMBT2222AWT1/D

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