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ESD0P8RFL
RF ESD Protection Diodes
• ESD protection of RF antenna /
interfaces or ultra high speed data lines acc. to:
IEC61000-4-2 (ESD): ± 20 kV (air / contact)
IEC61000-4-4 (EFT): 40 A (5/50 ns)
IEC61000-4-5 (surge): 10 A (8/20 µs)
• Very low line capacitance: 0.8 pF @ 1 GHz
( 0.4 pF per diode)
• Ultra low series inductance: 0.4 nH per diode
• Very low clamping voltage
• Ultra small leadless package 1.2 x 0.8 x 0.39 mm
• Pb-free (RoHS compliant) package
Applications in anti-parallel configuration
• For low RF signal levels without superimposed
DC voltage: e.g. GPS, XM-Radio, Sirius, DVB,
DMB, DAB, Remote Keyless Entry
Applications in rail-to-rail configuration
• For high RF signal levels or low RF signal levels
with superimposed DC voltage: e.g. HDMI, S-ATA,
Gbit Ethernet
• For more technical details on ESD and Antenna
protection please refer to Application Note
No.103 on www.infineon.com/tvsdiodes
ESD0P8RFL
21
4
D2
D1
3
Type Package Configuration Marking
ESD0P8RFL TSLP-4-7 anti-parallel E8
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Maximum Ratings at T
A
= 25°C, unless otherwise specified
Parameter Symbol Value Unit
ESD contact discharge1) VESD 20 kV
Peak pulse current (t
p
= 8 / 20 µs)2) I
pp
10 A
Operating temperature range To
p
-55...150 °C
Storage temperature Tst
g
-65...150
Electrical Characteristics at T
A
= 25°C, unless otherwise specified
Parameter Symbol Values Unit
min. typ. max.
Characteristics -
Reverse working voltage3) VRWM - - 50 V
Reverse current3)
VR = 50 V
IR- - 100 nA
Forward clamping voltage2)
IPP = 10 A
VFC - 12 15 V
Line capacitance4)
VR = 0 V, f = 1 GHz
CT- 0.8 - pF
Series inductance (per diode) LS- 0.4 - nH
1VESD according to IEC61000-4-2, only valid in anti-parallel or rail-to-rail connection.
Please refer to the application examples.
2Ipp according to IEC61000-4-5, only valid in anti-parallel or rail-to-rail connection.
Please refer to the application examples.
3Only valid in rail-to-rail configuration with VCC ≥VRWM
4Total capacitance line to ground (2 diodes in parallel)
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Forward clamping voltage VFC = ƒ(IPP)
tp = 8 / 20 µs
12345678A10
Ipp
0
1
2
3
4
5
6
7
8
9
10
V
12
VFC
Reverse current IR = ƒ(VR)
TA = Parameter
leakage in rail-to-rail configuration
0 10 20 30 40 50 V70
VR
-12
10
-11
10
-10
10
-9
10
-8
10
-7
10
-6
10
-5
10
A
IR
-40°C
25°C
85°C
125°C
Forward current IF = ƒ (VF)
TA = Parameter
leakage in anti-parallel configuration
-600 -400 -200 0 200 mV 600
VF
-100
-80
-60
-40
-20
0
20
40
60
µA
100
IF
-40°C
-40°C
25°C
25°C
85°C
85°C
125°C
125°C
Line capacitance CT = ƒ (f)
VR = 0 V
0 500 1000 1500 2000 MHz 3000
f
0
0.5
pF
1.5
CT
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Insertion loss IL = -|S21|2 = ƒ(f)
VR = 0 V, Z = 50 Ω
0 500 1000 1500 2000 MHz 3000
f
-1
-0.9
-0.8
-0.7
-0.6
-0.5
-0.4
-0.3
-0.2
dB
0
|S21|²
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1. Application example
1 RF signal channel, anti-parallel configuration,
please refer also to Application Note No.103
The protection diode should be
placed very close to the location
where the ESD or other transients
can occur to keep loops and
inductances as small as possible.
Grounded pins should be
connected in parallel directly to a
ground plane on the board.
ESD
sensitive
circuit
I/O
1 protected signal line,
superimposed DC voltage up to
±VF (diode forward volatge)
Line to ground capacitance
0.8 pF @1 GHz
2. Application example
1 RF signal channel, rail-to-rail configuration
Cathode of one diode should be
connected to the positive supply
voltage +Vcc and anode of the
opposite diode should be
connected directly to a ground
plane on the board. Clamped
input voltage at I/O port is limited
to Vcc + VF at positive transients
and 0V - VF at negative transients
(VF ... diode forward voltage
drop).
+Vcc
ESD
sensitive
circuit
I/O
1 protected signal line,
superimposed DC voltage up to
+Vcc (voltage supply)
Line to ground capacitance
0.8 pF @1 GHz
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Package TSLP-4-7
1
2
4
3
3
4
0.05 MAX.
+0.01
0.39
-0.03
1) Dimension applies to plated terminal
1
2
±0.05
0.8
0.45
±0.05
4x
0.25
1)
±0.035
±0.0351)
4 x 0.35
0.75±0.05
1.2±0.05
Bottom viewTop view
Pin 1 marking
1.05
4
1.45
0.5
Pin 1
marking
8
Reel ø180 mm = 15.000 Pieces/Reel
For board assembly information please refer to Infineon website "Packages"
Package Outline
Foot Print
Marking Layout (Example)
Standard Packing
Stencil apertures
Copper Solder mask
1.18
0.28
0.22
0.28
0.38
0.38
0.42
0.78
1.2
0.3
0.2
0.3
0.4
0.4
0.4
0.8
BAR90-07LRH
Type code
Pin 1 marking
Laser marking
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Edition 2009-11-16
Published by
Infineon Technologies AG
81726 Munich, Germany
2009 Infineon Technologies AG
All Rights Reserved.
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The information given in this document shall in no event be regarded as a guarantee
of conditions or characteristics. With respect to any examples or hints given herein,
any typical values stated herein and/or any information regarding the application of
the device, Infineon Technologies hereby disclaims any and all warranties and
liabilities of any kind, including without limitation, warranties of non-infringement of
intellectual property rights of any third party.
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For further information on technology, delivery terms and conditions and prices,
please contact the nearest Infineon Technologies Office (<www.infineon.com>).
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For information on the types in question, please contact the nearest Infineon
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device or system or to affect the safety or effectiveness of that device or system.
Life support devices or systems are intended to be implanted in the human body or
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