MCP1321T-29LE/OT - MICROCHIP TECHNOLOGY

MCP131X/2X

Features

• Low Supply Current: 1 µA (Typical),10 µA (Max.)

• Precision Monitoring Trip Point Options:

- 2.9V and 4.6V (Standard Offerings)

- 2.0V to 4.7V in 100 mV Increments,

(Contact th e loca l Microchip Sales Office)

• Resets Microcontroller in a Power-loss Event

• Reset Delay Time Out Option:

- 1.4 ms, 30 ms, 200 ms, or 1.6s (Typical)

• Watchdog Timer Input Time Out Options:

- 6.3 ms, 102 ms, 1.6s, or 25.6s (Typical)

• Manual Reset (MR) Input (Active-low)

• Single and Complementary Reset Output(s)

• Reset Output Options:

- Push-Pull (Active-high or Active-low)

- Open-Drain (Internal or External Pull-up)

• Temperature Range:

- -40°C to +85°C for T rip Points 2.0 to 2.4V and,

- -40°C to + 125°C for Trip Points > 2.5V

• Voltage Range: 1.0V to 5.5V

• Lead Free Packaging

Description

The MCP131X/2X are voltage supervisor devices

designed to keep a microcontroller in Reset until the

system voltage has reached and stabilized at the

proper level for reliable system operation. The table

below shows the available features for these devices.

Package Types

Block Diagram

Device Features

MCP1317

MCP1318/18M/21

MCP1319/19M/22

MCP1316/16M/20 SOT-23-5

RST RST

VSS

MR WDI

VDD VDD

RST

VSS

MR WDI

VSS

RST WDI

VDD RST

VSS

RST MR

VDD

Comparator

–Output

Driver

RST

Reference

VSS

RST

Noise Filter

Watchdog

WDI

Note: Features available depend on the device

Voltage

Device

Reset Output A Reset Output B

WDI Input MR Input

Type Pull-up

Resistor Active

Level Type Pull-up

Resistor Active

Level

MCP1316 Push-Pull — Low — — — Yes Yes

MCP1316M Open-Drain Internal Low — — — Yes Yes

MCP1317 Push-Pull — High — — — Yes Yes

MCP1318 Push-Pull — Low Push-Pull — High Yes No

MCP1318M Open-Drain Internal Low Push-Pull — High Yes No

MCP1319 Push-Pull — Low Push-Pull — High No Yes

MCP1319M Open-Drain Internal Low Push-Pull — High No Yes

MCP1320 Open-Drain External Low — — — Yes Yes

MCP1321 Open-Drain External Low Push-Pull — High Yes No

MCP1322 Open-Drain External Low Push-Pull — High No Yes

Voltage Supervisor

MCP131X/2X

NOTES:

MCP131X/2X

1.0 ELECTRICAL

CHARACTERISTICS

Absolute Maximum Ratings†

Supply Voltage (VDD to VSS). . . . . . . . . . . . . . . . . . . . . . 7.0V

Input current (VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 mA

Output current (RST) . . . . . . . . . . . . . . . . . . . . . . . . . .10 mA

Voltage on all inputs and outputs, except Open-Drain RST

(with no internal pull-up resistor), w.r. t. VSS . .-0.6V to (VDD +

1.0V)

Vol t age on Open-Drain RST

(with no internal pull-up resistor) w.r.t. VSS . . -0.6V to 13.5V

St orage temperature . . . . . . . . . . . . . . . . . . .-65°C to +150°C

Ambient temp. with power applied . . . . . . . .-40°C to +125°C

Maximum Junction temp. with power applied. . . . . . .+150°C

Power Dissipation (TA ≤ +70°C):

5-Pin SOT-23A.......................... ................... ..........240 mW

ESD protection on all pins..................................................≥ 4kV

† Notice: Stresses above those listed under “ Maximum Rat-

ings” may cause permanent damage to the devic e. This is a

stress rating only and functional operation of the device at

those or any other conditions above those indicated in the

operational listings of this specification is not implied. Expo-

sure to max imum rati ng conditions for extended periods may

affect device reliability.

DC CHARACTERISTICS

Electrical Specifications: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ

(only MCP1320, MCP1321 and MCP1322), TA = -40°C to +125°C.

Parameters Sym Min Typ Max Units Conditions

Operati ng Volt age Range VDD 1.0 — 5.5 V

Specified VDD Value to VOUT Low VDD 1.0 — — V I RST = 10 µA, V RST < 0.3V

Operati ng Curren t: IDD — 5 10 µA Watchdog Timer Active

— 1 2 µA Watchdog Timer Inactive

—12µAV

DD < VTRIP

— 5 10 µA Rese t Delay Timer Active

Note 1: Trip point is ±1.5% from typical value.

2: Trip point is ±2.5% from typical value.

3: Hysteresis is minimum = 1%, maximum = 6% at +25°C.

4: This specification allows this device to be used in PIC® microcontroller applications that require the In-

Circuit Serial Programming™ (ICSP™) feature (see device-specific programming specifications for

voltage requirements). The total time that the RST pin can be above the maximum device operational

voltage (5.5V) is 100s. Current into the RST pin should be limited to 2 mA. It is recommended that the

device operational temperature be maintained between 0°C to +70°C (+25°C preferred). For additional

information, refer to Figure 2-35.

5: This parameter is established by characterization and is not 100% tested.

6: Custom ordered voltage trip point; minimum order volume requirement. Information available upon request.

MCP131X/2X

VDD Trip Point MCP13XX-20 VTRIP 1.970 2.00 2.030 V TA = +25°C (Note 1)

(Note 6)1.950 2.00 2.050 V TA = -40°C to +85°C (Note 2)

MCP13XX-21 2.069 2.10 2.132 V TA = +25°C (Note 1)

(Note 6)2.048 2.10 2.153 V TA = -40°C to +85°C (Note 2)

MCP13XX-22 2.167 2.20 2.233 V TA = +25°C (Note 1)

(Note 6)2.145 2.20 2.255 V TA = -40°C to +85°C (Note 2)

MCP13XX-23 2.266 2.30 2.335 V TA = +25°C (Note 1)

(Note 6)2.243 2.30 2.358 V TA = -40°C to +85°C (Note 2)

MCP13XX-24 2.364 2.40 2.436 V TA = +25°C (Note 1)

(Note 6)2.340 2.40 2.460 V TA = -40°C to +85°C (Note 2)

MCP13XX-25 2.463 2.50 2.538 V TA = +25°C (Note 1)

(Note 6)2.438 2.50 2.563 V TA = -40°C to +125°C (Note 2)

MCP13XX-26 2.561 2.60 2.639 V TA = +25°C (Note 1)

(Note 6)2.535 2.60 2.665 V TA = -40°C to +125°C (Note 2)

MCP13XX-27 2.660 2.70 2.741 V TA = +25°C (Note 1)

(Note 6)2.633 2.70 2.768 V TA = -40°C to +125°C (Note 2)

MCP13XX-28 2.758 2.80 2.842 V TA = +25°C (Note 1)

(Note 6)2.730 2.80 2.870 V TA = -40°C to +125°C (Note 2)

MCP13XX-29 2.857 2.90 2.944 V TA = +25°C (Note 1)

2.828 2.90 2.973 V TA = -40°C to +125°C (Note 2)

MCP13XX-30 2.955 3.00 3.045 V TA = +25°C (Note 1)

(Note 6)2.925 3.00 3.075 V TA = -40°C to +125°C (Note 2)

MCP13XX-31 3.054 3.10 3.147 V TA = +25°C (Note 1)

(Note 6)3.023 3.10 3.178 V TA = -40°C to +125°C (Note 2)

MCP13XX-32 3.152 3.20 3.248 V TA = +25°C (Note 1)

(Note 6)3.120 3.20 3.280 V TA = -40°C to +125°C (Note 2)

MCP13XX-33 3.251 3.30 3.350 V TA = +25°C (Note 1)

(Note 6)3.218 3.30 3.383 V TA = -40°C to +125°C (Note 2)

DC CHARACTERISTICS (CONTINUE D)

Electrical Specifications: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ

(only MCP1320, MCP1321 and MCP1322), TA = -40°C to +125°C.

Parameters Sym Min Typ Max Units Conditions

Note 1: Trip point is ±1.5% from typical value.

2: Trip point is ±2.5% from typical value.

3: Hysteresis is minimum = 1%, maximum = 6% at +25°C.

4: This specification allows this device to be used in PIC® microcontroller applications that require the In-

Circuit Serial Programming™ (ICSP™) feature (see device-specific programming specifications for

voltage requirements). The total time that the RST pin can be above the maximum device operational

voltage (5.5V) is 100s. Current into the RST pin should be limited to 2 mA. It is recommended that the

device operational temperature be maintained between 0°C to +70°C (+25°C preferred). For additional

information, refer to Figure 2-35.

5: This parameter is established by characterization and is not 100% tested.

6: Custom ordered voltage trip point; minimum order volume requirement. Information available upon request.

MCP131X/2X

VDD Trip Point (Con’t) MCP13XX-34 VTRIP 3.349 3.40 3.451 V TA = +25°C (Note 1)

(Note 6)3.315 3.40 3.385 V TA = -40°C to +125°C (Note 2)

MCP13XX-35 3.448 3.50 3.553 V TA = +25°C (Note 1)

(Note 6)3.413 3.50 3.588 V TA = -40°C to +125°C (Note 2)

MCP13XX-36 3.546 3.60 3.654 V TA = +25°C (Note 1)

(Note 6)3.510 3.60 3.690 V TA = -40°C to +125°C (Note 2)

MCP13XX-37 3.645 3.70 3.756 V TA = +25°C (Note 1)

(Note 6)3.608 3.70 3.793 V TA = -40°C to +125°C (Note 2)

MCP13XX-38 3.743 3.80 3.857 V TA = +25°C (Note 1)

(Note 6)3.705 3.80 3.895 V TA = -40°C to +125°C (Note 2)

MCP13XX-39 3.842 3.90 3.959 V TA = +25°C (Note 1)

(Note 6)3.803 3.90 3.998 V TA = -40°C to +125°C (Note 2)

MCP13XX-40 3.940 4.00 4.060 V TA = +25°C (Note 1)

(Note 6)3.900 4.00 4.100 V TA = -40°C to +125°C (Note 2)

MCP13XX-41 4.039 4.10 4.162 V TA = +25°C (Note 1)

(Note 6)3.998 4.10 4.203 V TA = -40°C to +125°C (Note 2)

MCP13XX-42 4.137 4.20 4.263 V TA = +25°C (Note 1)

(Note 6)4.095 4.20 4.305 V TA = -40°C to +125°C (Note 2)

MCP13XX-43 4.236 4.30 4.365 V TA = +25°C (Note 1)

(Note 6)4.193 4.30 4.408 V TA = -40°C to +125°C (Note 2)

MCP13XX-44 4.334 4.40 4.466 V TA = +25°C (Note 1)

(Note 6)4.290 4.40 4.510 V TA = -40°C to +125°C (Note 2)

MCP13XX-45 4.433 4.50 4.568 V TA = +25°C (Note 1)

(Note 6)4.388 4.50 4.613 V TA = -40°C to +125°C (Note 2)

MCP13XX-46 4.531 4.60 4.669 V TA = +25°C (Note 1)

4.485 4.60 4.715 V TA = -40°C to +125°C (Note 2)

MCP13XX-47 4.630 4.70 4.771 V TA = +25°C (Note 1)

(Note 6)4.583 4.70 4.818 V TA = -40°C to +125°C (Note 2)

VDD Trip Point Tempco TTPCO — ±40 — ppm/°C

DC CHARACTERISTICS (CONTINUE D)

Electrical Specifications: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ

(only MCP1320, MCP1321 and MCP1322), TA = -40°C to +125°C.

Parameters Sym Min Typ Max Units Conditions

Note 1: Trip point is ±1.5% from typical value.

2: Trip point is ±2.5% from typical value.

3: Hysteresis is minimum = 1%, maximum = 6% at +25°C.

4: This specification allows this device to be used in PIC® microcontroller applications that require the In-

Circuit Serial Programming™ (ICSP™) feature (see device-specific programming specifications for

voltage requirements). The total time that the RST pin can be above the maximum device operational

voltage (5.5V) is 100s. Current into the RST pin should be limited to 2 mA. It is recommended that the

device operational temperature be maintained between 0°C to +70°C (+25°C preferred). For additional

information, refer to Figure 2-35.

5: This parameter is established by characterization and is not 100% tested.

6: Custom ordered voltage trip point; minimum order volume requirement. Information available upon request.

MCP131X/2X

Threshold Hysteresis MCP13XX-20 VHYS 0.020 —0.120 V TA = +25°C (Note 3)

(Note 3)(Note 6) (Note 6)V TA = -40°C to +85°C

MCP13XX-21 0.021 —0.126 V TA = +25°C (Note 3)

(Note 6) (Note 6)V TA = -40°C to +85°C

MCP13XX-22 0.022 —0.132 V TA = +25°C (Note 3)

(Note 6) (Note 6)V TA = -40°C to +85°C

MCP13XX-23 0.023 —0.138 V TA = +25°C (Note 3)

(Note 6) (Note 6)V TA = -40°C to +85°C

MCP13XX-24 0.024 —0.144 V TA = +25°C (Note 3)

(Note 6) (Note 6)V TA = -40°C to +85°C

MCP13XX-25 0.025 —0.150 V TA = +25°C (Note 3)

(Note 6) (Note 6)V TA = -40°C to +125°C

MCP13XX-26 0.026 —0.156 V TA = +25°C (Note 3)

(Note 6) (Note 6)V TA = -40°C to +125°C

MCP13XX-27 0.027 —0.162 V TA = +25°C (Note 3)

(Note 6) (Note 6)V TA = -40°C to +125°C

MCP13XX-28 0.028 —0.168 V TA = +25°C (Note 3)

(Note 6) (Note 6)V TA = -40°C to +125°C

MCP13XX-29 0.029 — 0.174 V TA = +25°C (Note 3)

(Note 6)VT

A = -40°C to +125°C

MCP13XX-30 0.030 —0.180 V TA = +25°C (Note 3)

(Note 6) (Note 6)V TA = -40°C to +125°C

MCP13XX-31 0.031 —0.186 V TA = +25°C (Note 3)

(Note 6) (Note 6)V TA = -40°C to +125°C

MCP13XX-32 0.032 —0.192 V TA = +25°C (Note 3)

(Note 6) (Note 6)V TA = -40°C to +125°C

MCP13XX-33 0.033 —0.198 V TA = +25°C (Note 3)

(Note 6) (Note 6)V TA = -40°C to +125°C

DC CHARACTERISTICS (CONTINUE D)

Electrical Specifications: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ

(only MCP1320, MCP1321 and MCP1322), TA = -40°C to +125°C.

Parameters Sym Min Typ Max Units Conditions

Note 1: Trip point is ±1.5% from typical value.

2: Trip point is ±2.5% from typical value.

3: Hysteresis is minimum = 1%, maximum = 6% at +25°C.

4: This specification allows this device to be used in PIC® microcontroller applications that require the In-

Circuit Serial Programming™ (ICSP™) feature (see device-specific programming specifications for

voltage requirements). The total time that the RST pin can be above the maximum device operational

voltage (5.5V) is 100s. Current into the RST pin should be limited to 2 mA. It is recommended that the

device operational temperature be maintained between 0°C to +70°C (+25°C preferred). For additional

information, refer to Figure 2-35.

5: This parameter is established by characterization and is not 100% tested.

6: Custom ordered voltage trip point; minimum order volume requirement. Information available upon request.

MCP131X/2X

Threshold Hysteresis MCP13XX-34 VHYS 0.034 —0.204 V TA = +25°C (Note 3)

(Continued) (Note 3)(Note 6) (Note 6)V TA = -40°C to +125°C

MCP13XX-35 0.035 —0.210 V TA = +25°C (Note 3)

(Note 6) (Note 6)V TA = -40°C to +125°C

MCP13XX-36 0.036 —0.216 V TA = +25°C (Note 3)

(Note 6) (Note 6)V TA = -40°C to +125°C

MCP13XX-37 0.037 —0.222 V TA = +25°C (Note 3)

(Note 6) (Note 6)V TA = -40°C to +125°C

MCP13XX-38 0.038 —0.228 V TA = +25°C (Note 3)

(Note 6) (Note 6)V TA = -40°C to +125°C

MCP13XX-39 0.039 —0.234 V TA = +25°C (Note 1)

(Note 6) (Note 6)V TA = -40°C to +125°C

MCP13XX-40 0.040 —0.240 V TA = +25°C (Note 3)

(Note 6) (Note 6)V TA = -40°C to +125°C

MCP13XX-41 0.041 —0.246 V TA = +25°C (Note 3)

(Note 6) (Note 6)V TA = -40°C to +125°C

MCP13XX-42 0.042 —0.252 V TA = +25°C (Note 3)

(Note 6) (Note 6)V TA = -40°C to +125°C

MCP13XX-43 0.043 —0.258 V TA = +25°C (Note 3)

(Note 6) (Note 6)V TA = -40°C to +125°C

MCP13XX-44 0.044 —0.264 V TA = +25°C (Note 3)

(Note 6) (Note 6)V TA = -40°C to +125°C

MCP13XX-45 0.045 —0.270 V TA = +25°C (Note 3)

(Note 6) (Note 6)V TA = -40°C to +125°C

MCP13XX-46 0.046 — 0.276 V TA = +25°C (Note 3)

(Note 6)VT

A = -40°C to +125°C

MCP13XX-47 0.047 —0.282 V TA = +25°C (Note 3)

(Note 6) (Note 6)V TA = -40°C to +125°C

DC CHARACTERISTICS (CONTINUE D)

Electrical Specifications: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ

(only MCP1320, MCP1321 and MCP1322), TA = -40°C to +125°C.

Parameters Sym Min Typ Max Units Conditions

Note 1: Trip point is ±1.5% from typical value.

2: Trip point is ±2.5% from typical value.

3: Hysteresis is minimum = 1%, maximum = 6% at +25°C.

4: This specification allows this device to be used in PIC® microcontroller applications that require the In-

Circuit Serial Programming™ (ICSP™) feature (see device-specific programming specifications for

voltage requirements). The total time that the RST pin can be above the maximum device operational

voltage (5.5V) is 100s. Current into the RST pin should be limited to 2 mA. It is recommended that the

device operational temperature be maintained between 0°C to +70°C (+25°C preferred). For additional

information, refer to Figure 2-35.

5: This parameter is established by characterization and is not 100% tested.

6: Custom ordered voltage trip point; minimum order volume requirement. Information available upon request.

MCP131X/2X

RST/RST Low-Level Output Voltage VOL ——0.3VI

OL = 50 µA, 1.0V ≤ VDD ≤ 1. 5V

——0.3VI

OL = 100 µA,

1.5V < VDD ≤ 2.5V

——0.3VI

OL = 2 mA, 2.5V < VDD ≤ 4.5V

——0.3VI

OL = 4 mA, VDD > 4.5V

RST/RST High-Level Output Voltage VOH VDD –

0.7 —— VI

OH = 2.5 mA, VDD ≥ 2.5V

(Pus h-Pull Outpu ts only) VDD –

0.7 —— VI

OH = 500 µA, VDD ≥ 1.5V

Input Low Voltage (MR and WDI pins) VIL V

SS —0.3V

DD V

Input H igh Volt ag e (M R a nd WDI pi ns ) V IH 0.7VDD —V

DD V

Open-Drain High Voltage on Output

(Note 4)VODH ——13.5

(4) V Open-Drain Output pin only,

VDD = 3.0V, Time voltage >

5.5V applied ≤ 100 s,

current into pin limited to 2 mA,

+25°C operation

recommended

(Note 4, Note 5)

Input Leakage Current (MR and WDI) IIL ——±1µAV

SS ≤ VPIN ≤ VDD

Open-Drai n Out put Lea ka ge Current

(MCP1316M, MCP1318M,

MCP1319M, MCP1320, MCP1321,

and MCP1322 only)

IOD —0.0031.0 µA

Pull-up Resistance MR pin RPU —52—kΩ V

DD = 5.5V

WDI pin — 52 — kΩ V

DD = 5.5V

RST pin — 4.7 — kΩ V

DD = 5.5V,

MCP131XM devices only

Input Pin Capacitanc e (MR and WDI) CI —100—pF

Output Pin Capacitive Loading

(RST and RST)CO — — 50 pF This is the tester loading to

meet the AC timing

specifications.

DC CHARACTERISTICS (CONTINUE D)

Electrical Specifications: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ

(only MCP1320, MCP1321 and MCP1322), TA = -40°C to +125°C.

Parameters Sym Min Typ Max Units Conditions

Note 1: Trip point is ±1.5% from typical value.

2: Trip point is ±2.5% from typical value.

3: Hysteresis is minimum = 1%, maximum = 6% at +25°C.

4: This specification allows this device to be used in PIC® microcontroller applications that require the In-

Circuit Serial Programming™ (ICSP™) feature (see device-specific programming specifications for

voltage requirements). The total time that the RST pin can be above the maximum device operational

voltage (5.5V) is 100s. Current into the RST pin should be limited to 2 mA. It is recommended that the

device operational temperature be maintained between 0°C to +70°C (+25°C preferred). For additional

information, refer to Figure 2-35.

5: This parameter is established by characterization and is not 100% tested.

6: Custom ordered voltage trip point; minimum order volume requirement. Information available upon request.

MCP131X/2X

FIGURE 1-1: Device Voltage and Reset Pin Waveforms.

TABLE 1-1: DEVICE VOLTAGE AND RESET PIN TIMINGS

Electrical Specifications: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ

(only MCP1320, MCP1321, and MCP1322), TA = -40°C to +125°C.

Parameters Sym Min Typ Max Units Conditions

Falling VDD Trip Poin t Detect ed

to RST or RST Active tRPD — 650 — µs VDD ramped from

VTRIPMAX + 250 mV down to

VTRIPMIN – 200 mV,

VDD falling @ 5 mV/µs,

CL = 50 pF (Note 1)

VDD Rise Rate tRR Note 3

Reset active time

(MR Rising Edge, POR/BOR

Inactive, or WDT time out) to

RST/RST Inactive

tRST 1.0 1.4 2.0 ms Note 2

20 30 40 ms Note 2

140 200 280 ms Standard Time Out

1120 1600 2240 ms Note 2

RST Rise Ti me after RST Active

(Push-Pull Outputs only) tRT — 5 — µs For RST 10% to 90% of VDD,

CL = 50 pF (Note 1)

RST Rise Time after RST Inactive

(Push-Pull Outputs only) —5 —µsFor RST 10% to 90% of VDD,

CL = 50 pF (Note 1)

RST Fall T i me af te r RST Inactive tFT — 5 — µs For RST 90% to 10% of VDD,

CL = 50 pF (Note 1)

RST Fall T i me af te r RST Active — 5 — µs For RST 90% to 10% of VDD,

CL = 50 pF (Note 1)

Note 1: These parameters are for design guidance only and are not 100% tested.

2: Custom ordered Reset active time; minimum order volume requirement.

3: Designed to be independe nt of VDD rise rate. Device characterization was done with a rise rate as slow as

0.1 V/s (@ +25°C).

VTRIPMAX

VTRIPMIN

VTRIP

VDD

VTRIPAC + VHYS

tRST

RST

tRR

tRST

tRPD

VDD < 1 V is outs ide th e device o pera ting sp ecifi cation . The RST (or R ST) output s tat e is

unknown while VDD < 1V.

MCP131X/2X

FIGURE 1-2: MR and Reset Pin Waveforms.

TABLE 1-2: MR AND RESET PIN TIMINGS

FIGURE 1-3: WDI and Reset Pin Waveforms.

TABLE 1-3: WDI AND RESET PIN TIMINGS

Electrical Specifications: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ

(only MCP1320, MCP1321, and MCP1322), TA = -40°C to +125°C.

Parameters Sym Min Typ Max Units Conditions

MR Pulse Width tMR 1— —µs

MR Active to RST/RST Active tMRD — 235 — ns VDD = 5.0V

MR Input Noise filter tNF — 150 — ns VDD = 5.0V

Note 1: These parameters are for design guidance only and are not 100% tested.

Electrical Specifications: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ

(only MCP1320, MCP1321, and MCP1322), TA = -40°C to +125°C.

Parameters Sym Min Typ Max Units Conditions

WDI Puls e Width tWP 50 — — ns

Watchdog Time Out Period tWD 4.3 6.3 9.3 ms Note 1

71 102 153 ms Note 1

1.12 1.6 2.4 sec Standard Time Out

17.9 25.6 38.4 sec Note 1

Note 1: Custom ordered WatchDog Ti mer time out; minimum order volume requirement.

RST

tRST

tMR

RST

tMRD

tNF

RST

WDI (Note 1)tWP

tWD tWD

tRST

Note 1: The WDI pin was a weak pull-up resistor which is disabled after the 1st falling edge on the WDI pin.

MCP131X/2X

TEMP ERATURE CHARACTERISTICS

Electrical Specifications: Unless otherwise noted, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ

(only MCP1316), TA = -40°C to +125°C.

Parameters Sym Min Typ Max Units Conditions

Temperature Ranges

Speci fied Temperature Range TA-40 — +85 °C MCP13XX-25 (or below)

Speci fied Temperature Range TA-40 — +125 °C Except MCP13XX-25 (or below)

Maximum Junction Temperature T J——+150°C

Storage Temperature Range TA-65 — +150 °C

Package Thermal Resistances

Thermal Resistance, 5L-SOT-23 θJA — 220.7 — °C/W

MCP131X/2X

NOTES:

MCP131X/2X

2.0 TYPICAL PERFORMANCE CURVES

Note: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ (only MCP1316;

see Figure 4-1), TA = -40°C to +125°C.

FIGURE 2-1: IDD vs. Temperature (Reset

Power-up Timer Inactive and Watchdog Timer

Inactive) (MCP1318M-4.6).

FIGURE 2-2: IDD vs. Temperature (Reset

Power-up Timer Inactive and Watchdog Timer

Inactive) (MCP1319-2.9).

FIGURE 2-3: IDD vs. Temperature (Reset

Power-up Timer Inactive and Watchdog Timer

Inactive) (MCP1316-2.0).

FIGURE 2-4: IDD vs. Temperature (Reset

Power-up Time r Active) (MCP1318M-4.6).

FIGURE 2-5: IDD vs. Temperature (Reset

Power-up Time r Active) (MCP1319-2.9).

FIGURE 2-6: IDD vs. Temperature (Reset

Power-up Time r Active) (MCP1316-2.0).

Note: The gra phs and tab les prov ided fo llow ing this note are a sta tistic al sum mary b ased on a limit ed numb er of

samples and are provided for informational purposes only. The performance characteristics listed herein

are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified

operating range (e.g., outside specified power supply range) and therefore outside the warranted range.

0.2

0.4

0.6

0.8

1.2

-100 -50 0 50 100 150

(µA)

Temperature (°C)

1.0V 1.5V 2.0V 3.0V 4.3V

4.5V 4.8V 5.0V 5.5V

0.2

0.4

0.6

0.8

1.2

1.4

-100 -50 0 50 100 150

(µA)

Temperature (°C)

1.0V 1.5V 2.5V

2.7V 3.2V 4.0V

4.5V 5.0V 5.5V

0.2

0.4

0.6

0.8

1.2

1.4

1.6

1.8

-100 -50 0 50 100 150

(µA)

Temperature (°C)

1.0V 1.5V 1.8V

2.2V 2.5V 4.0V

4.5V 5.0V 5.5V

-100 -50 0 50 100 150

Idd (µA)

Temperature (°C)

4.8V 5.0V 5.5V

-100 -50 0 50 100 150

(µA)

Temperature (°C)

3.2V 4.0V 4.5V 5.0V 5.5V

-100 -50 0 50 100 150

(µA)

Temperature (°C)

2.2V 2.5V 4.0V 4.5V 5.0V 5.5V

MCP131X/2X

Note: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ (only MCP1316;

see Figure 4-1), TA = -40°C to +125°C.

FIGURE 2-7: IDD vs. Temperature

(Watchdog Timer Active) (MCP1318M-4.6).

FIGURE 2-8: IDD vs. Temperature

(Watchdog Timer Active) (MCP1319-2.9).

FIGURE 2-9: IDD vs. Temperature

(Watchdog Timer Active) (MCP1316-2.0).

-100 -50 0 50 100 150

(µA)

Temperature (°C)

4.8V 5.0V 5.5V

MCP1319 does not

have a Watchdog Timer

-100 -50 0 50 100 150

(µA)

Temperature (°C)

2.2V 2.5V 4.0V 4.5V 5.0V 5.5V

MCP131X/2X

Note: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ (only MCP1316;

see Figure 4-1), TA = -40°C to +125°C.

FIGURE 2-10: IDD vs. VDD (Reset Power-

up Timer Inactive and Watchdog Timer Inactive)

(MCP1318M-4.6).

FIGURE 2-11: IDD vs. VDD (Reset Power-

up Timer Inactive and Watchdog Timer Inactive)

(MCP1319-2.9).

FIGURE 2-12: IDD vs. VDD (Reset Power-

up Timer Inactive and Watchdog Timer Inactive)

(MCP1316-2.0).

FIGURE 2-13: IDD vs. VDD (Reset Power-

up Timer Active or Watchdog Timer Active)

(MCP1318M-4.6).

FIGURE 2-14: IDD vs. VDD (Reset Power-

up Timer Active or Watchdog Timer Active)

(MCP1319-2.9).

FIGURE 2-15: IDD vs. VDD (Reset Power-

up Timer Active or Watchdog Timer Active)

(MCP1316-2.0).

0.2

0.4

0.6

0.8

1.2

0.0 2.0 4.0 6.0

(µA)

(V)

-45°C

+25°C

+90°C

+130°C

0.2

0.4

0.6

0.8

1.2

1.4

0.0 2.0 4.0 6.0

(µA)

(V)

-45°C

+25°C

+90°C

+130°C

0.2

0.4

0.6

0.8

1.2

1.4

1.6

1.8

0.0 2.0 4.0 6.0

(µA)

(V)

-45°C

+25°C

+90°C

+130°C

4.6 4.8 5.0 5.2 5.4 5.6

(µA)

(V)

-45°C +25°C +90°C +130°C

0.0 2.0 4.0 6.0

(µA)

(V)

-45°C +25°C +90°C +130°C

2.0 3.0 4.0 5.0 6.0

(µA)

(V)

-45°C +25°C +90°C +130°C

MCP131X/2X

Note: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ (only MCP1 316 ;

see Figure 4-1), TA = -40°C to +125°C.

FIGURE 2-16: VTRIP and VHYST vs.

Temperature (MCP1318M-4.6).

FIGURE 2-17: VTRIP and VHYST vs.

Temperature (MCP1319-2.9).

FIGURE 2-18: VTRIP and VHYST vs.

Temperature (MCP1316-2.0).

FIGURE 2-19: VOL vs. IOL

(MCP1318M-4.6).

FIGURE 2-20: VOL vs. IOL

(MCP1319-2.9).

FIGURE 2-21: VOL vs. IOL

(MCP1316-2.0).

3.0

3.1

3.2

3.3

3.4

3.5

3.6

3.7

3.8

3.9

4.0

4.550

4.600

4.650

4.700

4.750

4.800

-50 0 50 100 150

VTRIP Hyst (%)

TRIP

(V)

Temperature (°C)

VHYST

VTRIP Down

VTRIP Up

3.0

3.1

3.2

3.3

3.4

3.5

2.880

2.900

2.920

2.940

2.960

2.980

3.000

3.020

-50 0 50 100 150

VTRIP Hyst (%)

TRIP

(V)

Temperature (°C)

VHYST

VTRIP Down

VTRIP Up

0.0

0.5

1.0

1.5

2.0

2.5

3.0

1.990

2.000

2.010

2.020

2.030

2.040

2.050

-50 0 50 100 150

VTRIP Hyst (%)

TRIP

(V)

Temperature (°C)

VHYST

VTRIP Down

VTRIP Up

0.02

0.04

0.06

0.08

0.1

0.12

0.14

0.16

0.00 2.00 4.00 6.00 8.00 10.00

(V)

(mA)

1V 2V 3V 4.3V 4.5V 4.8V 5V 5.5V

0.02

0.04

0.06

0.08

0.1

0.12

0.14

0.16

0.00 2.00 4.00 6.00 8.00 10.00

(V)

(mA)

1V 2.5V 2.7V 3.2V 4V 4.5V 5V 5.5V

0.002

0.004

0.006

0.008

0.01

0.012

0.014

0.016

0.018

0.02

0.00 0.05 0.10 0.15 0.20 0.25

(V)

(mA)

1.8V

MCP131X/2X

Note: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ (only MCP1316;

see Figure 4-1), TA = -40°C to +125°C.

FIGURE 2-22: VOL vs. Temperature

(MCP1318M-4.6 @ VDD = 4.5V).

FIGURE 2-23: VOL vs. Temperature

(MCP1319-2.9 @ VDD = 2.7V).

FIGURE 2-24: VOL vs. Temperature

(MCP1316-2-0 @ VDD = 1.8V).

FIGURE 2-25: VOH vs. IOH

(MCP1318M-4.6 @ +25°C).

FIGURE 2-26: VOH vs. IOH

(MCP1319-2.9 @ +25°C).

FIGURE 2-27: VOH vs. IOH

(MCP1316-2.0 @ +25°C).

0.02

0.04

0.06

0.08

0.1

0.12

0.14

-50 0 50 100 150

(V)

Temperature (°C)

0 mA

0.05 mA

0.1 mA

0.15 mA

0.2 mA

0.05

0.1

0.15

0.2

0.25

-50 0 50 100 150

(V)

Temperature (°C)

0 mA

0.05 mA

0.1 mA

0.15 mA

0.2 mA

0.002

0.004

0.006

0.008

0.01

0.012

0.014

0.016

-50 0 50 100 150

(V)

Temperature (°C)

0 mA

0.05 mA

0.1 mA

0.15 mA

0.2 mA

0.5

1.5

2.5

3.5

4.5

0.00 2.00 4.00 6.00

(V)

(mA)

1.5V

4.5V

4.3V

0.00 2.00 4.00 6.00

(V)

(mA)

1.5V

3.2V

2.7V

2.5V

5.5V

4.5V

0.00 2.00 4.00 6.00

(V)

(mA)

5.5V

4.5V

2.5V

2.2V

MCP131X/2X

Note: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ (only MCP1 316 ;

see Figure 4-1), TA = -40°C to +125°C.

FIGURE 2-28: tRPD vs. Temperature

(MCP1318M-4.6).

FIGURE 2-29: tRPD vs. Temperature

(MCP1319-2.9).

FIGURE 2-30: tRPD vs. Temperature

(MCP1316-2.0).

FIGURE 2-31: tRPU vs. Temperature

(MCP1318M-4.6).

FIGURE 2-32: tRPU vs. Temperature

(MCP1319-2.9).

FIGURE 2-33: tRPU vs. Temperature

(MCP1316-2.0).

100

150

200

250

300

350

-100 -50 0 50 100 150

RPD

(µs)

Temperature (°C)

5.5V

100

150

200

250

300

350

400

450

-100 -50 0 50 100 150

RPD

(µs)

Temperature (°C)

3.2V 4V 4.5V 5V 5.5V

100

150

200

250

300

350

-100 -50 0 50 100 150

RPD

(µs)

Temperature (°C)

2.5V 4V 4.5V 5V 5.5V

190

195

200

205

210

215

220

225

230

-100 -50 0 50 100 150

RPU

(ms)

Temperature (°C)

4.8 V 5 V 5.5 V

200

205

210

215

220

225

230

235

240

245

250

-100 -50 0 50 100 150

RPU

(ms)

Temperature (°C)

3.2 V 4 V 4.5 V 5 V 5.5 V

200

205

210

215

220

225

230

235

240

245

250

-100 -50 0 50 100 150

RPU

(ms)

Temperature (°C)

2.5 V 4 V 4.5 V 5 V 5.5 V 2.2 V

MCP131X/2X

Note: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ (only MCP1316;

see Figure 4-1), TA = -40°C to +125°C.

FIGURE 2-34: Transient Duration vs.

VTRIP (min) – VDD.

FIGURE 2-35: Open-Drain Leakage

Current vs. Temperature (MCP1320-2.0).

FIGURE 2-36: MR Low to Reset

Propagation Delay (MCP1318M-4.6).

FIGURE 2-37: MR Low to Reset

Propagation Delay (MCP1319-2.9).

FIGURE 2-38: MR Low to Reset

Propagation Delay (MCP1316-2.0).

500

1000

1500

2000

2500

3000

3500

0.001 0.01 0.1 1 10

Transient Duration (µs)

Reset Threshold Overdrive (V) VTRIPMin - VDD

VRST=2.0V VRST=2.9V VRST=4.6V

2.0V

2.9V

0.002

0.004

0.006

0.008

0.01

0.012

-100 -50 0 50 100 150

Open-Drain Leakage (µA)

Temperature (°C)

2.2 V 2.5 V 4 V 4.5 V 5 V 5.5 V

MCP1318M does not

have an MR pin

100

150

200

250

300

350

-100 -50 0 50 100 150

MRD

(ns)

Temperature (°C)

3.2 V 4 V 4.5 V 5 V 5.5 V

100

150

200

250

300

350

400

450

-100 -50 0 50 100 150

MRD

(ns)

Temperature (°C)

2.2 V 2.5 V 4 V 4.5 V 5 V 5.5 V

MCP131X/2X

Note: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ (only MCP1 316 ;

see Figure 4-1), TA = -40°C to +125°C.

FIGURE 2-39: VDD Falling to Reset

Propagation Delay vs. Temperature

(MCP1318M-4.6).

FIGURE 2-40: VDD Falling to Reset

Propagation Delay vs. Temperature (MCP1319-

2.9).

FIGURE 2-41: VDD Falling to Reset

Propagation Delay vs. Temperature (MCP1316-

2.0).

FIGURE 2-42: Normalized Reset Time Out

Period vs. Temperature (MCP1318M-4.6).

FIGURE 2-43: Normalized Reset Time Out

Period vs. Temperature (MCP1319-2.9).

FIGURE 2-44: Normalized Reset Time Out

Period vs. Temperature (MCP1316-2.0).

100

200

300

400

500

600

700

800

900

1000

-100 -50 0 50 100 150

RPD

(µs)

Temperature (°C)

5V to 0V

5V to 4.5V

100

150

200

250

-100 -50 0 50 100 150

RPD

(µs)

Temperature (°C)

5V to 2.7V

5V to 0V

VTRIP Typ + 0.3V to

VTRIP Min - 0.2V

100

150

200

250

-100 -50 0 50 100 150

RPD

(µs)

Temperature (°C)

5V to 0V

5V to 1.8V

TRIP

Typ + 0.2V to

TRIP

Min - 0.2V

0.115

0.12

0.125

0.13

0.135

0.14

0.145

-100 -50 0 50 100 150

Normalized Reset Timeout

Period

Temperature (°C)

MCP1318M-4.6

0.125

0.13

0.135

0.14

0.145

0.15

-100 -50 0 50 100 150

Normalized Reset Timeout

Period

Temperature (°C)

MCP1319-2.9

0.125

0.13

0.135

0.14

0.145

0.15

-100 -50 0 50 100 150

Normalized Reset Timeout

Period

Temperature (°C)

MCP1316-2.0

MCP131X/2X

Note: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ (only MCP1316;

see Figure 4-1), TA = -40°C to +125°C.

FIGURE 2-45: Normalized Watchdog Time

Out Period vs. Te mperature (MCP1318M-4.6).

FIGURE 2-46: Normalized Watchdog Time

Out Period vs. Te mperature (MCP1319-2.9).

FIGURE 2-47: Normalized Watchdog Time

Out Period vs. Te mperature (MCP1316-2.0).

FIGURE 2-48: Max VDD Transient Duration

vs. Reset Threshold Overdrive.

FIGURE 2-49: “M” Part Number Pull-u p

Charact eristics (MCP1318M-4.6).

0.9

0.95

1.05

1.1

1.15

1.2

1.25

-100 -50 0 50 100 150

Normalized Watchdog

Timeout Period

Temperature (°C)

MCP1318M-4.6

MCP1319 does not

have a Watchdog Timer

0.9

0.95

1.05

1.1

1.15

1.2

1.25

-100 -50 0 50 100 150

Normalized Watchdog Timeout

Period

Temperature (°C)

MCP1316-2.0

100

200

300

400

500

600

0.001 0.01 0.1 1 10

Transient Duration (µS)

Reset Threshold Overdrive (V) VTRIPMin - VDD

VRST=2.0V VRST=2.9V VRST=4.6V

MCP131X/2X

NOTES:

MCP131X/2X

3.0 PIN DESCRIPTION

The descriptions of the pins are listed in Table 3-1.

TABLE 3-1: PIN FUNCTION TABLE

Pin No. Device Symbol Pin

Type

Buffer/

Driver

Type Function

SOT23-5

1MCP1316M (1),

MCP1318M (1),

MCP1319M (1),

MCP1320,

MCP1321,

MCP1322

RST O Open-Dr ai n Reset Ou tput (activ e-l ow)

Goes active (Low) if one of these conditions occurs:

1. If VDD falls below the selected Reset voltage

threshold.

2. If the MR pin is forced low.

3. If the WDI pin does not detect an edge transition

within the minimum selected time out period.

4. Duri ng pow e r-up.

VDD Falling:

Open-Drain = VDD > VTRIP

L = VDD < VTRIP

VDD Rising:

Open-Drain = VDD > VTRIP + VHYS

L = VDD < VTRIP + VHYS

MCP1316,

MCP1318,

MCP1319

O Push-Pull VDD Falling:

H = VDD > VTRIP

L = VDD < VTRIP

VDD Rising:

H = VDD > VTRIP + VHYS

L = VDD < VTRIP + VHYS

MCP1317 RST O Push-Pull Reset Ou tput (activ e-h igh )

Goes active (High) if one of these conditions occurs:

1. If VDD falls below the selected Reset voltage

threshold.

2. If the MR pin is forced low.

3. If the WDI pin does not detect an edge transition

within the minimum selected time out period.

4. Duri ng pow e r-up.

VDD Falling:

H = VDD < VTRIP

L = VDD > VTRIP

VDD Rising:

H = VDD < VTRIP + VHYS

L = VDD > VTRIP + VHYS

2AllV

SS — P The ground reference for the device.

Note 1: Open-Drain output with internal pull-up resistor.

MCP131X/2X

3MCP1316,

MCP1316M,

MCP1317,

MCP1320

MR I ST Manual Reset input for a Reset switch.

This input allows a push button switch to be directly con-

nected to the MCP131X/2X MR pin, which can then be

used to force a sy ste m Reset. Thi s inp ut fil ters (igno res )

noise pulses that occur on the MR pin.

L = Switc h i s depre ss ed (s ho rted to g roun d). This fo rces

the RST/RST pins Active.

H = Switch is open (internal pull-up resistor pulls signal

high). State of the RST/RS T pins determined by

other system conditions.

MCP1318,

MCP1318M,

MCP1319,

MCP1319M,

MCP1321,

MCP1322

RST O Push-Pull Reset Ou tpu t (activ e-h igh )

Goes active (High) if one of these conditions occurs:

1. If VDD falls below the selected Reset voltage

threshold.

2. If the MR pin is forced low.

3. If the WDI pin does not detect an edge transition

within the minimum selected time out period.

4. Duri ng pow e r-up.

VDD Falling:

H = VDD < VTRIP

L = VDD > VTRIP

VDD Rising:

H = VDD < VTRIP + VHYS

L = VDD > VTRIP + VHYS

4 MCP1316,

MCP1316M,

MCP1317,

MCP1318,

MCP1318M,

MCP1320,

MCP1321

WDI I ST Watchdog Timer Input

The WDT period is specified at the time of device order.

The Standard WDT period is 1.6s typical.

An edge transition on the WDI pin resets the Watchdog

T imer cou nter (no tim e out). A Fa lling Edge is requir ed to

start the WD T Timer.

MCP1319,

MCP1319M,

MCP1322

MR I ST Manual Reset input for a Reset switch.

This input allows a push button switch to be directly con-

nected to the MCP131X/2X MR pin, which can then be

used to force a sy ste m Reset. Thi s inp ut fil ters (igno res )

noise pulses that occur on the MR pin.

L = Switc h i s depre ss ed (s ho rted to g roun d). This fo rces

the RST/RST pins Active.

H = Switch is open (internal pull-up resistor pulls signal

high). State of the RST/RST pins determined by

other system conditions.

5AllV

DD — P The positive supply for the device.

TABLE 3-1: PIN FUNCTION TABLE (CONTINUED)

Pin No. Device Symbol Pin

Type

Buffer/

Driver

Type Function

SOT23-5

Note 1: Open-Drain output with internal pull-up resistor.

MCP131X/2X

3.1 Ground Terminal (VSS)

VSS provides the negative reference for the analog

input voltage. Typically, the circuit ground is used.

3.2 Supply Voltage (VDD)

VDD can be used for power supply monitoring or a

voltage level that requires monitoring.

3.3 Reset Output (RST and RST)

There are four types of Reset output pins. These are:

1. Open-Drain active-low Reset, External pull-up

resistor required

2. Open-Drain active-low Reset, Internal pull-up

resistor

3. Push-Pull active-low Reset

4. Push-Pull active-high Reset

Some dev ic es ha ve both an activ e-l ow an d a cti ve -hig h

Reset output.

3.3.1 ACTIVE-LOW (RST) - OPEN-DRAIN,

EXTERN AL PUL L- UP RES IST OR

The RST open-drain output remains low while VDD is

below the Reset voltage threshold (VTRIP). Once the

device voltage (VDD) returns to a high level

(VTRIP +V

HYS), the device will remain in Reset for the

Reset delay timer (TRST). After that time expires, the

RST pin will float, and an external pull-up resistor is

required to bring the output to the high state.

3.3.2 ACTIVE-LOW (RST) - OPEN-DRAIN,

INTERNAL PULL-UP RESISTOR

The RST open-drain output remains low while VDD is

below the Reset voltage threshold (VTRIP). Once the

device voltage (VDD) returns to a high level

(VTRIP +V

HYS), the device will remain in Reset for the

Reset delay timer (TRST). After that time expires, the

RST pin will be pulled high by an internal pull-up

resistor (typically 4.7 kΩ).

3.3.3 ACTIVE-LOW (RST) - PUSH-PULL

The RST push-pull output remains low while VDD is

below the Reset voltage threshold (VTRIP). Once the

device voltage (VDD) returns to a high level

(VTRIP +V

HYS), the device will remain in Reset for the

Reset delay timer (TRST). After that time expires, the

RST pin will be driven to the high state.

3.3.4 ACTIVE-HIGH (RST) - PUSH-PULL

The RST push-pull output remains high while VDD is

below the Reset voltage threshold (VTRIP). Once the

device voltage (VDD) returns to a high level

(VTRIP +V

HYS), the device will remain in Reset for the

Reset delay timer (TRST). After that time expires, the

RST pin will be driven to the low state.

3.4 Manual Reset Input (MR)

The Manu al R e set (MR ) i npu t pin all ows a pus h b utto n

switch to eas ily be conne cted to the sys tem . When the

push button is depressed, it forces a system Reset.

This pin has circuitry that filters noise that may be

present on the MR signal.

The MR pin is active-low and has an internal pull-up

resistor.

3.5 W atchdog Input

In some systems, it is desirable to have an external

Watchdog Timer to monitor the operation of the

system. This is done by requiring the embedded

controller to “pet” the Watchdog Timer within a

predetermined time frame (TWD). If the MCP131X/2X is

not “petted” within this time frame, the MCP131X/2X

will force the Reset pin(s) active.

The embedded controller “pets” the MCP131X/2X by

forcing an edge transition on the WDI pin. The WDT

Timer is activated by the first falling edge on the WDI

pin.

The st andard o ffering devices hav e a typical W atchdog

Timer period (TWD) of 1.6 s. Table 1-3 shows the

available Watchdog Timer periods.

MCP131X/2X

NOTES:

MCP131X/2X

4.0 OPERATIONAL DESCRIPTION

For many of today’s microcontroller applications, care

must be taken to pre vent low-pow er conditions tha t can

cause many different system problems. The most

common causes are brown-out conditions, where the

system supply dr ops belo w the operatin g level mo men-

tarily. The second most common cause is when a

slowly decaying power supply causes the

microcontroller to begin executing instructions without

sufficient voltage to sustain volatile memory (RAM),

thus produ cing indetermina te results. Figure 4-1 shows

a typical application circuit.

The MCP131X/2X family is voltage supervisor devices

designed to keep a microcontroller in Reset until the

system voltage has reached and stabilized at the

proper level for reliable system operation. These

devices also operate as protection from brown-out

conditions when the system supply voltage drops

below a safe operating level.

Some MCP131X/2X family members include a Watch-

dog Timer feature that after being enabled (by a falling

edge on the WDI pin), monitors the WDI pin for falling

or rising edges. If an edge transition is not detected

within the expected time frame, the MCP131X/2X

devices wil l fo rce the R es et p in a cti ve . This is us eful to

ensure that the embedded system’s Host Controller

progra m is ope rati ng as ex pected.

Some MC P1 31X/2X f ami ly m embers includ e a Manual

Reset feature that allows a push button switch to be

directly connec ted to the M CP131X/2X devic es (o n the

MR pin). This all ows the sy stem to easily be res et from

the external control of the push button switch.

A superset block diagram is shown in Figure 4-2, with

device specific block diagrams shown in Figure 4-3

through Figure 4-12.

FIGURE 4-1: Typical Applicat ion Circuit.

FIGURE 4-2: Family Block Diagram.

VDD

MCLR

(Reset input)

(active-low)

VSS

PIC®

Microcontroller

RPU(1)

Note 1: Resistor RPU may be requi red with the

MCP1320, MCP1321 or MCP1322 due

to the open-drain output.

Resistor RPU may not be required with

the MCP1316M, MCP1318M or

MCP1319M due to the internal pull-up

resistor.

The MCP1316, MCP1317, MCP1318

and MCP1319 do not requ ire the

external pull-up resistor.

2: Not all devices offer the active-high

Reset out put pin .

0.1

µF MCP13XX

VDD

RST

VSS

RST (2)

WDI I/O

To system

device that

requires active-

high rese ts

Push button

switch

VDD

Comparator

–Output

Driver

RST

Reference

VSS

RST

Noise Filter

Watchdog

WDI

Note: Features available depend on the device.

Voltage

MCP131X/2X

4.0.1 DEVICE SPECIFIC BLOCK

DIAGRAMS

FIGURE 4-3: MCP1316 Block Diagram.

FIGURE 4-4: MCP1316M Bl oc k Diag ra m.

FIGURE 4-5: MCP1317 Block Diagram.

FIGURE 4-6: MCP1318 Block Diagram.

FIGURE 4-7: MCP1318M Block Diagram.

VDD

Comparator

–Output

Driver RST

Reference

VSS

Noise Fil ter

Watchdog

WDI

Voltage

VDD

Comparator

–Output

Driver RST

Reference

VSS

Noise Filter

Watchdog

WDI

Voltage

VDD

Comparator

–Output

Driver

Reference

VSS

RST

Noise Filt er

Watchdog

WDI

Voltage

VDD

Comparator

–Output

Driver

RST

Reference

VSS

RST

Watchdog

WDI

Voltage

VDD

Comparator

–Output

Driver

RST

Reference

VSS

RST

Watchdog

WDI

Voltage

MCP131X/2X

FIGURE 4-8: MCP1319 Block Diagram.

FIGURE 4-9: MCP1319M Block Diagram.

FIGURE 4-10: MCP1320 Block Diagram.

FIGURE 4-11: MCP1321 Block Diagram.

FIGURE 4-12: MCP1322 Block Diagram.

VDD

Comparator

–Output

Driver

RST

Reference

VSS

RST

Noise Filt er

Voltage

VDD

Comparator

–Output

Driver

RST

Reference

VSS

RST

Noise Filt er

Voltage

VDD

Comparator

–Output

Driver RST

Reference

VSS

Noise Filter

Watchdog

WDI

Voltage

VDD

Comparator

–Output

Driver RST

Reference

VSS

RST

Watchdog

WDI

Voltage

VDD

Comparator

–Output

Driver RST

Reference

VSS

RST

Noise Filt er

Voltage

MCP131X/2X

4.1 Reset Voltage Trip Point (VTRIP)

Operation

The devic e’ s Rese t volt age trip poi nt (VTRIP) is s ele cte d

when the device is ordered. As the voltage on the

device’s VDD pin is above or below this selected trip

point, the output of the Reset pin (RST/RST) will be

forced to either the inactive or active state.

For the voltage trip point, there is a minimum trip voltage

(VTRIPMIN) and a maximum trip voltage (VTRIPMAX). The

voltage that the device “actually” trips at will be referred

to as VTRIP. The trip voltage is specified for the falling of

the device VDD.

There is a ls o a h ys ter esis (VHYS) on the trip poin t. This

is so that noise on the device voltage (VDD) does not

cause the Reset pin (RST/RST) to “jitter” (change

between driving an active and inactive state).

The Reset p in (RST or R ST) will be f orced ac tive i f any

of the following occur s:

• The Manual Reset input (MR) goes low

• The Watchdog Timer times out

•V

DD goes below the threshold

• During device power-up

After the device exits the Reset condition, the delay

circuit ry wil l hold the RST and RST pin s activ e until the

appropriate Reset delay time (tRST) has elapsed .

TABLE 4-1: RESET PIN STATES

Device

State of RST Pin when: State of RST (3) Pin when:

Output Driver

VDD <

VTRIP VDD > VTRIP +

VHYS VDD <

VTRIP VDD > VTRIP +

VHYS

MCP1316 L H — — Push-pull

MCP1316M LH

(2) — — Open-drain

(2)

MCP1317 — — H L Push-pull

MCP1318 L H H L Push-pull

MCP1318M LH

(2) H L Open-drain

(2)

MCP1319 L H H L Push-pull

MCP1319M LH

(2) H L Open-drain

(2)

MCP1320 LH

(1) — — Open-drain

(1)

MCP1321 LH

(1) H L Open-drain

(1)

MCP1322 LH

(1) H L Open-drain

(1)

Note 1: Requires Ext ernal Pull-up resistor.

2: Has Internal Pull-up resistor.

3: The RST pin output is always push-pull.

MCP131X/2X

4.1. 1 POWER-UP/RISING VDD

As th e de vice V DD rises, the device’s Reset circuit will

remain active until the voltage rises above the “actual”

trip point (VTRIP) plus the hysteresis (VHYS).

Figure 4-13 shows a power-up sequence and the

waveform of the RST and RST pins.

As the device powers up, the voltage will start below

the valid operating voltage of the device. At this

voltage, the Reset output value is not valid. Once the

voltage is above the minimum operating voltage (1V)

and below the selected VTRIP, the Reset output will be

active.

Once the device voltage rises above the “actual” trip

point (VTRIP) plus the hyste resis (VHYS), the Reset d elay

timer (tRST) starts. When the Reset delay timer times

out, the Reset output (RST/RST) is driven inactive.

FIGURE 4-13: Reset Pin Operation on a

Power-up.

4.1.2 POWER-DOWN/BROWN-OUTS

As the device powers-down/brown-outs, the voltage

(VDD) falls from a voltage above the device’s trip point

(VTRIP). The device’s “actual” trip point voltage (VTRIP)

will be between the minimum trip point (VTRIPMIN) and

the maximum trip point (VTRIPMAX). Once the device

volt age (VDD) goes below this volt age, the Reset p in(s)

will be forced to the active state. There is a hysteresis

on this trip point. This is so that noise on the device

volt age (VDD) does not cause the Reset pin (RST /RST)

to “jitter” (change between driving an active and

inactiv e).

Figure 4-14 shows the waveform of the RST pin as

determined by the VDD voltage, while Table 4-1 shows

the state of the RST pin.

4.1.2.1 Operation of RST pin with Internal

Pull-Up Resistor

The internal pull-up resistor has a typical value of

4.7 kΩ. The internal pull-up eliminates the need for an

external resistor.

To reduce the cu rrent c onsumpt ion of th e dev ice, when

the RST pin is drivin g low , the res istor is disconnec ted.

FIGURE 4-14: RST Operation as Determined by the VTRIP and VHYS.

Note: While the Reset delay timer (tRST) is

active, additional system current is

consumed.

VTRIPMAX

VTRIPMIN

VTRIP

VDD

VTRIP + VHYS

tRST

RST

Note: Only the MCP1316M, MCP1318M and

MCP1319M devices have an open-drain

RST output pin with an internal pull-up

resistor.

VDD VTRIPMAX

VTRIPMIN VTRIP

VTRIP

VTRIP + VHYS

RST

< 1V is outside the

device spe cif ic atio ns

tRPD

tRST

tRPD tRST

MCP131X/2X

4.2 Reset Delay Timer (tRST)

The Reset delay timer ensures that the MCP131X/2X

device will “hold” the embedded system in Reset until

the system voltage has stabilized. There are several

time-out options to better meet the requirements of

different applications. These Reset delay timer time

outs are shown in Table 4-2. The S tandard offering time

out is typically 200 ms.

The Reset delay timer (tRST) starts after the device volt-

age rises above the “actual” trip point (VTRIP) plus the

hysteresis (VHYS). When the Reset delay timer times

out, the Reset output pin (RST/RST) is driven inactive.

TABLE 4-2: RESET DELAY TIMER

TIME OUTS (1)

Figure 4-15 illustrates when the Reset delay timer

(tRST) is active or inactive.

FIGURE 4-15: Reset Pow er-up Timer

Waveform.

4.2. 1 EFFECT OF TEMPERATURE ON

RESET POWER-UP TIMER (TRPU)

The Reset delay timer time out period (tRST)

determines how long the device remains in the Reset

condition. This time out is affected by both the device

VDD and temperature. Typical responses for different

VDD values and temperatures are shown in Figures 2-

33, 2-32 and 2-31.

Note: While the Reset delay timer (tRST) is

active, additional system current is con-

sumed.

tRST Units

Min Typ Max

1.0 1.4 2.0 ms

20 30 40 ms

140 200 280 ms

1120 1.6 2.24 sec

↑↑

This is the

minimu m time tha t

the Reset delay

timer wil l “hold” the

Reset pin activ e

after VDD rises

above

VTRIP + VHYS

This is the

maximum time

that the Reset

delay timer will

“hold” the Reset

pin active after

VDD rises above

VTRIP + VHYS

Note 1: Shaded rows are custom ordered time

outs.

VTRIP

VDD

RST tRST

Reset Delay

Timer Inactive

Reset

Delay

Timer

Inactive

Reset Delay

Timer Active

See Figures 2-12,

2-10 and 2-11

See Figures 2-15,

2-14 and 2-13

See Figures 2-12,

2-10 and 2-11

MCP131X/2X

4.3 Negative Going VDD Transients

The minimum pulse width (time) required to cause a

Reset may be an important criteria in the

implementation of a Power-on Reset (POR) circuit.

This time is referred to as transient duration. The

MCP131X/2X devices are designed to reject a level of

negative-going transients (glitches) on the power

supply line.

Transient duration is the amount of time needed for

these s up erv iso ry devic es to res po nd to a dro p i n VDD.

The tr ansient durat ion time (tTRAN) is dependa nt on the

magnitude of VTRIP – VDD (overdrive). Any combin ation

of duration and overdrive that lies under the

duration/overdrive curve will not generate a Reset

signal. Generally speaking, the transient duration time

decreases with and increases in the VTRIP –V

volt age. Comb inations o f duration a nd overdriv e that lie

above the duration/overdrive curve are detected as a

brow n-ou t or power-down conditio n.

Figure 4-16 shows a typical transient duration vs.

Reset comparator overdrive, for which the

MCP13 1X/2X will not gen erate a R ese t pulse . It sho ws

that the farther below the trip point the transient pulse

goes, the duration of the pulse required to cause a

Reset gets shorter. Figure 4-16 shows the transient

response characteristics for the MCP131X/2X.

Transient immunity can be improved by adding a

byp ass cap acito r (typically 0.1 µF) as c lose as possibl e

to the VDD pin of the MCP131X/2X device.

FIGURE 4-16: Example of Typical

Transient Duration Waveform.

4.4 Manual Reset Input

The Manua l Reset input p in (MR) allows the Reset pins

(RST/RST) to be ma nuall y fo rced to th eir acti ve st at es.

The MR pin has circuitry to filter noise pulses that may

be present on the pin. Figure 4-17 shows a block

diagram for using the MCP131 X/2X with a pus h-button

switch. To minimize the required external components,

the MR input has an internal pull-up resistor.

A mechanical push button or active logic signal can

drive the MR input.

Once MR has been low for a time, tMRD (the Manual

Reset delay time), the Reset output pins are forced

active . The Rese t output pins wil l rem ai n in thei r ac tiv e

states for the Reset delay timer time out period (tRST).

Figure 4-18 shows a waveform for the Manual Reset

switch input and the Reset pins output.

FIGURE 4-17: Push Button Reset and

Watchdog Timer.

FIGURE 4-18: MR Input – Push Button.

4.4.1 NOISE FILTER

The noise filter filters out noise spikes (glitches) on the

Manual Reset pin (MR). N ois e sp ik es le ss than 100 ns

(typical ) are filtered.

Time (µs)

Supply Vol tage

VTRIP(MIN) - VDD

tTRANS

VTRIP(MAX)

VTRIP(MIN)

(Overdrive)

(Duration)

VDD

VSS

RST

WDI I/O

MCLR

+5V

MCP13XX PIC® MCU

RST

VIL

tMR

RST

tMRD

VIH

tRST

The MR input typically ignores input pulses

of 100 ns .

MCP131X/2X

4.5 Watchdog Timer

The purpose of the Watchdog Timer (WDT) is to

increase system reliability. The Watchdog Timer

feature can be used to detect when the Host

Controller’s program flow is not as expected. The

Watchdog Timer monitors for activity on the Watchdog

Input pin (WDI). The WD I pin is e xpec ted to b e strobe d

within a given time frame. When this time frame is

exceeded, without an edge transition on the WDI pin,

the Reset pin is driven active to reset the system. This

stops the Host Controller from continuing its erratic

behavior (“run-away” code execution).

The Watchdog Timer is external to the main portion of

the control system and monitors the operation of the

system . This f eature is enabled by a fal ling edge on the

WDI pin (after d evice PO R). Monitori ng is then done by

requiring the embedded controller to force an edge

transition (falling or rising) on the WDI pin (“pet the

Watchdog”) within a predetermined time frame (TWD).

If the MCP131X/2X does not detect an edge on the

WDI pin within the expected time frame, the

MCP131X/2X device will force the Reset pin active.

The Watchdog Timer is in the disabled state when:

• The Device Powers up

• A P OR event occurred

• A WDT event occurred

• A Manual Reset (MR) event occurred

When t h e Watchd o g Timer is in th e d is a bl ed sta t e, the

WDI pin has an int erna l s ma rt pul l-up resis tor e na ble d.

This p ull- up res istor h as a ty pical value o f 52 kΩ. This

pull- up resi stor holds the WD I signal in the hi gh state,

until it is forced to another state.

After the embedded controller has initialized, if the

Watchdog Timer feature is to be used, then the embed-

ded controller can force the WDI pin low (VIL). This also

enables the Watchdog Timer feature and disables the

WDI pull-up resistor. Disabling the pull-up resistor

reduces the device’s current consumption. The pull-up

resistor will rem ain di sc onnected unti l the devi ce has a

power-on, a R eset even t occurs , or af ter the WDT tim e

out.

Once th e Watchdog Timer has bee n en abl ed, the H os t

Controller must force an edge transition (falling or ris-

ing) on the WDI pin before the minimum Watchdog

T imer tim e out to e nsure tha t the W atch dog T imer does

not force the Reset pins (RST/R ST) to the a ctive st ate.

If an edge transition does not occur before the maxi-

mum time out occurs, then the MCP131X/2X will force

the Reset pins to their active state.

The MCP131X/2X supports four time outs. The stan-

dard offering devices have a typical Watchdog Timer

period (TWDT) of 1.6 s. Table 4-3 shows the available

Watchdog Timer periods. The tWDT time out is a

function of the device voltage and temperature.

Figure 4-19 shows a block diagram for using the

MCP131X/2X with a PIC® microcontroller (MCU) and

the Watchdog input.

TABLE 4-3: WATCHDOG TIMER

PERIODS (1)

FIGURE 4-19: Watchdog Timer.

The software routine that strobes WDI is critical. The

code must be in a section of software that is executed

frequently enough so the time between edge

transitions is less than the Watchdog time out period.

One common technique controls the Host Controllers

I/O line fro m two section s of the program . The softwa re

might set the I/O line high while operating in the

Foreground mode and set it low while in the

Background or Interrupt modes. If both modes do not

execute correctly, the Watchdog Timer issues reset

pulses.

tWDT Units

Min Typ Max

4.3 6.3 9.3 ms

71 102 153 ms

1.12 1.6 2.4 sec

17.9 25.6 38.4 sec

↑↑

If the time between

WDI edges is less

than this, it

ensures that the

MCP131X/2X

never forces a

reset

If the time

between WDI

edges is greater

than this, it

ensures that th e

MCP131X/2X

always forces a

reset

Note 1: Shaded rows are custom ordered Watch-

dog Timer Periods (tWDT) time outs. For

information on orderi ng devices with

these tWDT time o ut s , pl eas e c ontact your

local Microchip sales office. Minimum

purchas e vol ume s are required.

VCC

GND

RST

WDI

MCLR

+5V MCP13XX

0.1

10 kΩ

I/O

PIC®

3-Terminal

Regulator

+5V

µF MCU

(example:

MCP1700)

MCP131X/2X

5.0 APPLICATION INFORMATION

This section shows application related information that

may be useful for your particular design requirements.

5.1 Supply Monitor Noise Sensitiv ity

The MCP131X/2X devices are optimized for fast

response to negative-going changes in VDD. Systems

with an inordinate amount of electrical noise on VDD

(such as systems using relays) may require a 0.01 µF

or 0.1 µF bypass capacitor to reduce detection

sensitivity. This capacitor should be installed as close

to the MCP131X/2X as possible to keep the capacitor

lead length short.

FIGURE 5-1: Typical App lica tio n Circui t

with Bypass Capacitor.

5.2 Conventional Voltage Monit oring

Figure 5-2 and Figure 5-3 show the MCP131X/2X in

conventional voltage monitoring applications.

FIGURE 5-2: Battery Voltage Monitor.

FIGURE 5-3: Power Good Monitor.

5.3 Using in PIC® Microcontroller,

ICSP ™ A p plic a t io n s

Figure 5-4 shows the typi cal application circuit for using

the MCP132X for a voltage supervisory function when

the PIC® microcontroller will be programmed via the In-

Circuit Serial Programming™ (ICSP™) feature. Addi-

tional in formati on is av ailab le in TB08 7, “Using Voltag e

Supervisors with PIC® Microcontroller Systems which

Implement In-Circuit Serial Programming™”

(DS91087).

FIGURE 5-4: Typical Applicat ion Circuit

for PIC® Microcontroller with the ICSP™ Feature.

MCP131X/2X

VDD

RST

VSS

0.1 µF

RST

WDI

VDD

RST

VSS

BATLOW

MCP131X/2X

––

VDD

RST

VSS

Power Good

MCP131X/2X

–

Pwr

Sply

Note: This operati on ca n only be don e usi ng the

device with the Open-Drain RST pin

(MCP1320, MCP1321, and MCP1322).

Devices that have the internal pull-up

resi stor are n ot recomm ended du e to the

current p ath of th e internal pu ll-up resist or .

Note: It is recommended that the current into the

RST pin be current limited by a 1 kΩ

resistor.

MCP132X

VDD

VDD/VPP

VDD

RST MCLR

Reset input)

(Active-Low)

VSS VSS

PIC®

Microcontroller

RPU

0.1 µF

1kΩ

MCP131X/2X

5.4 Modifying The Trip Point, VTRIP

Although the MCP131X/2X device has a fixed voltage

trip point (VTRIP), it is sometimes necessary to make

custom adjustments. This can be accomplished by

connecting an external resistor divider to the

MCP131X/2X VDD pin. This causes the VSOURCE

voltage to be at a higher voltage than when the

MCP131X/2X input equals its VTRIP voltage

(Figure 5-5).

To maintain detector accuracy, the bleeder current

through the divider should be significantly higher than

the 10 µA maximum operating current required by the

MCP131X/2X. A reasonable value for this bleeder

current is 1 mA (100 times the 10 µA required by the

MCP131X/2X). For example, if VTRIP = 2V and the

desired trip poi nt is 2 .5V, the value of R1 + R2 is 2.5 kΩ

(2.5V/1 mA). The value of R1 + R2 can be rounded to

the nearest standard value and plugged into the

equation of Figure 5-5 to calculate values for R1 and

R2. 1% tolerance resistors are recommended.

FIGURE 5-5: Modify Trip-Point using

External Resistor Divider.

5.5 MOSFET Low-Drive Protection

Low o pera t in g pow e r an d smal l p hy si ca l s iz e make the

MCP131X/2X series ideal for many voltage detector

applications. Figure 5-6 shows a low-voltage gate drive

protecti on circuit th at prevent s overheati ng of the logic -

level MOSFET due to insufficient gate voltage. When

the input signal is below the threshold of the

MCP131X/2X, its output grounds the gate of the

MOSFET.

FIGURE 5-6: MOSFET Low-Drive

Protection.

5.6 Low-Power Applications

In some low-power applications, the longer that the

microcontroller (such as a PIC® MCU) can be in the

“Sleep mode”, the lower the average system current

consumption will be.

The WDT feature can be used to “wake-up” the PIC MCU

at a regular interval to service the required tasks before

returning to sleep. This “wake-up” occurs after the PIC

MCU detects a MCLR reset during Sleep mode (for mid-

range family; POR = ‘1’, BOR = ‘1’, TO = ‘1’, and PD = ‘1’).

Note: In this example, VSOURCE must be

greater than (VTRIP)

MCP131X/2X

VDD RST

VSS

VSOURCE

or RST

VSOURCE

R1R2

--------------------

VTRIP

Where:

VSOURCE = Voltage to be monitored

VTRIP = Threshold Voltage setting

VDD

RST

VSS

MCP131X/2X

270Ω

MTP3055EL

VDD

VTRIP

MCP131X/2X

5.7 Controllers and Processors With

Bidirectional I/O Pins

Some microcontrollers have bidirectional Reset pins.

Depending on the current drive capability of the

controller pin, an indeterminate logic level may result if

there is a logic conflict. This can be avoided by adding

a 4.7 kΩ resistor in series with the output of the

MCP131X/2X (Figure 5-7). If there are other

components in the system that require a Reset signal,

they sho uld be buffered so as n ot to load the Reset line.

If the other components are required to follow the

Reset I/O of the microcontroller, the buffer should be

connected as shown with the solid line.

FIGURE 5-7: Interfacing the

MCP131X/2X Push-Pull Outputs to a

Bidirecti on al Res et I/O.

5.8 RESET Signal Integrity During

Power-Down

The MCP131X/2X Reset output is valid to VDD = 1.0V.

Below this 1.0V, the output becomes an "open circuit"

and does not sink or source current. This means

CMOS l ogic input s to the micr ocontroller wil l be floating

at an undetermined voltage. Most digital systems are

completely shut down well above this voltage.

However, in situations where the Reset signal must be

maintained valid to VDD = 0V, external circuitry is

required.

For devices where the Reset signal is active-low , a pull-

down resistor must be connected from the

MCP131X/2X R eset pin(s ) to ground to di scharge stra y

capacitances and hold the output low (Figure 5-8).

Similarly, for devices where the Reset signal is active-

high, a pull-up resistor to VDD is required to ensure a

valid high Reset signal for VDD below 1.0V.

This resistor value, though not critical, should be

chosen such that it does not appreciably load the Reset

pin(s) under normal operation (100 kΩ will be suitable

for most applications).

FIGURE 5-8: Ensuring a Valid Active-low

Reset Pin Output State as VDD Approaches 0V.

MCP13XX

VDD

RST

GND

MCLR

GND

Buffered Reset

To Other System

Components

MCU

4.7 kΩ

Buffer

PIC®

MCP13XX

VDD

100 kΩ

RST

GND

MCP131X/2X

NOTES:

MCP131X/2X

6.0 STANDARD DE VICE

OFFERINGS

Table 6-1 shows the standard devices that are

available and their respective configuration. The

configu r ati on inc lu des the:

• Voltage Trip Point (VTRIP)

• Reset Time Out (tRST)

• Watchdog Time Out (tWDT)

Table 6-1 also shows the order number for that given

device configuration.

6.1 Custom Configurations

Table 6-2 shows the codes that specify the desired

Reset time out (tRST) and Watchdog Timer time out

(tWDT) f or custom devices.

The voltage trip point (VTRIP) is specified by the two

digits of the desired typical trip point voltage. As an

example, if the desired VTRIP selection has a typical

VTRIP of 2.7V, the code is 27.

TABLE 6-1: STANDARD VERSIONS

TABLE 6-2: DELAY TIME OUT ORDERING CODES

Device Reset

Threshold (V)

Reset Time Out (ms) Watchdog Time Out (s)

Minimum Typical Minim um Typical Orde r Numb er

MCP1316 2.90 140 200 1.12 1.6 MCP1316T-29LE/OT

MCP1316 4.60 140 200 1.12 1.6 MCP1316T-46LE/OT

MCP1316M 2.90 140 200 1.12 1.6 MCP1316MT-29LE/OT

MCP1316M 4.60 140 200 1.12 1.6 MCP1316MT-46LE/OT

MCP1317 2.90 140 200 1.12 1.6 MCP1317T-29LE/OT

MCP1317 4.60 140 200 1.12 1.6 MCP1317T-46LE/OT

MCP1318 2.90 140 200 1.12 1.6 MCP1318T-29LE/OT

MCP1318 4.60 140 200 1.12 1.6 MCP1318T-46LE/OT

MCP1318M 2.90 140 200 1.12 1.6 MCP1318MT-29LE/OT

MCP1318M 4.60 140 200 1.12 1.6 MCP1318MT-46LE/OT

MCP1319 2.90 140 200 — — MCP1319T-29LE/OT

MCP1319 4.60 140 200 — — MCP1319T-46LE/OT

MCP1319M 2.90 140 200 — — MCP1319MT-29LE/OT

MCP1319M 4.60 140 200 — — MCP1319MT-46LE/OT

MCP1320 2.90 140 200 1.12 1.6 MCP1320T-29LE/OT

MCP1320 4.60 140 200 1.12 1.6 MCP1320T-46LE/OT

MCP1321 2.90 140 200 1.12 1.6 MCP1321T-29LE/OT

MCP1321 4.60 140 200 1.12 1.6 MCP1321T-46LE/OT

MCP1322 2.90 140 200 — — MCP1322T-29LE/OT

MCP1322 4.60 140 200 — — MCP1322T-46LE/OT

Typical Delay Time (ms) Typical Delay Time (ms)

Code Reset WDT Comment Code Reset WDT Comment

A1.6 6.3 Note 1 J200.0 6.3 Note 1

B1.6 102.0 Note 1 K200.0 102.0 Note 1

C1.6 1600.0 Note 1 L 200.0 1600. 0 Del ay timings for s tandard

device offerings

D1.6 25600.0 Note 1 M200.0 25600.0 Note 1

E30.0 6.3 Note 1 N1600.0 6.3 Note 1

F30.0 102.0 Note 1 P1600.0 102.0 Note 1

G30.0 1600.0 Note 1 Q1600.0 1600.0 Note 1

H30.0 25600.0 Note 1 R1600.0 25600.0 Note 1

Note 1: This delay timing combination is not the standard offering. For information on ordering devices with these

delay times, contact your local Microchip sales office. Minimum purchase volumes are required.

MCP131X/2X

NOTES:

MCP131X/2X

7.0 DEVELOPMENT TOOLS

7.1 Evaluation/Demonstration Boards

The SOT-23-5/6 Evaluation Board (VSUPEV2) can be

used to evaluate the characteristics of the

MCP131X/2X dev ic es .

This blank PCB has footprints for:

• Pull-up Res i stor

• Pull-down Resistor

• Loading Capacitor

• In-line Resistor

There is also a power supply filtering capacitor.

For evaluating the MCP131X/2X devices, the selected

device should be installed into the Option A footprint.

FIGURE 1: SOT-23-5/6 Voltage

Supervisor Evaluation Board (VSUPEV2).

This board may be purchased directly from the

Microchip web site at www.microchip.com.

MCP131X/2X

NOTES:

MCP131X/2X

8.0 PACKAGING INFORMATION

8.1 Package Marking Information

5-Pin SOT-23

Part Numb er SOT-23

MCP1316T-29LE/OT QANN

MCP1316MT-29LE/OT QBNN

MCP1317T-29LE/OT QCNN

MCP1318T-29LE/OT QDNN

MCP1318MT-29LE/OT QENN

MCP1319T-29LE/OT QFNN

MCP1319MT-29LE/OT QGNN

MCP1320T-29LE/OT QHNN

MCP1321T-29LE/OT QJNN

MCP1322T-29LE/OT QKNN

MCP1316T-46LE/OT QLNN

MCP1316MT-46LE/OT QMNN

MCP1317T-46LE/OT QPNN

MCP1318T-46LE/OT QQNN

MCP1318MT-46LE/OT QRNN

MCP1319T-46LE/OT QSNN

MCP1319MT-46LE/OT QTNN

MCP1320T-46LE/OT QUNN

MCP1321T-46LE/OT QVNN

MCP1322T-46LE/OT QWNN

Example:

Legend: XX...X Customer-specifi c info rma tio n

Y Year code (last digit of calendar year)

YY Year code (last 2 digits of calendar year)

WW Week code (week of January 1 is week ‘01’)

NNN Alphanumeric traceability code

Pb-free JEDEC designator for Matte Tin (Sn)

*This package is Pb-free. The Pb-free JEDEC designator ( )

can be found on the outer packaging for this package.

Note: In the event the f ull Microc hip p art num ber cann ot be marked on one lin e, it will

be carried over to the next line, thus limiting the number of available

characte rs for cus tomer-specifi c informatio n.

QA25

MCP131X/2X

/HDG3ODVWLF6PDOO2XWOLQH7UDQVLVWRU27>627@

1RWHV

 'LPHQVLRQV'DQG(GRQRWLQFOXGHPROGIODVKRUSURWUXVLRQV0ROGIODVKRUSURWUXVLRQVVKDOOQRWH[FHHGPPSHUVLGH

 'LPHQVLRQLQJDQGWROHUDQFLQJSHU$60(<0

%6& %DVLF'LPHQVLRQ7KHRUHWLFDOO\H[DFWYDOXHVKRZQZLWKRXWWROHUDQFHV

1RWH )RUWKHPRVWFXUUHQWSDFNDJHGUDZLQJVSOHDVHVHHWKH0LFURFKLS3DFNDJLQJ6SHFLILFDWLRQORFDWHGDW

KWWSZZZPLFURFKLSFRPSDFNDJLQJ

8QLWV 0,//,0(7(56

'LPHQVLRQ/LPLWV 0,1 120 0$;

1XPEHURI3LQV 1 

/HDG3LWFK H %6&

2XWVLGH/HDG3LWFK H %6&

2YHUDOO+HLJKW $  ± 

0ROGHG3DFNDJH7KLFNQHVV $  ± 

6WDQGRII $  ± 

2YHUDOO:LGWK (  ± 

0ROGHG3DFNDJH:LGWK (  ± 

2YHUDOO/HQJWK '  ± 

)RRW/HQJWK /  ± 

)RRWSULQW /  ± 

)RRW$QJOH  ± 

/HDG7KLFNQHVV F  ± 

/HDG:LGWK E  ± 

123

A2 c

0LFURFKLS 7HFKQRORJ\ 'UDZLQJ &%

MCP131X/2X

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

MCP131X/2X

8.2 Product Tape and Reel Specifications

FIGURE 8-1: EMBOSS ED CARRIER DIMENSIONS (8 MM TAPE ONLY)

FIGURE 8-2: 5-LEAD SOT-23 DEVICE TAPE AND REEL SPECIFICATIONS

Top

Cover

Tape

TABLE 8-1: CARRIER TAPE/CAVITY DIMENSIONS

Case

Outline Package

Type

Carrier

Dimensions Cavity

Dimensions Output

Quantity

Units

Reel

Diameter in

mm P

mm A0

mm B0

mm K0

OT SOT-23 3L 8 4 3.23 3.17 1.37 3000 180

User Direction of Feed

P, Pitch

Standard Reel Component Orientation Reverse Reel Component Orientation

W, Width

of Carrier

Tape

Pin 1

Device

Marking

MCP131X/2X

APPENDIX A: RE VISION HISTORY

Revision C (February 2012)

The following is the list of modifications:

1. Updated package temperature in the

Temp erature C haracteristics table.

2. Corrected text in Section 4.0, Operational

Description.

3. Updated package specification in Section 8.0,

Packaging Information to show all drawings

available.

4. Other minor typographical corrections.

Revision B (October 2007)

The following is the list of modifications:

1. Clarified that devices with a Voltage Trip Point

≤2.4V are tested from -40°C to + 85°C. Devices

with a Voltage Trip Point ≥ 2.5V are tested from

-40°C to +125°C.

Revision A (November 2005)

• Original Rel ease of this Document.

MCP131X/2X

NOTES:

MCP131X/2X

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

Device: MCP1316T: MicroPower Voltage Detector

(Tape and Reel )

MCP1316MT: MicroPower Voltage Detector

(Tape and Reel )

MCP1317T: MicroPower Voltage Detector

(Tape and Reel )

MCP1318T: MicroPower Voltage Detector

(Tape and Reel )

MCP1318MT: MicroPower Voltage Detector

(Tape and Reel )

MCP1319T: MicroPower Voltage Detector

(Tape and Reel )

MCP1319MT: MicroPower Voltage Detector

(Tape and Reel )

MCP1320T: MicroPower Voltage Detector

(Tape and Reel )

MCP1321T: MicroPower Voltage Detector

(Tape and Reel )

MCP1322T: MicroPower Voltage Detector

(Tape and Reel )

VTRIP Options:

(Note 1)29 = 2.90V

46 = 4.60V

Time Out Options:

(Note 1)L=t

RST = 200 ms (typ.),

tWDT = 1.6 s (typ.)

Temperature Range: I = -40°C to +85°C

(Only for trip points 2.0V to 2.4V)

E = -40°C to +125°C

(For trip point ≥ 2.5V)

Package: OT = SOT-23, 5-lead

Note 1: Custom ordered voltage trip points and time outs available. Please

contact your local Microchip sales office for additional information.

Minimum purchase volumes are required.

PART NO. XX X

Temperature

VTRIP

Options

Device

Examples:

a) MCP1316T-29LE/OT: 5-Lead SOT-23-5

b) MCP1316T-46LE/OT: 5-Lead SOT-23-5

c) MCP1316MT -29LE/OT: 5-Lead SOT-23-5

d) MCP1316MT-46LE/OT: 5-Lead SOT-23-5

a) MCP1317T-29LE/OT: 5-Lead SOT-23-5

b) MCP1317T-46LE/OT: 5-Lead SOT-23-5

a) MCP1318T-29LE/OT: 5-Lead SOT-23-5

b) MCP1318MT-29LE/OT: 5-Lead SOT-23-5

c) MCP1318T-46LE/OT: 5-Lead SOT-23-5

d) MCP1318MT-46LE/OT: 5-Lead SOT-23-5

a) MCP1319T-29LE/OT: 5-Lead SOT-23-5

b) MCP1318MT-29LE/OT: 5-Lead SOT-23-5

c) MCP1319T-46LE/OT: 5-Lead SOT-23-5

d) MCP1318MT-46LE/OT: 5-Lead SOT-23-5

a) MCP1320T-29LE/OT: 5-Lead SOT-23-5

b) MCP1320T-46LE/OT: 5-Lead SOT-23-5

a) MCP1321T-29LE/OT: 5-Lead SOT-23-5

b) MCP1321T-46LE/OT: 5-Lead SOT-23-5

a) MCP1322T-29LE/OT: 5-Lead SOT-23-5

b) MCP1322T-46LE/OT: 5-Lead SOT-23-5

Range

Package

Tape/Reel

Option

Time Out

Options

MCP131X/2X

NOTES:

Information contained in this publication regarding device

applications a nd the lik e is provided only f or yo ur convenience

and may be supers ed ed by u pda t es . It is y our responsibil it y to

ensure that your application meets with your specifications.

MICROCHIP MAKES NO REPRESENTATIONS OR

WARRANTIES OF ANY KIND WHETHER EXPRESS OR

IMPLIED, WRITTEN OR ORAL, STATUTORY OR

OTHERWISE, RELATED TO THE INFORMATION,

INCLUDING BUT NOT LIMITED TO ITS CONDITION,

QUALITY, PERFORMANCE, MERCHANTABILITY OR

FITNESS FOR PURPOSE. Microchip disclaims all liability

arising from this information and its use. Use of Microchip

devices in life support and/or safety applications is entirely at

the buyer’s risk, and the buyer agrees to defend, indemnify and

hold harmless Microchip from any and all damages, claims,

suits, or expenses resulting from such use. No licenses are

conveyed, implicitly or otherwise, under any Microchip

intellectual property rights.

Trademarks

The Microchip name and logo, the Microchip logo, dsPIC,

KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PI C START,

PIC32 logo, rfPIC and UNI/O are registered trademarks of

Microchip Technology Incorporated in the U.S.A. and other

countries.

FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,

MXDEV, MXLAB, SEEVAL and The Embedded Control

Solutions Company are registered trademarks of Microchip

Technology Incorporated in the U.S.A.

Analog-for-the-Digital Age, Application Maestro, chipKIT,

chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net,

dsPICworks, dsSPEAK, ECAN, ECONOMONITOR,

FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP,

Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB,

MPLINK, mTouch, Omniscient Code Generation, PICC,

PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE,

rfLAB, Select Mode, Total Endurance , TSHARC,

UniWinDriver, WiperLock and ZENA are trademarks of

Microchip Technology Incorporated in the U.S.A. and other

countries.

SQTP is a service mark of Microchip T echnology Incorporated

in the U.S.A.

All other trademarks mentioned herein are property of their

respective companies.

Printed on recycled paper.

ISBN: 978-1-62076-078-9

Note the following details of the code protection feature on Microchip devices:

• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its f amily of products is one of the most secure famili es of its kind on t he market today, when used in the

intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our

knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data

Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not

mean that we are guaranteeing the product as “unbreakable.”

Code protection is c onstantly evolving. We a t Microc hip are co m mitted to continuously improving the code prot ect ion featur es of our

products. Attempts to break Microchip’ s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts

allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Microchip received ISO/TS-16949:2009 certification for its worldwide

headquarters, design and wafer fabrication facilities in Chandler and

Tempe, Arizona; Gresham, Oregon and design centers in California

and India. The Company’s quality system processes and procedures

are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code ho pping

devices, Serial EEPROMs, microperiph erals, nonvolatile memory and

analog products. In addition, Microchip’s quality system for the design

and manufacture of development systems is ISO 9001:2000 certified.

QUALITY MANAGEMENT SYSTEM

CERTIFIED BY DNV

== ISO/TS 16949 ==

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11/29/11