November 1995
2N7000 / 2N7002 / NDS7002A
N-Channel Enhancement Mode Field Effect Transistor
General Description Features
___________________________________________________________________________________________
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol Parameter 2N7000 2N7002 NDS7002A Units
VDSS Drain-Source Voltage 60 V
VDGR Drain-Gate Voltage (RGS < 1 MΩ)60 V
VGSS Gate-Source Voltage - Continuous ±20 V
- Non Repetitive (tp < 50µs) ±40
IDMaximum Drain Current - Continuous 200 115 280 mA
- Pulsed 500 800 1500
PDMaximum Power Dissipation 400 200 300 mW
Derated above 25oC 3.2 1.6 2.4 mW/°C
TJ,TSTG Operating and Storage Temperature Range -55 to 150 -65 to 150 °C
TLMaximum Lead Temperature for Soldering
Purposes, 1/16" from Case for 10 Seconds 300 °C
THERMAL CHARACTERISTICS
RθJA Thermal Resistance, Junction-to-Ambient 312.5 625 417 °C/W
2N7000.SAM Rev. A1
These N-Channel enhancement mode field effect transistors
are produced using Fairchild's proprietary, high cell density,
DMOS technology. These products have been designed to
minimize on-state resistance while provide rugged, reliable,
and fast switching performance. They can be used in most
applications requiring up to 400mA DC and can deliver
pulsed currents up to 2A. These products are particularly
suited for low voltage, low current applications such as small
servo motor control, power MOSFET gate drivers, and other
switching applications.
High density cell design for low RDS(ON).
Voltage controlled small signal switch.
Rugged and reliable.
High saturation current capability.
S
D
G
S
G
D
TO-92
© 1997 Fairchild Semiconductor Corporation
2N7000 (TO-236AB)
2N7002/NDS7002A
Electrical Characteristics TA = 25°C unless otherwise noted
Symbol Parameter Conditions TypeMin Typ Max Units
OFF CHARACTERISTICS
BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 10 µA All 60 V
IDSS Zero Gate Voltage Drain Current VDS = 48 V, VGS = 0 V 2N7000 1µA
TJ=125°C 1mA
VDS = 60 V, VGS = 0 V 2N7002
NDS7002A 1µA
TJ=125°C 0.5 mA
IGSSF Gate - Body Leakage, Forward VGS = 15 V, VDS = 0 V 2N7000 10 nA
VGS = 20 V, VDS = 0 V 2N7002
NDS7002A 100 nA
IGSSR Gate - Body Leakage, Reverse VGS = -15 V, VDS = 0 V 2N7000 -10 nA
VGS = -20 V, VDS = 0 V 2N7002
NDS7002A -100 nA
ON CHARACTERISTICS (Note 1)
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 1 mA2N7000 0.8 2.1 3V
VDS = VGS, ID = 250 µA2N7002
NDS7002A 12.1 2.5
RDS(ON) Static Drain-Source On-Resistance VGS = 10 V, ID = 500 mA2N7000 1.2 5Ω
TJ =125°C 1.9 9
VGS = 4.5 V, ID = 75 mA1.8 5.3
VGS = 10 V, ID = 500 mA2N7002 1.2 7.5
TJ =100°C 1.7 13.5
VGS = 5.0 V, ID = 50 mA1.7 7.5
TJ =100C 2.4 13.5
VGS = 10 V, ID = 500 mANDS7002A1.2 2
TJ =125°C 23.5
VGS = 5.0 V, ID = 50 mA1.7 3
TJ =125°C 2.8 5
VDS(ON) Drain-Source On-Voltage VGS = 10 V, ID = 500 mA2N7000 0.6 2.5 V
VGS = 4.5 V, ID = 75 mA0.14 0.4
VGS = 10 V, ID = 500mA2N7002 0.6 3.75
VGS = 5.0 V, ID = 50 mA0.09 1.5
VGS = 10 V, ID = 500mANDS7002A 0.6 1
VGS = 5.0 V, ID = 50 mA0.09 0.15
2N7000.SAM Rev. A1
Electrical Characteristics TA = 25oC unless otherwise noted
Symbol Parameter Conditions TypeMin Typ Max Units
ON CHARACTERISTICS Continued (Note 1)
ID(ON) On-State Drain Current VGS = 4.5 V, VDS = 10 V 2N7000 75 600 mA
VGS = 10 V, VDS > 2 VDS(on) 2N7002 500 2700
VGS = 10 V, VDS > 2 VDS(on) NDS7002A 500 2700
gFS Forward Transconductance VDS = 10 V, ID = 200 mA2N7000 100 320 mS
VDS > 2 VDS(on), ID = 200 mA2N7002 80 320
VDS > 2 VDS(on), ID = 200 mANDS7002A 80 320
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance VDS = 25 V, VGS = 0 V,
f = 1.0 MHz All 20 50 pF
Coss Output Capacitance All 11 25 pF
Crss Reverse Transfer Capacitance All 4 5 pF
ton Turn-On Time VDD = 15 V, RL = 25 Ω,
ID = 500 mA, VGS = 10 V,
RGEN = 25
2N7000 10 ns
VDD = 30 V, RL = 150 Ω,
ID = 200 mA, VGS = 10 V,
RGEN = 25 Ω
2N700
NDS7002A 20
toff Turn-Off Time VDD = 15 V, RL = 25 Ω,
ID = 500 mA, VGS = 10 V,
RGEN = 25
2N7000 10 ns
VDD = 30 V, RL = 150 Ω,
ID = 200 mA, VGS = 10 V,
RGEN = 25 Ω
2N700
NDS7002A20
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
ISMaximum Continuous Drain-Source Diode Forward Current 2N7002 115 mA
NDS7002A 280
ISM Maximum Pulsed Drain-Source Diode Forward Current 2N7002 0.8 A
NDS7002A 1.5
VSD Drain-Source Diode Forward
Voltage VGS = 0 V, IS = 115 mA (Note 1) 2N7002 0.88 1.5 V
VGS = 0 V, IS = 400 mA (Note 1) NDS7002A0.88 1.2
Note:
1. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
2N7000.SAM Rev. A1
2N7000.SAM Rev. A1
012345
0
0.5
1
1.5
2
V , DRAIN-SOURCE VOLTAGE (V)
I , DRAIN-SOURCE CURRENT (A)
9.0
4.0
8.0
3.0
7.0
V = 10V
GS
DS
D
5.0
6.0
-50 -25 0 25 50 75 100 125 150
0.5
0.75
1
1.25
1.5
1.75
2
T , JUNCTION TEMPERATURE (°C)
DRAIN-SOURCE ON-RESISTANCE
J
R , NORMALIZED
DS(ON)
V = 10V
GS
I = 500mA
D
-50 -25 0 25 50 75 100 125 150
0.8
0.85
0.9
0.95
1
1.05
1.1
T , JUNCTION TEMPERATURE (°C)
GATE-SOURCE THRESHOLD VOLTAGE
J
I = 1 mA
D
V = V
DS GS
V , NORMALIZED
th
0 0.4 0.8 1.2 1.6 2
0.5
1
1.5
2
2.5
3
I , DRAIN CURRENT (A)
DRAIN-SOURCE ON-RESISTANCE
V =4.0V
GS
D
R , NORMALIZED
DS(on)
7.0
4.5
10
5.0
6.0
9.0
8.0
0 0.4 0.8 1.2 1.6 2
0
0.5
1
1.5
2
2.5
3
I , DRAIN CURRENT (A)
DRAIN-SOURCE ON-RESISTANCE
T = 125°C
J
25°C
-55°C
D
V = 10V
GS
R , NORMALIZED
DS(on)
Typical Electrical Characteristics
Figure 1. On-Region Characteristics Figure 2. On-Resistance Variation with Gate
Voltage and Drain Current
Figure 3. On-Resistance Variation
with Temperature Figure 4. On-Resistance Variation with Drain
Current and Temperature
Figure 5. Transfer Characteristics Figure 6. Gate Threshold Variation with
Temperature
0246810
0
0.4
0.8
1.2
1.6
2
V , GATE TO SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
V = 10V
DS
GS
D
T = -55°C
J 25°C125°C
2N7000 / 2N7002 / NDS7002A
2N7000.SAM Rev. A1
-50 -25 025 50 75 100 125 150
0.925
0.95
0.975
1
1.025
1.05
1.075
1.1
T , JUNCTION TEMPERATURE (°C)
DRAIN-SOURCE BREAKDOWN VOLTAGE
J
BV , NORMALIZED
DSS
I = 250µA
D
0.20.40.6 0.81 1.2 1.4
0.001
0.005
0.01
0.05
0.1
0.5
1
2
V , BODY DIODE FORWARD VOLTAGE (V)
I , REVERSE DRAIN CURRENT (A)
V = 0V
GS
T = 125°C
J
SD
S
25°C
-55°C
0 0.4 0.81.2 1.6 2
0
2
4
6
8
10
Q , GATE CHARGE (nC)
V , GATE-SOURCE VOLTAGE (V)
g
GS
I =500mA
D
V = 25V
DS
115mA
280mA
1 2 3 5 10 20 30 50
1
2
5
10
20
40
60
V , DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
DS
C
iss
f = 1 MHz
V = 0V
GS
C
oss
C
rss
G
D
S
VDD
RL
V
V
IN
OUT
VGS DUT
RGEN
10%
50%
90%
10%
90%
90%
50%
Input, Vin
Output, V
out
ton toff
td(off) tf
tr
td(on)
Inverted
10%
Pulse Width
Figure 7. Breakdown Voltage Variation
with Temperature Figure 8. Body Diode Forward Voltage Variation with
Figure 9. Capacitance Characteristics Figure 10. Gate Charge Characteristics
Figure 11. Figure 12. Switching Waveforms
Typical Electrical Characteristics (continued)
2N7000 / 2N7002 /NDS7002A
2N7000.SAM Rev. A1
0.0001 0.001 0.01 0.1 110 100 300
0.001
0.002
0.01
0.05
0.1
0.2
0.5
1
t , TIME (sec)
TRANSIENT THERMAL RESISTANCE
r(t), NORMALIZED EFFECTIVE
1
Single Pulse
D = 0.5
0.1
0.05
0.02
0.01
0.2
Duty Cycle, D = t /t
1 2
R (t) = r(t) * R
R = (See Datasheet)
θJA
θJA
θJA
T - T = P * R (t)
θJAA
J
P(pk)
t
1 t
2
0.0001 0.001 0.01 0.1 110 100 300
0.01
0.02
0.05
0.1
0.2
0.5
1
t , TIME (sec)
TRANSIENT THERMAL RESISTANCE
r(t), NORMALIZED EFFECTIVE
1
Single Pulse
D = 0.5
0.1
0.05
0.02
0.01
0.2
Duty Cycle, D = t /t
1 2
R (t) = r(t) * R
R = (See Datasheet)
θJA
θJA
θJA
T - T = P * R (t)
θJAA
J
P(pk)
t
1 t
2
1 2 5 10 20 30 60 80
0.005
0.01
0.05
0.1
0.5
1
2
3
V , DRAIN-SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
DS
D
V = 10V
SINGLE PULSE
T = 25°C
GS
A
RDS(ON) Limit
100ms
1ms
10ms
DC
1s
100us
10s
Figure 16. TO-92, 2N7000 Transient Thermal Response Curve
Figure 17. SOT-23, 2N7002 / NDS7002A Transient Thermal Response Curve
1 2 5 10 20 30 60 80
0.005
0.01
0.05
0.1
0.5
1
2
3
V , DRAIN-SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
DS
D
V = 10V
SINGLE PULSE
T = 25°C
GS
A
RDS(ON) Limit
100ms
1ms
10ms
DC
1s
10s
100us
1 2 5 10 20 30 60 80
0.005
0.01
0.05
0.1
0.5
1
2
3
V , DRAIN-SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
DS
D
V = 10V
SINGLE PULSE
T = 25°C
GS
A
RDS(ON) Limit
100ms
1ms
10ms
DC
1s
10s
100us
Figure 13. 2N7000 Maximum
Safe Operating Area Figure 14. 2N7002 Maximum
Safe Operating Area
Figure 15. NDS7000A Maximum
Safe Operating Area
Typical Electrical Characteristics (continued)
TO-92 Tape and Reel Data
September 1999, Rev. B
TO-92 Packaging
Configuration: Figure 1.0
AMMO PACK OPTION
See Fig 3.0 for 2 Ammo
Pack Options
2000 units per
EO70 box for
std option
FSCINT Label
530mm x 130m m x
83mm
Inter med iate box
10,000 units maximum
per
intermediate box
for std option
FSCINT Label
114mm x 102m m x 51mm
Immed iate Box
Anti-static
Bubble Sheets
(TO-92) BULK PACKING INFORMATION
EOL
CODE DESCRIPTION LEADCLIP
DIMENSION QUANTITY
J18Z TO-18 OPTION STD NO LEAD CLIP 2.0 K / BOX
J05Z TO-5 OPTION STD NO LEAD CLIP 1.5 K / BOX
NO EOL
CODE TO-92 STANDARD
STRAIGHT NO LE A DCLIP 2.0 K / BOX
BULK OPTION
See Bulk Packing
Information table
375mm x 267m m x 375mm
Inter med iate Box
FSCINT
Label
Customized
Label
333mm x 231m m x 183mm
Inter med iate Box
FSCINT
Label
Customized
Label
TO-92 TNR/AMMO PACKING INFROMATION
Packing S tyle Qu antity EO L code
Reel A 2,000 D26Z
E2,000 D27Z
Ammo M 2,000 D74Z
P2,000 D75Z
U nit weight = 0.2 2 gm
Reel weight w ith compo nents = 1.0 4 kg
Ammo w e i g ht w ith components = 1.02 kg
Max q uantity per inte rme d iate b ox = 1 0,000 u n its
F63TNR
Label
5 Ammo boxes per
Inter med iate Box
Customized
Label
327mm x 158m m x 135mm
Immed iate Box
LOT: CBVK741B019
NSID: PN2222N
D/C1:
D9842 SPEC REV: B2
SPEC:
QTY: 10000
QA REV:
FAIRCHILD SEMICONDUCTOR CORPORATION
HTB:B
(FSCINT)
F63TNR
Label
Customized
Label
5 Reels per
Inter med iate Box
TAPE and REEL OPTION
See Fig 2.0 for various
Reeling Styles
LOT: CBVK741B019
FSID: PN222N
D/C1: D9842 QTY1: SPEC REV:
SPEC:
QTY: 2000
D/C2: QTY2: CPN: N/F: F (F63TNR) 3
F63TNR Label sample
FSCINT Label sample
C
5 EO70 boxes per
intermediate Box
ustomized
Label
©2000 Fairchild Semiconductor International
TO-92 Tape and Reel Data, continued
September 1999, Rev. B
TO-92 Reeling Style
Configuration: Figure 2.0
Style “A”, D26Z, D70 Z (s/h)
Machine Option “A” (H)
Style “E ”, D27 Z, D 71Z (s/ h)
Machine Option “E” (J)
FIRST WIRE OFF IS EMITTER
ADHESIVE TAPE IS ON THE TOP SIDE
FLAT OF TRANSISTOR IS ON BOTTOM
ORDER STYLE
D75Z (P)
FIRST WIRE OFF IS COLLECTOR
ADHESIVE TAPE IS ON THE TOP SIDE
FLAT OF TRANSISTOR IS ON TOP
ORDER STYLE
D74Z (M)
TO-92 Radial Ammo Packaging
Configuration: Figure 3.0
FIRST WIRE OFF IS EMITTER (ON PKG. 92)
ADHESIVE TAPE IS ON BOTTOM SIDE
FLAT OF TRANSISTOR IS ON BOTTOM
FIRST WIRE OFF IS COLLECTOR (ON PKG. 92)
ADHESIVE TAPE IS ON BOTTOM SIDE
FLAT OF TRANSISTOR IS ON TOP
ITEM DESCRIPTION
Base of Package to Lead Bend
Com p on en t He ig ht
Lead C linch H eight
Component Base Height
Component Alignment ( side/side )
Component Alignment ( front/back )
Com p on en t Pi tc h
Feed Hole Pitch
Hole Center to First Lead
Hole Center to Component Center
Lead Spread
Lead Thickness
Cut Lead Length
Taped Lead Length
Taped Lead Thickness
Carrier Tape Thickness
Carrier Tape Width
Hold - down Tape Width
Hold - down Tape position
Feed Hole Position
Sprocket Hole Diameter
Lead Spring Out
SYMBOL
b
Ha
HO
H1
Pd
Hd
P
PO
P1
P2
F1/F2
d
L
L1
t
t1
W
WO
W1
W2
DO
S
DIMENSION
0. 09 8 (m ax )
0. 92 8 (+ /- 0.025)
0. 63 0 (+ /- 0.020)
0. 74 8 (+ /- 0.020)
0. 04 0 (m ax )
0. 03 1 (m ax )
0. 50 0 (+ /- 0.020)
0. 50 0 (+ /- 0.008)
0.150 (+0.009, -0.010)
0. 24 7 (+ /- 0.007)
0. 10 4 (+ /- 0 . 01 0)
0.018 (+0.002, -0.003)
0. 42 9 (m ax )
0.209 (+0.051, -0.052)
0. 03 2 (+ /- 0.006)
0. 02 1 (+ /- 0.006)
0.708 (+0.020, -0.019)
0. 23 6 (+ /- 0.012)
0. 03 5 (m ax )
0. 36 0 (+ /- 0.025)
0.157 (+0.008, -0.007)
0. 00 4 (m ax )
Note : All dim ensions are in inches.
ITEM DESCRIPTION SYSMBOL MINIMUM MAXIMUM
Ree l Diam eter D1 13 . 9 75 14 .02 5
Arb or Hol e Di am et er (St a nd ard) D2 1.160 1.2 00
(Small Hole) D2 0.650 0.700
Core Diameter D3 3.100 3.300
Hub Recess Inner Diameter D4 2.700 3.100
Hub Recess Depth W1 0.370 0.570
Flange to Flange Inner Width W2 1.630 1.690
Hub to Hub Center Width W3 2.090
Not e: All dim e ns io ns are inch es
TO-92 Tape and Reel Taping
Dimension Configuratio n: Figure 4.0
Ha
H1 HO
PO
P2
P1 F1
DO
PPd
b
d
L1
LS
WO W2
W
t
t1
Hd
W1
TO-92 Reel
Configuration: Figure 5.0
User Direction of Feed
SENSITIVE DEVICES
ELECTROSTATIC
D1
D3
Cust omized Label
W2
W1 W3
F63 TNR Label
D4
D2
TO-92 Tape and Reel Data, continued
July 1999, Rev. A
TO-92 (FS PKG Code 92, 94, 96)
TO-92 Package Dimensions
January 2000, Rev. B
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in:
inches [millimeters]
Part Weight per unit (gram): 0.1977
©2000 Fairchild Semiconductor International
SOT-23 Packag in g
Configurat ion: Figure 1.0
Components Leader Tape
500mm minimum or
125 emp ty pocket s
Tr ailer Tape
300mm minimum or
75 empty pocket s
SOT-23 Tape Leader and Trailer
Configuration: Figure 2.0
Cover Tape
Carrier Tape
Note/Comments
Packaging Option
SOT-23 Packaging Information
Standard
(no flow code) D87Z
Packaging type
Reel Si ze
TNR
7" Dia
TNR
13"
Qty per Reel/Tube/Bag 3,000 10,000
Bo x Dim ensi on (m m ) 187x107x183 343x343x64
Max qt y per B o x 24,000 30,000
Weight per unit (gm) 0.0082 0.0082
Weight per Reel (kg) 0.1175 0.4006
Human readable
Label
Human Readable Label
Human Read able Label sample
343mm x 342mm x 64mm
Intermediate box for L87Z Opti on
187mm x 107mm x 183mm
Intermediate Box for Standard Option
SOT-23 Unit Orientation
3P 3P 3P 3P
Human Readable
Label
Customized Label
Embossed
Carr ier Tape
Antistatic Cover Tape
Packaging Description:
SOT-23
made from a dissipative (carbon filled) polycarbonate
resin. The cover tape is a multilayer film (Heat A ctivated
Adhesive in nature) primaril y composed of polyester film ,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped with
3,000 uni ts per 7" or 177cm diameter reel. The reels are
dark blue in color and is made of polystyrene plastic (anti-
static coated). Other option comes in 10,000 units per 13"
or 330cm diameter reel. Thi s and some other opti ons are
described in the Packaging Information table.
These full reels are indiv idually labeled and pl aced inside
a standard intermediate made of recyclable corrugated
brown paper w it h a Fai r child l ogo pri nt i ng. One pizza box
contains eight reels maximum. And these intermediate
boxes are placed inside a labeled shipping box which
comes i n different si zes depending on the number of parts
shipped.
parts are shipped in tape. The carrier tape is
SOT-23 Tape and Reel Data
September 1999, Rev . C
©2000 Fairchild Semiconductor International
Dimensions are in millimeter
Pkg type
A0 B0 W D0 D1 E1 E2 F P1 P0 K0 T Wc Tc
SOT-23
(8mm)
3.15
+/-0.10 2.77
+/-0.10 8.0
+/-0.3 1.55
+/-0.05 1.125
+/-0.125 1.75
+/-0.10 6.25
min 3.50
+/-0.05 4.0
+/-0.1 4.0
+/-0.1 1.30
+/-0.10 0.228
+/-0.013 5.2
+/-0.3 0.06
+/-0.02
Dimensions are in inches and millimeters
Tape Siz e Reel
Option Dim A Dim B Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL)
8mm 7" Dia 7.00
177.8 0.059
1.5 512 +0.020/-0.008
13 +0.5/-0.2 0.795
20.2 2.165
55 0.331 +0.059/-0.000
8.4 +1.5/0 0.567
14.4 0.311 – 0.429
7.9 – 10. 9
8m m 13" Dia 13.00
330 0.059
1.5 512 +0.020/-0.008
13 +0.5/-0.2 0.795
20.2 4.00
100 0.331 +0.059/-0.000
8.4 +1.5/0 0.567
14.4 0.311 – 0.429
7.9 – 10. 9
See detail AA
Dim A
max
13" Diameter Option
7" Diameter Option
Dim A
Max
See detail AA
W3
W2 max Measured at Hub
W1 Measured at Hub
Dim N
Dim D
min
Dim C
B Min
DETAIL AA
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
20 deg maximum component rotation
0.5mm
maximum
0.5mm
maximum
Sketch C (Top View)
Component lateral movement
Typical
component
cavity
center line
20 deg maximum
Typical
component
center line
B0
A0
Sketch B (Top View)
Component Rotation
Sketch A (Side o r Front Sec tional View)
Component Rotation
User Direction of Feed
SOT-23 Embossed Carrier Tape
Configuration: Figure 3.0
SOT-23 Reel Configuration: Figure 4.0
P1 A0
D1
FW
E1
E2
Tc
Wc
K0
T
B0
D0P0 P2
SOT-23 Tape and Reel Data, continued
September 1999, Rev . C
SOT-23 (FS PKG Code 49)
SOT-23 Package Dimensions
September 1998, Rev . A1
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in:
inches [millimeters]
Par t Weight per unit (gram): 0.0082
©2000 Fairchild Semiconductor International
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Advance Information
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No Identification Needed
Obsolete
This datasheet contains the design specifications for
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Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICA TION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
PowerTrench
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SILENT SWITCHER
SMART ST ART™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
FASTr™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
POP™
Rev . G
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DOME™
E2CMOSTM
EnSignaTM
FACT™
F ACT Quiet Series™
FAST
SyncFET™
TinyLogic™
UHC™
VCX™
