1. Product profile
1.1 General description
NPN 500 mA Resistor-Equipped Transistor (RET) in a small Surface-Mounted
Device (SMD) plastic package.
PNP complement: PDTB113ZT.
1.2 Features
1.3 Applications
1.4 Quick reference data
PDTD113ZT
NPN 500 mA, 50 V resistor-equipped transistor;
R1 = 1 kΩ, R2 = 10 kΩ
Rev. 02 — 23 March 2009 Product data sheet
nBuilt-in bias resistors nReduces component count
nSimplifies circuit design nReduces pick and place costs
n500 mA output current capability n±10 % resistor ratio tolerance
nDigital application in automotive and
industrial segments
nCost-saving alternative for BC817 series
in digital applications
nControlling IC inputs nSwitching loads
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VCEO collector-emitter voltage open base - - 50 V
IOoutput current - - 500 mA
R1 bias resistor 1 (input) 0.7 1 1.3 kΩ
R2/R1 bias resistor ratio 9 10 11
PDTD113ZT_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 23 March 2009 2 of 9
NXP Semiconductors PDTD113ZT
NPN 500 mA resistor-equipped transistor; R1 = 1 kΩ, R2 = 10 kΩ
2. Pinning information
3. Ordering information
4. Marking
[1] * = -: made in Hong Kong
* = p: made in Hong Kong
* = t: made in Malaysia
* = W: made in China
5. Limiting values
Table 2. Pinning
Pin Description Simplified outline Graphic symbol
1 input (base)
2 GND (emitter)
3 output (collector)
12
3
sym007
3
2
1R1
R2
Table 3. Ordering information
Type number Package
Name Description Version
PDTD113ZT - plastic surface-mounted package; 3 leads SOT23
Table 4. Marking codes
Type number Marking code[1]
PDTD113ZT *7V
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VCBO collector-base voltage open emitter - 50 V
VCEO collector-emitter voltage open base - 50 V
VEBO emitter-base voltage open collector - 5 V
VIinput voltage
positive - +10 V
negative - −5V
IOoutput current - 500 mA
PDTD113ZT_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 23 March 2009 3 of 9
NXP Semiconductors PDTD113ZT
NPN 500 mA resistor-equipped transistor; R1 = 1 kΩ, R2 = 10 kΩ
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
6. Thermal characteristics
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
7. Characteristics
Ptot total power dissipation Tamb ≤25 °C[1] - 250 mW
Tjjunction temperature - 150 °C
Tamb ambient temperature −65 +150 °C
Tstg storage temperature −65 +150 °C
Table 5. Limiting values
…continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
Table 6. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Rth(j-a) thermal resistance from
junction to ambient in free air [1] - - 500 K/W
Table 7. Characteristics
T
amb
=25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
ICBO collector-base cut-off
current VCB =40V; I
E= 0 A - - 100 nA
VCB =50V; I
E= 0 A - - 100 nA
ICEO collector-emitter cut-off
current VCE =50V; I
B= 0 A - - 0.5 µA
IEBO emitter-base cut-off
current VEB =5V; I
C= 0 A - - 0.8 mA
hFE DC current gain VCE =5V; I
C=50mA 70 - -
VCEsat collector-emitter
saturation voltage IC= 50 mA; IB= 2.5 mA - - 0.3 V
VI(off) off-state input voltage VCE =5V; I
C= 100 µA 0.3 0.6 1 V
VI(on) on-state input voltage VCE = 0.3 V; IC= 20 mA 0.4 0.8 1.4 V
R1 bias resistor 1 (input) 0.7 1 1.3 kΩ
R2/R1 bias resistor ratio 9 10 11
Cccollector capacitance VCB =10V; I
E=i
e=0A;
f = 100 MHz -7-pF
PDTD113ZT_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 23 March 2009 4 of 9
NXP Semiconductors PDTD113ZT
NPN 500 mA resistor-equipped transistor; R1 = 1 kΩ, R2 = 10 kΩ
VCE =5V
(1) Tamb = 100 °C
(2) Tamb =25°C
(3) Tamb =−40 °C
IC/IB=20
(1) Tamb = 100 °C
(2) Tamb =25°C
(3) Tamb =−40 °C
Fig 1. DC current gain as a function of collector
current; typical values Fig 2. Collector-emitter saturation voltage as a
function of collector current; typical values
VCE = 0.3 V
(1) Tamb =−40 °C
(2) Tamb =25°C
(3) Tamb = 100 °C
VCE =5V
(1) Tamb =−40 °C
(2) Tamb =25°C
(3) Tamb = 100 °C
Fig 3. On-state input voltage as a function of
collector current; typical values Fig 4. Off-state input voltage as a function of
collector current; typical values
006aaa314
102
10
103
hFE
1
IC (mA)
10−1103
102
110
(1)
(2)
(3)
006aaa315
IC (mA)
110
3
102
10
10−1
VCEsat
(V)
10−2
(1)
(2)
(3)
006aaa316
IC (mA)
10−1103
102
110
1
10
VI(on)
(V)
10−1
(1)
(2)
(3)
006aaa317
IC (mA)
10−1101
1
VI(off)
(V)
10−1
(1)
(2)
(3)
PDTD113ZT_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 23 March 2009 5 of 9
NXP Semiconductors PDTD113ZT
NPN 500 mA resistor-equipped transistor; R1 = 1 kΩ, R2 = 10 kΩ
8. Package outline
9. Packing information
[1] For further information and the availability of packing methods, see Section 13.
Fig 5. Package outline SOT23 (TO-236AB)
04-11-04Dimensions in mm
0.45
0.15
1.9
1.1
0.9
3.0
2.8
2.5
2.1 1.4
1.2
0.48
0.38 0.15
0.09
12
3
Table 8. Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.
[1]
Type number Package Description Packing quantity
3000 10000
PDTD113ZT SOT23 4 mm pitch, 8 mm tape and reel -215 -235
PDTD113ZT_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 23 March 2009 6 of 9
NXP Semiconductors PDTD113ZT
NPN 500 mA resistor-equipped transistor; R1 = 1 kΩ, R2 = 10 kΩ
10. Soldering
Fig 6. Reflow soldering footprint SOT23 (TO-236AB)
Fig 7. Wave soldering footprint SOT23 (TO-236AB)
solder lands
solder resist
occupied area
solder paste
sot023_fr
0.5
(3×)
0.6
(3×)
0.6
(3×)
0.7
(3×)
3
1
3.3
2.9
1.7
1.9
2
Dimensions in mm
solder lands
solder resist
occupied area
preferred transport direction during soldering
sot023_fw
2.8
4.5
1.4
4.6
1.4
(2×)
1.2
(2×)
2.2
2.6
Dimensions in mm
PDTD113ZT_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 23 March 2009 7 of 9
NXP Semiconductors PDTD113ZT
NPN 500 mA resistor-equipped transistor; R1 = 1 kΩ, R2 = 10 kΩ
11. Revision history
Table 9. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PDTD113ZT_2 20090323 Product data sheet - PDTD113Z_SER_1
Modifications: •The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•Legal texts have been adapted to the new company name where appropriate.
•Type numbers PDTD113ZK and PDTD113ZS removed
•Table 5 “Limiting values”: typo for maximum value of VI positive corrected
•Section 10 “Soldering”: added
•Section 12 “Legal information”: updated
PDTD113Z_SER_1 20050405 Product data sheet - -
PDTD113ZT_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 23 March 2009 8 of 9
NXP Semiconductors PDTD113ZT
NPN 500 mA resistor-equipped transistor; R1 = 1 kΩ, R2 = 10 kΩ
12. Legal information
12.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
12.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
13. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
NXP Semiconductors PDTD113ZT
NPN 500 mA resistor-equipped transistor; R1 = 1 kΩ, R2 = 10 kΩ
© NXP B.V. 2009. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 23 March 2009
Document identifier: PDTD113ZT_2
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
14. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description. . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
6 Thermal characteristics. . . . . . . . . . . . . . . . . . . 3
7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 3
8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 5
9 Packing information. . . . . . . . . . . . . . . . . . . . . . 5
10 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 7
12 Legal information. . . . . . . . . . . . . . . . . . . . . . . . 8
12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 8
12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
13 Contact information. . . . . . . . . . . . . . . . . . . . . . 8
14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
