®
Design Software
Selector Guide
June 2001
Contents
2 Introduction
4 Selecting a Design Software Product
6 Recommended System Configurations
7 Altera Programming Hardware
8 Third-Party Solutions
Introduction
Altera offers the programmable logic industry’s fastest, most
powerful, and most flexible design software and programming
hardware. The Altera® Quartus® II software provides a complete
design environment for developing system-on-a-programmable-
chip (SOPC) solutions, and in early 2002, it will support all
Altera devices recommended for new designs, including
MAX® devices. The MAX+PLUS® II software is the current
solution for Altera MAX devices. The Altera design software
integrates into almost any design environment, with multi-
platform support for Windows 2000/98/NT, Sun Solaris, and
HP-UX operating systems, and interfaces to industry-standard
EDA tools. Also, support for the Red Hat version of Linux
will be available in Q1 2002.
Altera Design Software Subscription
Program
Subscribing to the Altera Design Software Subscription
Program provides you with the software necessary to perform
design, synthesis, place and route, verification, and device
programming for all Altera programmable logic devices
(PLDs). Your subscription brings you complete access to all
Altera design software and updates for a 12-month period.
This software subscription includes:
Quartus II Design Software
MAX+PLUS II Design Software
Exemplar Logics LeonardoSpectrum-Altera Synthesis
Software
ModelTechnologys ModelSim-Altera Simulation
Software
Excalibur Embedded Processor Design Software
If after 12 months you allow your subscription to expire,
your current Altera software will continue to work, but you
will not receive the updates and new features that come out
in subsequent software releases. Other Altera design software
options include the free Quartus II Web Edition (available
August 2001) and free E+MAX software, both of which
can be downloaded from the Altera web site.
Altera Corporation2
Altera Corporation 3
Using This Guide
This Design Software Selector Guide will help you choose
the Altera design environment that best meets your needs.
It describes:
The Altera design software and OEM synthesis and
simulation products
Design software subscriptions
Recommended system configurations
Altera programming hardware
Third-party solutions that complement the Altera design
software
Quartus II Design Software
The Quartus II design software
enhances productivity by offering
advanced features that include the
PowerFit fitter technology, LogicLock
incremental design methodology, support for multi-million
gate devices, including the new APEX II device family, and
seamless integration with third-party tools (see Table 2 for
complete device support details). Quartus II software support
for the Excalibur embedded processor family goes beyond
hardware support to include a software workflow that fully
integrates C/C++ compilers and debuggers into the develop-
ment environment. For details about Quartus II software
features, see Table 4.
MAX+PLUS II Design Software
The MAX+PLUS II design software offers a wide
variety of options for design entry, compilation,
verification, and programming. This easy-to-use
tool supports the Altera ACEX, FLEX®, and MAX PLD
families and integrates simply with industry-standard design
entry, synthesis, and verification tools. For details about the
MAX+PLUS II software features, see Table 4 on page 5.
World-Class Synthesis & Simulation
Altera-specific versions of Exemplar Logics
LeonardoSpectrum and Model Technologys
ModelSim synthesis and simulation tools
are included with all Altera design
software subscriptions. Customers can
select support for either VHDL or Verilog hardware description
language (HDL). With these world-class tools, Altera customers
have access to synthesis, behavioral simulation, and simulation
test-bench support.
Support for Excalibur Embedded
Processor Designs
Altera is the first company to offer PLD
hardware design and simulation and embedded
processor development and debugging tools
in a single integrated environment. All
Altera design software subscriptions now include C/C++
tools to develop and debug software that runs on Excalibur
embedded processors. These development and debugging
tools are integrated with the Quartus II design software
through the new SoftMode design entry interface.
Web Edition Software
The Quartus II Web Edition and E+MAX software can be
downloaded and licensed free of charge from the Altera web
site. The Quartus II Web Edition software (available August
2001) is a subset of the Quartus II software that provides
entry-level support for the popular APEX 20KE, FLEX 10KE,
and FLEX 6000 devices. The E+MAX software is a subset of
the MAX+PLUS II software targeted at the industrys most
popular product-term architecturesthe MAX 7000 and
MAX 3000 devices.
Altera Quartus II Development Software
Altera Corporation4
Selecting a Design Software
Product
All design software subscriptions include a one-year license.
After this license expires, your software will continue to
work but updates can no longer be installed. To continue
receiving and installing updates, simply purchase a RENEWAL
subscription to extend your subscription license for an addi-
tional year. Select the subscription product that best suits
your needs from Table 1.
Altera Device Support
Together, the Quartus II and MAX+PLUS II design software
support all the Altera programmable logic device families
and devices, as shown in Table 2. Both are supplied with an
Altera design software subscription. The free downloadable
Quartus II Web Edition and E+MAX software support the
low- to mid-density devices listed in Table 2.
Altera offers the free Quartus II Web Edition and E+MAX
software for download from the Altera web site. Free versions
of the LeonardoSpectrum-Altera VHDL or Verilog HDL synthesis
tools that can be used in conjunction with the Quartus II Web
Edition and E+MAX software are also available for download.
Table 3 shows the Altera Web Edition software options.
Altera Design Software Feature
Comparisons
Table 4 describes each design software feature and compares
the Quartus II, MAX+PLUS II, Quartus II Web Edition, and
E+MAX software.
ORDERING CODETYPE OF LICENSEPLATFORM SUPPORT
Table 1. Altera Subscription Products
FIXEDPC
FLOATPC
ADD-FLOATPC
FLOATNET
ADD-FLOATNET
RENEWAL
Stand-alone, single-user
Multiple-user network license (one concurrent user)
Add additional concurrent users to FLOATPC license
Multiple-user network license (one concurrent user)
Add additional concurrent users to FLOATNET license
One-year extension for FIXEDPC, FLOATPC, FLOATNET,
ADD-FLOATPC, or ADD-FLOATNET licenses
PC
PC
PC
PC, Solaris, HP-UX
PC, Solaris, HP-UX
Same as original
subscription
DEVICE MAX+PLUS II QUARTUS II WEB EDITION
Table 2. Altera Design Software Device Support
QUARTUS II
APEX II (All)
APEX 20K (All)
APEX EP20K30E, EP20K60E, EP20K160E
Mercury™
FLEX 10K (All)
FLEX EPF10K30E, EPF10K50E, EPF10K50S, EPF10K100E
FLEX EPF10K130E, EPF10K200E, EPF10K200S
Excalibur
ACEX 1K
FLEX 6000 (All)
MAX 9000
MAX 7000
MAX 3000
E+MAX
*
*
*
*
✓✓
*Support will be available Q1 2002
SOFTWARE TOOLS INCLUDED PLATFORM
SUPPORT
Table 3. Web Editions of Altera Design Software
LICENSE TYPE
Quartus II Web Edition
E+MAX
Stand-alone, single-user
Stand-alone, single-user
PC
PC
LICENSE
DURATION
150 days
180 days
EXPIRATION
Software will not run until
a new license is requested
Software will not run until
a new license is requested
Quartus II Web Edition,
LeonardoSpectrum-Altera
E+MAX,
LeonardoSpectrum-Altera
Altera Corporation 5
The LogicLock design methodology allows you to create placement
constraints around an IP core or block of logic, verify its
functionality and performance, and then control its placement.
LogicLock constraints can be used with custom blocks of logic and
with pre-verified IP from Altera or the AMPPSM partners.
The Graphic Editor allows you to use basic building blocks for
creating a design. The Symbol Editor allows you to create or modify
a symbol for any design file.
The Block Editor allows you to enter and edit design information in
the form of logical blocks. Block-level diagrams can automatically
be converted to VHDL or Verilog HDL design files for further
synthesis and simulation using industry-standard tools.
Colored syntax-sensitive editors in the Altera design software
support VHDL, Verilog HDL, and Altera Hardware Description
Language (AHDL) development.
Integrates C/C++ and assembly language text editor, compiler,
debugger, and utility programs to develop object code to run on
Excalibur embedded processors.
NativeLink integration provides a seamless interface for passing
information between the Quartus II software and third-party EDA
software tools.
The Floorplan Editor provides a graphical method for assigning logic
cells and pins and viewing critical timing paths in a design.
The Hierarchy Display allows you to easily traverse hierarchical
designs.
The LPM offers parameterized functions that can be used as building
blocks to simplify design entry and increase performance.
MegaCore functions are pre-verified HDL design files for complex,
system-level functions that are created by Altera and optimized for
Altera device architectures.
The PowerFit technology uses the designers timing constraints to
optimally place and route a design to satisfy all timing requirements.
OpenCore evaluation enables designers to compile and simulate
MegaCore and AMPP parameterized functions before licensing the
function.
The Timing Analyzer traces all possible signal paths and worst-case
timing to determine the speed-critical and performance-limiting
paths in a design. The Timing Analyzer is linked with the Floorplan
Editor to quickly optimize critical timing paths.
The Functional Simulator uses design information to model the
logical function of a design with zero propagation delays.
The Timing Simulator tests the logical function and worst-case
timing of a fully synthesized and optimized design.
The ModelSim-Altera tool is included with Altera design software
subscriptions to provide support for functional simulation of HDL
code and to allow simulation using a VHDL or Verilog HDL test-
bench stimulus.
SignalTap logic analysis allows capture and analysis of any internal
node or I/O signal for system-level verification of devices running
in-system and at system speeds.
The PowerGauge analysis tool uses the designer's simulation files to
link power consumption estimates with customer-specific design
files and operating parameters.
Incremental
Design
DesignPlace and
Route
Verification
Table 4. Altera Design Software Features (Part 1 of 2)
Block Design Entry
Schematic Design Entry
LogicLock Incremental
Design Methodology
Text-Based Design Entry:
VHDL, Verilog HDL, or AHDL
PowerFit Place & Route
OpenCore® Evaluation
Timing Analysis
NativeLink® Integration
Floorplan Editing
FEATURE DESCRIPTION QUARTUS II QUARTUS II
WEB EDITION
Hierarchical Design
Management
Library of Parameterized
Modules (LPM)
MegaCore® Functions
MAX+PLUS II E+MAX
✓✓
✓✓
✓✓
✓✓
✓✓
✓✓
✓✓
✓✓
✓✓
✓✓
✓✓
Continued on next page
Functional Simulation
Timing Simulation
Functional/Behavioral HDL
Simulation & Test-Bench
Support
SignalTap® Logic Analysis
PowerGauge Power
Analysis
✓✓
✓✓
✓✓
SoftMode Processing for
Excalibur Embedded
Processor Development
Altera Corporation6
Together with the appropriate programming hardware, the Altera design
software programs, configures, verifies, examines, blank-checks, and
functionally tests Altera devices on your desktop. The Altera design
software supports in-system programmability (ISP), in-circuit
reconfiguration (ICR), and traditional programming methods.
The Altera design software supports the JEDEC-approved Jam STAPL
format, which is an interpreted language optimized for programming
devices via the IEEE 1149 standard JTAG interface.
Tcl is an industry-standard scripting language that can be used to
automate compilation flows, perform a common sequence of tasks,
perform timing analysis or run simulations, make device assignments,
and more.
The Altera design software Help provides complete documentation for
software features, design guidelines, and detailed device information.
Help is available in both English and Japanese.
Device ProgrammingOther
Table 4. Altera Design Software Features (Part 2 of 2)
Device Programming
Jam Standard
Programming & Test
Language (STAPL)
FEATURE DESCRIPTION QUARTUS II QUARTUS II
WEB EDITION
MAX+PLUS II E+MAX
✓✓
✓✓
✓✓
Tcl Scripting
On-Line Help
Table 5. Recommended System Configurations for Quartus II & OEM Partner Tools
Device Minimum Additional Swap
Space on Hard Disk Drive
Minimum
Physical RAM
Memory Requirements
EP1M120, EP1M350, EP20K60E,
EP20K100, EP20K100E, EP20K160E,
EP20K200, EP20K200C, EP20K200E,
EPXA1, FLEX 10KE, FLEX 10KS, FLEX 6000
EP20K300E, EP20K400, EP20K400C,
EP20K400E, EP20K400C, EP20K600E,
EP2A15, EP2A25, EPXA4
EP20K1000C, EP20K1000E, EP20K1500C,
EP20K1500E, EP2A40, EPXA10
EP2A70
Windows-Based PC
Pentium-based PC or compatible computer
CPU speed: 600 MHz
Operating system software:
Microsoft Windows 2000, or
Microsoft Windows NT version 4.0 or higher, or
Microsoft Windows 98 (supported, not recommended)
SVGA graphics card and monitor compatible with Microsoft
Windows
CD-ROM drive
2- or 3-button mouse compatible with Microsoft Windows
Windows-Based PC (Continued)
Full-length 8-bit ISA slot for programming card
Parallel port/USB port
Internet Explorer version 4.0 or higher
Sun SPARCstation
Sun SPARCstation with color or monochrome monitor
Sun Solaris version 2.6, 2.7, or 2.8
ISO 9660-compatible CD-ROM drive
Internet Explorer version 4.0 or higher
HP 9000 Series 700/800 Workstation
HP 9000 Series 700/800 workstation with color or
monochrome monitor
Operating system software:
HP-UX version 11.0 with Additional Core Enhance-
ments (ACE) dated November 1999 or later, or
HP-UX version 10.2x with ACE dated December
1999 or later (supported, not recommended)
HP-CDE
ISO 9660-compatible CD-ROM drive
Internet Explorer version 4.0 or higher
256 MB
512 MB
1,024 MB
2,048 MB
256 MB
512 MB
1,024 MB
2,048 MB
Recommended System
Configurations
Altera Corporation 7
Table 6. Recommended System Configurations for MAX+PLUS II & OEM Partner Tools
Memory Requirements
*Additional RAM (256 Mbytes to 512 Mbytes) provides significant improvement
in compilation times for designs targeting EPF10K100, EPF10K100A, EPF10K100B,
EPF10K100E, EPF10K130V, EPF10K130VE, EPF10K200E, EPF10K200ES, and
EPF10K250A devices.
ACEX 1K
FLEX 10K*
FLEX 6000
MAX 9000
MAX 7000
MAX 3000
128 MB
128 MB
32 MB
32 MB
16 MB
16 MB
128 MB
128 MB
32 MB
32 MB
32 MB
32 MB
Device Family Minimum Additional Swap
Space on Hard Disk Drive
Minimum
Physical RAM
Windows-Based PC
Pentium-based PC or compatible computer
Operating system software:
Microsoft Windows 2000, or
Microsoft Windows NT version 4.00 or higher, or
Microsoft Windows 98, or
Microsoft Windows NT version 3.51 (supported, not
recommended)
SVGA graphics card and monitor compatible with
Microsoft Windows
CD-ROM drive
2- or 3-button mouse compatible with Microsoft Windows
Windows-Based PC (Continued)
Full-length 8-bit ISA slot for programming card
Parallel port
HTML browser (e.g., Netscape Navigator)
Sun SPARCstation
Sun SPARCstation with color or monochrome monitor
Sun Solaris version 2.6, 2.7, or 2.8
ISO 9660-compatible CD-ROM drive
HTML browser (e.g., Netscape Navigator)
HP 9000 Series 700/800 Workstation
HP 9000 Series 700/800 workstation with color or
monochrome monitor
Operating system software:
HP-UX version 11.0 with ACE dated November 1999 or
later, or
HP-UX version 10.2x with ACE dated December 1999 or
later (supported, not recommended)
HP-CDE
ISO 9660-compatible CD-ROM drive
HTML browser (e.g., Netscape Navigator)
Altera Programming Hardware
Alteras MasterBlaster and ByteBlasterMV configuration
cables, described in Table 7, are available for in-circuit
reconfiguration of ACEX 1K, APEX II, APEX 20K, Excalibur,
FLEX 10K, FLEX 6000, and Mercury products, and in-system
programming of MAX 7000, MAX 3000, and MAX 9000
devices. The configuration cables download device data directly
from the Altera design software user interface or directly from
a system prompt. When used with the Quartus II software,
the MasterBlaster and ByteBlasterMV configuration cables
also provide communication for SignalTap logic analysis.
The Altera Programming Unit (APU), used with the appropriate
programming adapters, provides the hardware and software
needed for programming all Altera devices. The APU uses the
same adapters as the earlier Altera Stand-Alone Programmer
(ASAP2). The ASAP2 programmer includes the LP6 ISA bus
card and master programming unit (MPU).
Use Table 7 to select the appropriate programming hardware
for your system. A complete list of adapters for the APU is
available on the Development Kits/Cables section of the
Altera web site.
ORDERING CODE HARDWARE INTERFACECABLE ADDITIONAL FEATURES
Table 7. Altera Programming Hardware
Supports SignalTap logic analysis capability.
Supports 3.3- and 5.0-V systems
Supports SignalTap logic analysis capability.
Supports 1.8-, 2.5-, 3.3-, and 5.0-V systems
Includes ISA bus card (LP6) plus PL-MPU
programmer
Uses the same adapters as the PL-ASAP2
PC parallel port
USB/RS-232
ISA bus card
USB
PL-BYTEBLASTERMV
PL-MASTERBLASTER
PL-ASAP2
PL-APU
ByteBlasterMV parallel download cable
MasterBlaster communication cable
Altera Stand-Alone Programmer
Altera Programming Unit
Copyright © 2001 Altera Corporation. Altera, ACCESS, ACEX, ACEX 1K, AMPP, APEX, APEX 20K, APEX 20KC, APEX 20KE, APEX II, ByteBlasterMV, E+MAX, Excalibur, FLEX, FLEX 10K, FLEX 6000, Jam,
LogicLock, MasterBlaster, MAX, MAX 3000, MAX 7000, MAX 9000, MAX+PLUS, MAX+PLUS II, MegaCore, Mercury, NativeLink, OpenCore, PowerFit, PowerGauge, Quartus, Quartus II, SignalTap,
SoftMode, and specific device and development tool part numbers are trademarks and/or service marks of Altera Corporation in the United States and other countries. Other brands or products are
trademarks of their respective holders, specifically: Exemplar Logic, LeonardoSpectrum, Mentor Graphics, ModelSim, and Model Technology are trademarks of Mentor Graphics Corporation. Synopsys
is a trademark of Synopsys, Inc. The specifications contained herein are subject to change without notice. All rights reserved. M-SG-TOOLS-17
Third-Party Solutions
ACCESS Program & Partners
Alteras Commitment to Cooperative
Engineering Solutions (ACCESSSM)
program includes EDA vendors who
have developed design entry, synthesis, verification, and/or
device programming products that support Alteras PLD
families. Through this program, Altera supports the industry-
standard EDA tools common to many of todays design
environments. Altera is continually evaluating and adding
new ACCESS partners to benefit customers.
Interfaces to Synopsys®, Cadence, Synplicity, Exemplar Logic®,
Innoveda, and Mentor Graphics® tools are provided on all
Quartus II and MAX+PLUS II CD-ROMs. In addition, the
NativeLink integration feature provides a seamless interface
between the Quartus II software and all ACCESS partner tools.
Contact Altera or visit the Altera web site for more information
about interfaces to other ACCESS partner tools.
Third-Party Programming Hardware
A number of third-party companies supply hardware to
program and configure Altera PLDs. Third-party programming
hardware suppliers include:
Data I/O
BP Microsystems
System General Company
For more information on the device support provided by these
companies, refer to the Development Kits/Cables section of
the Altera web site.
Third-Party Software for Excalibur
Embedded Processor Design
In addition to the Excalibur development tools included with
Altera software subscriptions, a number of other third-party
tools are available, including hardware/software co-verification
tools, C/C++ compilers, debuggers, and real-time operating
systems. Refer to the Excalibur section of the Altera web site
for the latest information on third-party tools that support
Excalibur embedded processor SOPC design.
Corporate Headquarters
Altera Corporation
101 Innovation Drive
San Jose, CA 95134
USA
Tel: (408) 544-7000
http://www.altera.com
European Headquarters
Altera U.K., Ltd.
Holmers Farm Way
High Wycombe
Buckinghamshire
HP12 4XF
United Kingdom
Tel: (44) 1 494 602 000
Altera International, Ltd.
2102 Tower 6
The Gateway, Harbour City
9 Canton Road
Tsimshatsui, Kowloon
Hong Kong
Tel: (852) 2495 7000
Altera Japan, Ltd.
Shinjuku i-Land Tower 32F
5-1, Nishi-Shinjuku, 6-Chome
Shinjuku-ku, Tokyo 163-1332
Japan
Tel: (81) 3 3340 9480
http://www.altera.com/japan
Altera Offices
ACCESSSM PROGRAM