1
LTC4440
4440f
High Speed, High Voltage
High Side Gate Driver
■
Wide Operating V
IN
Range: Up to 80V
■
Rugged Architecture Tolerant of 100V V
IN
Transients
■
Powerful 1.5Ω Driver Pull-Down
■
Powerful 2.4A Peak Current Driver Pull-Up
■
7ns Fall Time Driving 1000pF Load
■
10ns Rise Time Driving 1000pF Load
■
Drives Standard Threshold MOSFETs
■
TTL/CMOS Compatible Inputs with Hysteresis
■
Input Thresholds are Independent of Supply
■
Undervoltage Lockout
■
Low Profile (1mm) SOT-23 (ThinSOT)
TM
and
Thermally Enhanced 8-Pin MSOP Packages
■
Telecommunications Power Systems
■
Distributed Power Architectures
■
Server Power Supplies
■
High Density Power Modules
, LTC and LT are registered trademarks of Linear Technology Corporation.
The LTC
®
4440 is a high frequency high side N-channel
MOSFET gate driver that is designed to operate in applica-
tions with V
IN
voltages up to 80V. The LTC4440 can also
withstand and continue to function during 100V V
IN
tran-
sients. The powerful driver capability reduces switching
losses in MOSFETs with high gate capacitances. The
LTC4440’s pull-up has a peak output current of 2.4A and
its pull-down has an output impedance of 1.5Ω.
The LTC4440 features supply independent TTL/CMOS
compatible input thresholds with 350mV of hysteresis.
The input logic signal is internally level-shifted to the
bootstrapped supply, which may function at up to 115V
above ground.
The LTC4440 contains both high side and low side under-
voltage lockout circuits that disable the external MOSFET
when activated.
The LTC4440 is available in the low profile (1mm) SOT-23
and thermally enhanced 8-lead MSOP packages.
VCC
INP
GND
BOOST
TG
TS
LTC4440
VIN
36V TO 72V
100V PEAK TRANSIENT
(ABS MAX)
VCC
8V TO 15V
VCC
INP
GND
BOOST
TG
TS
LTC4440
VCC
LTC3722-1
••
4440 TA01
Synchronous Phase-Modulated Full-Bridge Converter
ThinSOT is a trademark of Linear Technology Corporation.
Protected by U.S. Patents, including 6677210.
INPUT
(INP)
2V/DIV
OUTPUT
(TG – TS)
5V/DIV
10ns/DIV 4440 F02
LTC4440 Driving a 1000pF
Capacitive Load
FEATURES
DESCRIPTIO
U
APPLICATIO S
U
TYPICAL APPLICATIO
U
2
LTC4440
4440f
Supply Voltage
V
CC
....................................................... –0.3V to 15V
BOOST – TS ......................................... –0.3V to 15V
INP Voltage............................................... –0.3V to 15V
BOOST Voltage (Continuous) ................... –0.3V to 95V
BOOST Voltage (100ms) ........................ –0.3V to 115V
TS Voltage (Continuous) ............................. –5V to 80V
TS Voltage (100ms)................................... –5V to 100V
ORDER PART
NUMBER
LTC4440EMS8E
T
JMAX
= 125°C, θ
JA
= 40°C/W (NOTE 4)
EXPOSED PAD IS GND (PIN 9)
MUST BE SOLDERED TO PCB
ABSOLUTE MAXIMUM RATINGS
W
WW
U
PACKAGE/ORDER INFORMATION
W
UU
(Note 1)
Peak Output Current < 1µs (TG) ............................... 4A
Driver Output TG (with Respect to TS) ..... –0.3V to 15V
Operating Ambient Temperature Range
(Note 2) .............................................. –40°C to 85°C
Junction Temperature (Note 3)............................ 125°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
MS8E
PART MARKING
LTF9
1
2
3
4
INP
GND
V
CC
GND
8
7
6
5
TS
TG
BOOST
NC
TOP VIEW
9
MS8E PACKAGE
8-LEAD PLASTIC MSOP
ORDER PART
NUMBER
LTC4440ES6
S6
PART MARKING
LTZY
V
CC
1
GND 2
INP 3
6 BOOST
5 TG
4 TS
TOP VIEW
S6 PACKAGE
6-LEAD PLASTIC SOT-23
T
JMAX
= 125°C, θ
JA
= 230°C/W
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = VBOOST = 12V, VTS = GND = 0V, unless otherwise noted.
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Main Supply (V
CC
)
I
VCC
DC Supply Current
Normal Operation INP = 0V 250 400 µA
UVLO V
CC
< UVLO Threshold (Falling) – 0.1V 25 80 µA
UVLO Undervoltage Lockout Threshold V
CC
Rising ●5.7 6.5 7.3 V
V
CC
Falling ●5.4 6.2 7.0 V
Hysteresis 300 mV
Bootstrapped Supply (BOOST – TS)
I
BOOST
DC Supply Current
Normal Operation INP = 0V 110 180 µA
UVLO V
BOOST
– V
TS
< UVLO
HS(FALLING)
– 0.1V, V
CC
= INP = 5V 86 170 µA
UVLO
HS
Undervoltage Lockout Threshold V
BOOST
– V
TS
Rising ●6.75 7.4 7.95 V
V
BOOST
– V
TS
Falling ●6.25 6.9 7.60 V
Hysteresis 500 mV
Input Signal (INP)
V
IH
High Input Threshold INP Ramping High ●1.3 1.6 2 V
V
IL
Low Input Threshold INP Ramping Low ●0.85 1.25 1.6 V
V
IH
– V
IL
Input Voltage Hysteresis 0.350 V
I
INP
Input Pin Bias Current ±0.01 ±2µA
3
LTC4440
4440f
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = VBOOST = 12V, VTS = GND = 0V, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LTC4440 is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3: T
J
is calculated from the ambient temperature T
A
and power
dissipation PD according to the following formula:
T
J
= T
A
+ (PD • θ
JA
°C/W)
Note 4: Failure to solder the exposed back side of the MS8E package to
the PC board will result in a thermal resistance much higher than 40°C/W.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Output Gate Driver (TG)
V
OH
High Output Voltage I
TG
= –10mA, V
OH
= V
BOOST
– V
TG
0.7 V
V
OL
Low Output Voltage I
TG
= 100mA ●150 220 mV
I
PU
Peak Pull-Up Current ●1.7 2.4 A
R
DS
Output Pull-Down Resistance ●1.5 2.2 Ω
Switching Timing
t
r
Output Rise Time 10% – 90%, C
L
= 1nF 10 ns
10% – 90%, C
L
= 10nF 100 ns
t
f
Output Fall Time 10% – 90%, C
L
= 1nF 7 ns
10% – 90%, C
L
= 10nF 70 ns
t
PLH
Output Low-High Propagation Delay ●30 65 ns
t
PHL
Output High-Low Propagation Delay ●28 65 ns
TYPICAL PERFOR A CE CHARACTERISTICS
UW
VCC Supply Quiescent Current
vs Voltage
VCC SUPPLY VOLTAGE (V)
0
0
QUIESCENT CURRENT (µA)
50
100
150
200
300
510
4440 G01
15
250
INP = VCC
INP = 0V
TA = 25°C
BOOST – TS SUPPLY VOLTAGE (V)
0
0
QUIESCENT CURRENT (µA)
100
150
200
250
300
350
510
4440 G02
400
450
INP = 0V
500
50
15
INP = VCC
TA = 25°C
BOOST – TS SUPPLY VOLTAGE (V)
8
OUTPUT (TG – TS) VOLTAGE (mV)
150
155
160
165
170
11 13
4440 G03
145
140
910 12 14 15
I
TG
= 100mA
T
A
= 25°C
BOOST – TS Supply Quiescent
Current vs Voltage
Output Low Voltage (VOL)
vs Supply Voltage
4
LTC4440
4440f
Output High Voltage (VOH)
vs Supply Voltage
BOOST – TS SUPPLY VOLTAGE (V)
8
OUTPUT VOLTAGE (TG – TS) (V)
14
11
4440 G04
11
9
910 12
8
7
15
13
12
10
13 14 15
I
TG
= –100mA
I
TG
= –1mA
I
TG
= –10mA
T
A
= 25°C
Input Thresholds (INP)
vs Supply Voltage
V
CC
SUPPLY VOLTAGE (V)
7
0.8
INPUT THRESHOLD (V)
1.0
1.2
1.4
1.6
1.8
2.0
9111315
4440 G05
V
IL
(INPUT LOW THRESHOLD)
V
IH
(INPUT HIGH THRESHOLD)
T
A
= 25°C
VCC Supply Current
at TTL Input Levels
2MHz Operation
V
CC
SUPPLY VOLTAGE (V)
8
V
CC
SUPPLY QUIESCENT CURRENT (µA)
300
320
340
4440 G06
280
260
200
10 12 14
240
220
380
INP = 2V
INP = 0.8V
360
T
A
= 25°C
INPUT
(INP)
5V/DIV
OUTPUT
(TG)
5V/DIV
V
CC
= 12V 250ns/DIV 4440 G07
TYPICAL PERFOR A CE CHARACTERISTICS
UW
VCC Supply Current (VCC = 12V)
vs Temperature
TEMPERATURE (°C)
–60
CURRENT (µA)
200
250
300
12090
4440 G08
150
100
0–30 30060
50
INP = 0V
INP = 12V
VCC Undervoltage Lockout
Thresholds vs Temperature
TEMPERATURE (°C)
–60
V
CC
SUPPLY VOLTAGE (V)
6.45
6.40
6.55
6.50
6.35
6.30
6.25
6.20
6.15 12090
4440 G09
–30 30060
FALLING THRESHOLD
RISING THRESHOLD
Boost Supply Current
vs Temperature
Boost Supply (BOOST – TS)
Undervoltage Lockout Thresholds
vs Temperature Input Threshold vs Temperature
TEMPERATURE (°C)
–60
CURRENT (µA)
500
400
450
350
300
250
200
150
100
50
12090
4440 G10
0–30 30060
INP = 0V
INP = 12V
TEMPERATURE (°C)
–60
BOOST – TS SUPPLY VOLTAGE (V)
7.6
7.5
7.4
7.3
7.2
7.1
7.0
6.9
6.8
12090
4440 G11
6.7 –30 30060
FALLING THRESHOLD
RISING THRESHOLD
TEMPERATURE (°C)
–60
INPUT THRESHOLD (V)
1.6
1.8
2.0
12090
4440 G12
1.4
1.2
0.8 –30 30060
1.0
V
IH
(V
CC
= 15V)
V
IL
(V
CC
= 15V)
V
IH
(V
CC
= 8V)
V
IL
(V
CC
= 8V)
V
IH
(V
CC
= 12V)
V
IL
(V
CC
= 12V)
5
LTC4440
4440f
UU
U
PI FU CTIO S
SOT-23 Package
V
CC
(Pin 1): Chip Supply. This pin powers the internal low
side circuitry. A low ESR ceramic bypass capacitor should
be tied between this pin and the GND pin (Pin 2).
GND (Pin 2): Chip Ground.
INP (Pin 3): Input Signal. TTL/CMOS compatible input
referenced to GND (Pin 2).
TS (Pin 4): Top (High Side) Source Connection.
Input Threshold Hysteresis
vs Temperature
Peak Driver (TG) Pull-Up Current
vs Temperature
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Output Driver Pull-Down
Resistance vs Temperature
Propagation Delay vs Temperature
(VCC = BOOST = 12V)
TEMPERATURE (°C)
–60
HYSTERESIS (mV)
500
460
480
440
420
400
380
360
340
320
12090
4440 G13
300 –30 30060
V
IH
-V
IL
(V
CC
= 12V)
V
IH
-V
IL
(V
CC
= 15V)
V
IH
-V
IL
(V
CC
= 8V)
TEMPERATURE (°C)
–60
PEAK CURRENT (A)
3.0
2.8
2.9
2.7
2.6
2.5
2.4
2.3
2.2
2.1
12090
4440 G14
2.0 –30 30060
BOOST – TS = 12V
BOOST – TS = 15V
TG (Pin 5): High Current Gate Driver Output (Top Gate).
This pin swings between TS and BOOST.
BOOST (Pin 6): High Side Bootstrapped Supply. An exter-
nal capacitor should be tied between this pin and TS
(Pin 4). Normally, a bootstrap diode is connected between
V
CC
(Pin 1) and this pin. Voltage swing at this pin is from
V
CC
– V
D
to V
IN
+ V
CC
– V
D
, where V
D
is the forward voltage
drop of the bootstrap diode.
TEMPERATURE (°C)
–60
R
DS
(Ω)
2.0
2.5
3.0
12090
4440 G15
1.5
1.0
0–30 30060
0.5
BOOST – TS = 15V
BOOST – TS = 8V
BOOST – TS = 12V
TEMPERATURE (°C)
–60
PROPAGATION DELAY (ns)
45
40
35
30
25
20
15
10
5
12090
4440 G16
0–30 30060
t
PLH
t
PHL
6
LTC4440
4440f
TI I G DIAGRA
UWW
V
IH
90%
10%
t
r
INPUT (INP)
OUTPUT (TG)
INPUT RISE/FALL TIME <10ns
V
IL
t
f
t
PLH
4440 TD
t
PHL
BLOCK DIAGRA
W
BOOST
TS
GND
TG
BOOST
4440 BD
V
IN
UP TO 80V,
TRANSIENT
UP TO 100V
TS
HIGH SIDE
UNDERVOLTAGE
LOCKOUT
UNDERVOLTAGE
LOCKOUT
LEVEL SHIFTER
V
CC
8V TO 15V
GND
INP
Exposed Pad MS8E Package
INP (Pin 1): Input Signal. TTL/CMOS compatible input
referenced to GND (Pin 2).
GND (Pins 2, 4): Chip Ground.
V
CC
(Pin 3): Chip Supply. This pin powers the internal low
side circuitry. A low ESR ceramic bypass capacitor should
be tied between this pin and the GND pin (Pin 2).
NC (Pin 5): No Connect. No connection required. For
convenience, this pin may be tied to Pin 6 (BOOST) on the
application board.
BOOST (Pin 6): High Side Bootstrapped Supply. An exter-
nal capacitor should be tied between this pin and TS
(Pin 8). Normally, a bootstrap diode is connected between
V
CC
(Pin 3) and this pin. Voltage swing at this pin is from
V
CC
– V
D
to V
IN
+ V
CC
– V
D
, where V
D
is the forward voltage
drop of the bootstrap diode.
TG (Pin 7): High Current Gate Driver Output (Top Gate).
This pin swings between TS and BOOST.
TS (Pin 8): Top (High Side) Source Connection.
Exposed Pad (Pin 9): Ground. Must be electrically con-
nected to Pins 2 and 4 and soldered to PCB ground for
optimum thermal performance.
UU
U
PI FU CTIO S
7
LTC4440
4440f
APPLICATIO S I FOR ATIO
WUUU
BOOST VIN
UP TO 100V
TS V–
TG
CGD
POWER
MOSFET
LOAD
INDUCTOR
CGS
4440 F03
LTC4440
Q1
N1
Figure 3. Capacitance Seen by TG During Switching
Overview
The LTC4440 receives a ground-referenced, low voltage
digital input signal to drive a high side N-channel power
MOSFET whose drain can float up to 100V above ground,
eliminating the need for a transformer between the low
voltage control signal and the high side gate driver. The
LTC4440 normally operates in applications with input
supply voltages (V
IN
) up to 80V, but is able to withstand
and continue to function during 100V, 100ms transients
on the input supply.
The powerful output driver of the LTC4440 reduces the
switching losses of the power MOSFET, which increase
with transition time. The LTC4440 is capable of driving a
1nF load with 10ns rise and 7ns fall times using a
bootstrapped supply voltage V
BOOST–TS
of 12V.
Input Stage
The LTC4440 employs TTL/CMOS compatible input thresh-
olds that allow a low voltage digital signal to drive standard
power MOSFETs. The LTC4440 contains an internal volt-
age regulator that biases the input buffer, allowing the input
thresholds (V
IH
= 1.6V, V
IL
= 1.25V) to be independent of
variations in V
CC
. The 350mV hysteresis between V
IH
and
V
IL
eliminates false triggering due to noise during switch-
ing transitions. However, care should be taken to keep this
pin from any noise pickup, especially in high frequency, high
voltage applications. The LTC4440 input buffer has a high
input impedance and draws negligible input current, sim-
plifying the drive circuitry required for the input.
Output Stage
A simplified version of the LTC4440’s output stage is
shown in Figure 3 . The pull-down device is an N-channel
MOSFET (N1) and the pull-up device is an NPN bipolar
junction transistor (Q1). The output swings from the lower
rail (TS) to within an NPN V
BE
(~0.7V) of the positive rail
(BOOST). This large voltage swing is important in driving
external power MOSFETs, whose R
DS(ON)
is inversely
proportional to its gate overdrive voltage (V
GS
– V
TH
).
The LTC4440’s peak pull-up (Q1) current is 2.4A while the
pull-down (N1) resistance is 1.5Ω. The low impedance of
N1 is required to discharge the power MOSFET’s gate
capacitance during high-to-low signal transitions. When
the power MOSFET’s gate is pulled low (gate shorted to
source through N1) by the LTC4440, its source (TS) is
pulled low by its load (e.g., an inductor or resistor). The
slew rate of the source/gate voltage causes current to flow
back to the MOSFET’s gate through the gate-to-drain
capacitance (C
GD
). If the MOSFET driver does not have
sufficient sink current capability (low output impedance),
the current through the power MOSFET’s C
GD
can mo-
mentarily pull the gate high, turning the MOSFET back on.
A similar scenario exists when the LTC4440 is used to
drive a low side MOSFET. When the low side power
MOSFET’s gate is pulled low by the LTC4440, its drain
voltage is pulled high by its load (e.g., inductor or resis-
tor). The slew rate of the drain voltage causes current to
flow back to the MOSFET’s gate through its gate-to-drain
capacitance. If the MOSFET driver does not have sufficient
sink current capability (low output impedance), the cur-
rent through the power MOSFET’s C
GD
can momentarily
pull the gate high, turning the MOSFET back on.
Rise/Fall Time
Since the power MOSFET generally accounts for the
majority of the power loss in a converter, it is important to
quickly turn it on or off, thereby minimizing the transition
time in its linear region. The LTC4440 can drive a 1nF load
with a 10ns rise time and 7ns fall time.
The LTC4440’s rise and fall times are determined by the
peak current capabilities of Q1 and N1. The predriver that
drives Q1 and N1 uses a nonoverlapping transition scheme
to minimize cross-conduction currents. N1 is fully turned
off before Q1 is turned on and vice versa.
8
LTC4440
4440f
Power Dissipation
To ensure proper operation and long-term reliability, the
LTC4440 must not operate beyond its maximum tempera-
ture rating. Package junction temperature can be calcu-
lated by:
T
J
= T
A
+ PD (θ
JA
)
where:
T
J
= Junction Temperature
T
A
= Ambient Temperature
PD = Power Dissipation
θ
JA
= Junction-to-Ambient Thermal Resistance
Power dissipation consists of standby and switching
power losses:
PD = P
STDBY
+ P
AC
where:
P
STDBY
= Standby Power Losses
P
AC
= AC Switching Losses
The LTC4440 consumes very little current during standby.
The DC power loss at V
CC
= 12V and V
BOOST–TS
= 12V is
only (250µA + 110µA)(12V) = 4.32mW.
AC switching losses are made up of the output capacitive
load losses and the transition state losses. The capacitive
load losses are primarily due to the large AC currents
needed to charge and discharge the load capacitance
during switching. Load losses for the output driver driving
a pure capacitive load C
OUT
would be:
Load Capacitive Power = (C
OUT
)(f)(V
BOOST–TS
)
2
The power MOSFET’s gate capacitance seen by the driver
output varies with its V
GS
voltage level during switching.
A power MOSFET’s capacitive load power dissipation can
be calculated using its gate charge, Q
G
. The Q
G
value
corresponding to the MOSFET’s V
GS
value (V
CC
in this
case) can be readily obtained from the manufacturer’s Q
G
vs V
GS
curves:
Load Capacitive Power (MOS) = (V
BOOST–TS
)(Q
G
)(f)
Transition state power losses are due to both AC currents
required to charge and discharge the driver’s internal
nodal capacitances and cross-conduction currents in the
internal gates.
Undervoltage Lockout (UVLO)
The LTC4440 contains both low side and high side under-
voltage lockout detectors that monitor V
CC
and the
bootstrapped supply V
BOOST–TS
. When V
CC
falls below
6.2V, the internal buffer is disabled and the output pin OUT
is pulled down to TS. When V
BOOST – TS
falls below 6.9V,
OUT is pulled down to TS. When both supplies are under-
voltage, OUT is pulled low to TS and the chip enters a low
current mode, drawing approximately 25µA from V
CC
and
86µA from BOOST.
Bypassing and Grounding
The LTC4440 requires proper bypassing on the V
CC
and
V
BOOST–TS
supplies due to its high speed switching (nano-
seconds) and large AC currents (Amperes). Careless
component placement and PCB trace routing may cause
excessive ringing and under/overshoot.
To obtain the optimum performance from the LTC4440:
A. Mount the bypass capacitors as close as possible
between the V
CC
and GND pins and the BOOST and TS
pins. The leads should be shortened as much as pos-
sible to reduce lead inductance.
B. Use a low inductance, low impedance ground plane to
reduce any ground drop and stray capacitance. Remem-
ber that the LTC4440 switches >2A peak currents and
any significant ground drop will degrade signal integrity.
C. Plan the power/ground routing carefully. Know where
the large load switching current is coming from and
going to. Maintain separate ground return paths for the
input pin and the output power stage.
D. Keep the copper trace between the driver output pin and
the load short and wide.
E. When using the MS8E package, be sure to solder the
exposed pad on the back side of the LTC4440 package
to the board. Correctly soldered to a 2500mm
2
double-
sided 1oz copper board, the LTC4440 has a thermal
resistance of approximately 40°C/W. Failure to make
good thermal contact between the exposed back side
and the copper board will result in thermal resistances
far greater than 40°C/W.
APPLICATIO S I FOR ATIO
WUUU
9
LTC4440
4440f
LTC3722/LTC4440 420W 36V-72V
IN
to 12V/35A Isolated Full-Bridge Supply
TYPICAL APPLICATIO S
U
18
10
911
12V
V
IN
12
LTC3722EGN-1
PDLY OUTF OUTE
COMPSSPGNDGND
CS
V
IN
SBUS
UVLO
1µF
ADLY
330pF
MMBT3904
2.2nF
100k D12
5.1V
T3
1(1.5mH):0.5
T1
5(105µH):1:1
T2
5:5(105µH):1:1
2.49k
9.53k
10k
2.7k
470Ω
1/4W
L4
1mH
C3
68µF
20V
V
H
•
•
16
15
8
19
5
4
150Ω
0.02Ω
1.5W
30.1k
220pF
100Ω
330Ω
1.10k 909Ω
4.87k
1/4W
4.87k
1/4W
51Ω
2W
220pF
182k
20k
1/4W
220pF
4.99k
20k
180pF
68nF
220pF0.47µF
150k
SYNC PV
CC
CSE
+
LTC3901EGN
CSE
–
8
65
1
41013 7 1µF
1µF
4440 TA03
–V
OUT
V
OUT
–V
OUT
D10
10V
V
OUT
ME ME2
GND PGND GND2 PGND2 TIMER
V
CC
330pF
23
1.10k 909Ω
39.2k 100Ω1k
CSF
+
–V
OUT
V
OUT
V
OUT
–V
OUT
V
OUT
12V/35A
–V
OUT
CSF
–
11 12
MF MF2
14 15 16
22nF
Si7852DP
×4
Si7852DP
×4
Si7852DP
×2
L1
1.3µH
114
2
12V D7
D8
4
2
1
6
•
••••
••
•
10
8
7
+
1
0.22µF
Si7852DP
×2
3
6
7
824
A
D2
LTC4440EMS8E
BOOSTINP
TG
TSGNDGND
V
CC
12V
1
0.22µF
Si7852DP
×2
3
6
7
8
12VD
24
C
D3
D4 D5
51Ω
2W
0.47µF
100V
LTC4440EMS8E
BOOSTINP
TG
TSGNDGND
V
CC
12V
1µF
100V
×4
V
IN
V
IN
–V
IN
36V TO 72V 1µF
100V
17
D
OUTD
19
10Ω10Ω
C
OUTC
20
B
OUTB
21
A
OUTA
C1, C2
180µF
16V
×2
+
1µF
0.47µF, 100V TDK C3216X7R2A474M
1µF, 100V TDK C4532X7R2A105M
C1,C2: SANYO 16SP180M
C3: AVX TPSE686M020R0150
C4: MURATA DE2E3KH222MB3B
D1, D4-D6: MURS120T3
D2, D3, D7, D8: BAS21
D9: MMBZ5226B
D10: MMBZ5240B
D11: BAT54
D12: MMBZ231B
L1: SUMIDA CDEP105-1R3MC-50
L2: PULSE PA0651
L3: PA1294.910
L4: COILCRAFT DO1608C-105
Q1, Q2: ZETEX FMMT619
Q3, Q4: ZETEX FMMT718
T1, T2: PULSE PA0526
T3: PULSE PA0785
6
3
422236
33k
57
D11
8.25k
I
SNS
5V
REF
I
SNS
0.1µF
58
1
21
MOC207
C4
2.2nF
250V
0.047µF3
65
8
GND-F
V
+
GND-S
COLL REF
LT1431CS8
1.1k
22Ω
200k
750Ω
100Ω
D9 3.3V
0.02Ω
1.5W
V
H
D1
D6
13k
1/2W
0.47µF
100V
820pF
200V
L3
0.85µH
15Ω
1W
0.47µF
100V
Si7852DP
×2
12VB
Q1
Q3
Q2
Q4
11
10
8
7
MMBT3904
FBSPRG R
LEB
10k
13
SYNC
5.1k
1
NC
8
DPRG
2
V
REF
5V
REF
14
C
T
24
L2
150nH
•
10
LTC4440
4440f
LTC3723-1 240W 42-56V
IN
to 12V/20A Isolated 1/4Brick (2.3" × 1.45")
TYPICAL APPLICATIO S
U
5
46
AB
12V
VIN
15
LTC3723EGN-1
DRVB SDRB SDRA
COMP
CS
VCC
UVLO
9
150k
1
0.47µF
1µF
DRVA
DPRG VREF
SPRGGND SSFB CT
330pF
22nF
100k D8
10V
68nF
270pF
T2
1(1.5mH):0.5
T1
4T:6T(65µHMIN):6T:2T:2T
243k
2.49k
9.53k
10k
750Ω
1k
100Ω
1/4W
813
3
Si7370DP
×2
L4
1mH
C3
68µF
20V
VFD2
•
•
3
2
8
19
5
4
16
10k
33k
200Ω
1/4W
R1
0.03Ω
1.5W
66.5k
RLEB
12
714
220pF
22nF
100Ω
665Ω
1k 866Ω
6.19k
1/4W
1.5nF
464k
30k
1/4W
SYNC PVCC
CSF+
VF
LTC3901EGN
CSF–
8
11 12
1
41013 7
22nF
1µF
4.7µF
4440 TA05
–VOUT
VOUT
–VOUT
D7
10V
VOUT
MF MF2
GND PGND GND2 PGND2 TIMER
VCC
470pF
14 15
1k 866Ω
42.2k 1k
100Ω
6.19k
1/4W
CSE+
VE–VOUT
VOUT
VF
VOUT
12V/20A
–VOUT
CSE–
65
ME ME2
23 16
Si7370DP
×2
Si7852DPSi7852DP
L5
0.56µH
112
4
12V D5
D6
3
5
1
6
•
••
•
•
9
7
VE
+
0.1µF
Si7852DP
1
6
5
4
B
2
A
D3
LTC4440ES6
BOOSTINP
TG
TSGND
VCC
12V
3
0.1µF
Si7852DP
1
6
5
42
B
D4
LTC4440ES6
BOOSTINP
TG
TSGND
VCC
12V
1µF
100V
×3
VIN
VIN
–VIN
42V TO 56V 1µF
100V
C1, C2
47µF
16V
×2
+
1µF
1µF
100V
1k
1/4W
1µF, 100V TDK C3225X7R2A105M
C1,C2: SANYO 16TQC47M
C3: AVX TPSE686M020R0150
C4: MURATA GHM3045X7R222K-GC
D2: DIODES INC. ES1B
D3-D6: BAS21
D7, D8: MMBZ5240B
L4: COILCRAFT DO1608C-105
L5: COILCRAFT DO1813P-561HC
L6: PULSE PA1294.132 OR
PANASONIC ETQP1H1R0BFA
R1, R2: IRC LRC2512-R03G
T1: PULSE PA0805.004
T2: PULSE PA0785
6
10
ISNS
ISNS
0.1µF
11
58
1
21
MOC207
C4
2.2nF
250V
0.1µF3
65
8
GND-F
V+
GND-S
COLL REF
LT1431CS8
A
1.5k
22Ω
4.7Ω
4.7Ω
R2
0.03Ω
1.5W
VE
470pF
100V
L6
1.25µH
10Ω
1W
6
93
EFFICIENCY (%)
94
95
96
97
81012
LOAD CURRENT (A)
14 16 18 20
42VIN
48VIN
56VIN
MMBT3904
•
11
LTC4440
4440f
PACKAGE DESCRIPTION
U
MS8E Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1662)
S6 Package
6-Lead Plastic SOT-23
(Reference LTC DWG # 05-08-1636)
MSOP (MS8E) 0603
0.53 ± 0.152
(.021 ± .006)
SEATING
PLANE
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.18
(.007)
0.254
(.010)
1.10
(.043)
MAX
0.22 – 0.38
(.009 – .015)
TYP
0.127 ± 0.076
(.005 ± .003)
0.86
(.034)
REF
0.65
(.0256)
BSC
0° – 6° TYP
DETAIL “A”
DETAIL “A”
GAUGE
PLANE 12
34
4.90 ± 0.152
(.193 ± .006)
8
8
1
BOTTOM VIEW OF
EXPOSED PAD OPTION
765
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
0.52
(.0205)
REF 1.83 ± 0.102
(.072 ± .004)
2.06 ± 0.102
(.081 ± .004)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
2.083 ± 0.102
(.082 ± .004)
2.794 ± 0.102
(.110 ± .004)
0.889 ± 0.127
(.035 ± .005)
RECOMMENDED SOLDER PAD LAYOUT
0.42 ± 0.038
(.0165 ± .0015)
TYP
0.65
(.0256)
BSC
1.50 – 1.75
(NOTE 4)
2.80 BSC
0.30 – 0.45
6 PLCS (NOTE 3)
DATUM ‘A’
0.09 – 0.20
(NOTE 3)
S6 TSOT-23 0302
2.90 BSC
(NOTE 4)
0.95 BSC
1.90 BSC
0.80 – 0.90
1.00 MAX 0.01 – 0.10
0.20 BSC
0.30 – 0.50 REF
PIN ONE ID
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
3.85 MAX
0.62
MAX
0.95
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
12
LTC4440
4440f
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2003
LT/TP 1004 1K • PRINTED IN USA
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IN
≤ 28V
TYPICAL APPLICATIO
U
LTC3723-2/LTC4440/LTC3901 240W 42V-56VIN to Unregulated 12V Half-Bridge Converter
5
46
A
B
11V12VV
IN
MMBT3904
15
LTC3723EGN-2
DRVB SDRB
SDRA
COMP
V
CC
UVLO
12
62k
330pF
12V
MMBZ5242B
150pF
1
0.47µF
1µF
DRVA
DPRG V
REF
RAMP SPRG GND SSCS FBC
T
470pF 0.47µF4.7k
0.22µF
2N7002
BCS
+
T3
1(1.5mH):0.5
T1
5:4:4:2:2
1µF8913
1k
22Ω0.1µF
C1
2.2nF
250V
1µF
100V
1µF
100V
1µF
100V
1µF
100V
0.22µF
Si7370DP
×2
Si7852DP
×2
1
6
5
42
3
A
Si7370DP
×2
1500pF
100V
L2 0.22µH
L3
1mH
C3
68µF
V
F
•
•
11
3
2
8
19
5
4
16
10k
120Ω
30.1k
710 14
7.5Ω
D4 D5
7.5Ω
220pF
100Ω
10k 3k
4.7k
1/4W
100pF
215k
15k
1/4W SYNC PV
CC
CSF
+
V
F
LTC3901EGN
CSF
–
8
11 12
1
41013 7 1µF
1µF
4440 TA04
–V
OUT
10V
MMBZ5240B
1k
V
OUT
MF MF2
GND PGND GND2 PGND2 TIMER
V
CC
330pF
14 15
10k 3k
33.2k 100Ω
4.7k
1/4W
CSE
+
V
E
20Ω 1W
–V
OUT
V
OUT
V
OUT
–V
OUT
CSE
–
65
ME ME2
23 16
MMBT3904
Si7852DP
×2
L1
0.56µH
72
4
CS
+
T2
70(980µH):1
8
7
1
3
12V D2
D1
D3
3
5
1
6
•
••
•
•
•
•
9
11
V
E
+
LTC4440ES6
BOOSTINP
TG
TSGND
V
CC
11V
1µF
100V
V
IN
V
IN
–V
IN
48V
IN
1µF
100V
C2
180µF
16V
+
1µF
1µF, 100V TDK C4532X7R2A105M
C1: MURATA DE2E3KH222MB3B
C2: SANYO 16SP180M
C3: AVX TPSE686M020R0150
D1-D3: BAS21
D4, D5: MMBD914
L1: COILCRAFT DO1813P-561HC
L2: SUMIDA CDEP105-0R2NC-50
L3: COILCRAFT DO1608C-105
T1: PULSE PA0801.005
T2: PULSE P8207
T3: PULSE PA0785