2010 - 2015 Microchip Technology Inc. DS00001692C-page 1
General Description
The Microchip USB251xB/xBi hub is a family of low-
power, configurable, MTT (multi transaction transl ator)
hub controller IC products for embedded USB solu-
tions. The x in the part number indicates the number of
downstream ports available, while the B indicate s bat-
tery charging support. The Microchip hub supports low-
speed, full-speed, and hi-speed (if operating as a hi-
speed hub) down stream devices on all of the enabled
downstream ports.
Highlights
• High performance, low-power, small footprint hub
controller IC with 2, 3, or 4 downstream ports
• Fully compliant with the USB 2.0 Specification [1]
• Enhanced OEM configuration options available
through either a single serial I2C EEPROM, or
SMBus slave port
•MultiTRAKTM
- High-performance multiple transaction trans-
lator which provides one transaction transla-
tor per port
•PortMap
- Flexi ble port mapping and disable seque nc-
ing
•PortSwap
- Programmable USB differential-pair pin loca-
tions ease PCB design by ali g ni n g USB sig-
nal lines directly to connectors
•PHYBoost
- Programmable USB signal drive strength for
recovering signal integrity using 4-level driv-
ing strength resolution
Features
• USB251xB/xBi products are fully footprint com-
patible with USB251x/xi/xA/xAi products as direct
drop-in replacements
— Cost savings include using the same PCB
components and application of USB-IF Compliance
by Similarity
• Full power management with individual or ganged
power control of each downstream port
• Fully integrated USB termination and pull-up/pull-
down resistors
• Supports a single external 3.3 V supply source;
internal regulators provide 1.2 V internal core volt-
age
• Onboard 24 MHz crystal driver or external
24 MHz clock input
• Customizable vendor ID, product ID, and device
ID
• 4 kilovolts of HBM JESD22-A1 14F ESD protection
(powered and unpower ed)
• Supports self- or bus-powered operation
• Supports the USB Battery Charging specification
Rev. 1.1 for Charging Down stream Ports (CDP)
• The USB251xB/xBi offers the following packages:
- 36-pin SQFN (6x6 mm) (Preferred)
- 36-pin QFN (6x6 mm) (Legacy)
• USB251xBi products support the industrial tem-
perature range of -40ºC to +85ºC
• USB251xB products support the extended com-
mercial temperature range of 0ºC to +85ºC
Applications
• LCD monitors and TVs
• Multi-function USB peripherals
• PC motherboards
• Set-top boxes, DVD players, DVR/PVR
• Printers and scanners
• PC media drive bay
• Portable hub boxes
• Mobile PC docking
• Embedded systems
USB251xB/xBi
USB 2.0 Hi-Speed Hub Controller
USB251xB/xBi
DS00001692C-page 2 2010 - 2015 Microchip Technology Inc.
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2010 - 2015 Microchip Technology Inc. DS00001692C-page 3
USB251xB/xBi
Table of Contents
1.0 Introduction ..................................................................................................................................................................................... 4
2.0 Block Diagram ................................................................................................................................................................................. 6
3.0 Pin Information ................................................................................................................................................................................ 7
4.0 Battery Charging Support ............................................................................................................................................................. 17
5.0 Initial Interface/Configuration Options ........................................................................................................................................... 19
6.0 DC Parameters ............................................................................................................................................................................. 39
7.0 AC Specifications .......................................................................................................................................................................... 44
8.0 Package Marking Information ....................................................................................................................................................... 46
9.0 Package Information ..................................................................................................................................................................... 48
Appendix A: Acronyms .......................... ............................................................................................................................. ................. 50
Appendix B: References ..................................................................................................................................................................... 51
Appendix C: Data Sheet Revision History .......................................................................................................................................... 52
The Microchip Web Site ...................................................................................................................................................................... 54
Customer Change Notification Service ............................................................................................................................................... 54
Customer Support ............................................................................................................................................................................... 54
Product Identification System ............................................................................................................................................................. 55
USB251xB/xBi
DS00001692C-page 4 2010 - 2015 Microchip Technology Inc.
1.0 INTRODUCTION
The Microchip USB251xB/xBi hub family is a g roup of low- power, configurable, MTT (multi transaction transla tor) hub
controller ICs. The hub provides downstream ports for embedded USB solutions and is fully compliant with the USB 2.0
Specification [1]. Each of the hub controllers can attach to an upstream port as a full-spe ed or full-/hi-speed hub. The
hub can support low-speed, full-speed, and hi-speed downstream devices when operating as a hi-speed hub.
All required resistors on the USB ports are integrated into the hub. This includes all series termination resistors and all
required pull-down and pul l-up resistors on D+ and D- pins. The over-curren t sense inputs for the downstream facing
ports have internal pull-up resistors.
The USB251xB/xBi hub family includes programmable features, such as:
•MultiTRAKTM Technology: implements a dedicated T ransaction Translator (TT) for each port. Dedicated TTs help
maintain consistent full-speed data throughput regardless of the number of active downstream connections.
•PortMap: provides flexible port mapping and disable sequences. The downstream ports of a USB251xB/xBi hub
can be reordered or disabled in any sequence to support multiple platform designs with minimum effort. For any
port that is disabled, the USB251xB/xBi hub controller automa tically reorders the remaining ports to match the
USB host controller’s port numbering scheme.
•PortSwap: allows direct alignment of USB signals (D+/D-) to connectors to avoid uneven trace length or crossing
of the USB differential signals on the PCB.
•PHYBoost: enables 4 programmable levels of USB signal dr ive strength in downstream port transceivers. PHY-
Boost will also attempt to restore USB signal integrity.
1.1 Configurable Features
The USB251xB/xBi hub controller provides a default configuration that may be sufficient for most applications. Strapping
option pins (see Section 3.3.1 on page 14) provide additional features to enhance th e default configuration. When the
hub is initialized in the default configuration, the following features may be configured usin g the strapping options:
• Downstream non-removable ports, where the hub will automatically report as a compound device
• Downstream disable d ports
• Enabling of battery charging option on individual ports
• The USB251xB/xBi hub controllers can alternatively be configured by an external I2C EEPROM or a microcontrol-
ler as an SMBus slave device. When the hub is configured by an I2C EEPROM or over SMBus, the following con-
figurable features are provided:
• Support for compound devices on a port-by-po rt basis
• Selectable over-current sensing and port power control on an individual or ganged basis to match the circuit board
component selection
• Customizable vendor ID, product ID, and device ID
• Configurable USB signal drive strength
• Configurable USB differential pair pin location
• Configurable delay time for filtering the over-current sense in puts
• Configurable downstream port power-on time reported to the host
• Indication of the maximum current that the hub consumes from the USB upstream port
• Indication of the maximum current required for the hub controller
• Custom string descriptors (up to 31 characters):
- Product
- Manufacturer
- Serial number
• Battery charging USB251xB/xBi products are fully footprint compatible with USB251x/xi/xA/xAi products:
-Pin-compatible
- Direct drop-in replacement
- Use the same PCB components
- USB-IF Compliance by Similarity for ease of use and a complete cost reduction solution
- Product IDs, device IDs, and other register defaults may differ. See Section 5.1 on page 19 for details.
2010 - 2015 Microchip Technology Inc. DS00001692C-page 5
USB251xB/xBi
Conventions
Within this manual, the follow ing abbreviations and symbols are used to improve readability.
TABLE 1-1: SUMMARY OF COMPATIBILITIES BETWEEN USB251XB/XBI AND
USB251X/XI/XA/XAI PRODUCTS
Part
Number Drop-in Replacement
USB2512 USB2512B
USB2512i USB2512Bi
USB2512A USB2512B
USB2512Ai USB2512Bi
USB2513 USB2513B
USB2513i USB2513Bi
USB2514 USB2514B
USB2514i USB2514Bi
Example Description
BIT Name of a single bit within a field
FIELD.BIT Name of a single bit (BIT) in FIELD
x…y Range from x to y, inclusive
BITS[m:n] Groups of bits from m to n, inclusive
PIN Pin Name
zzzzb Binary number (value zzzz)
0xzzz Hexadecimal number (value zzz)
zzh Hexadecimal number (value zz)
rsvd Reserved memory location. Must write 0, read value indeterminate
code Instruction code , or API fu nction or parameter
Section Name Section or Document name
x Don’t care
<Parameter> <> indicate a Parameter is optional or is only used under some conditions
{,Parameter} Braces indicate Parameter(s) that repeat one or more times
[Parameter] Brackets indicate a nested Parameter. This Parameter is not real and actually
decodes into one or more real parameters.
USB251xB/xBi
DS00001692C-page 6 2010 - 2015 Microchip Technology Inc.
2.0 BLOCK DIAGRAM
FIGURE 2-1: USB251XB/XBI HUB FAMILY BLOCK DIAGRAM
3.3 V
Upstream
PHY
Repeater Controller
SCK
SDA
PHY#1
3.3 V
PLL
VDDA
VDDCR
Serial
interface
engine
Serial
interface
Port
controller
Port
power
USB data
downstream
Port
power
OC
sense
switch/
LED
drivers
USB data
downstream
Routing and port re-ordering logic
1.2 V reg
Bus-
power
detect/
Vbus pulse
1.2 V reg
24 MHz
crystal
Upstream
USB data
To upstream
VBUS
To I2C EEPROM or
SMBus master
PHY#xPort #x
OC sense
switch driver/
LED drivers
TT
#x
TT
#1
...
Port #1
OC sense
switch driver/
LED drivers
OC
sense
switch/
LED
drivers
...
x indicates the number of available downstream ports: 2, 3, or 4
2010 - 2015 Microchip Technology Inc. DS00001692C-page 7
USB251xB/xBi
3.0 PIN INFORMATION
This chapter outlines the pinning configurations for each package type available, followed by a correspondi ng pin list
organized alphabetically. The detailed pin descriptions are liste d then outlined by function in Sectio n 3.3, "Pin Descrip-
tions (Grouped by Function)," on page 12.
3.1 Pin Configurations
The following figures detail the pinouts of the various USB251xB/xBi versions.
FIGURE 3-1: USB2512B PIN DIAGRAM
Ground Pad
(must be connected to VSS)
USB2512B/12Bi
(Top View)
18 NC
17
16
15
14
VDD33
13
CRFILT
12
11 TEST
10 VDDA33
OCS_N2
PRTPWR2/BC_EN2
OCS_N1
PRTPWR1/BC_EN1
28
VDDA33 29
USBDP_UP 31
XTALOUT 32
33
RBIAS
36
VDDA33
35
PLLFILT 34
USBDM_UP 30
XTALIN/CLKIN
SUSP_IND/LOCAL_PWR/NON_REM0
Indicates pins on the bo ttom of the de vice .
USB251xB/xBi
DS00001692C-page 8 2010 - 2015 Microchip Technology Inc.
FIGURE 3-2: USB2513B PIN DIAGRAM
Ground Pad
(must be connected to VSS)
USB2513B/13Bi
(Top View)
18
17
16
15
14
13
12
11
10 VDDA33
TEST
PRTPWR1/BC_EN1
OCS_N1
CRFILT
VDD33
PRTPWR2/BC_EN2
OCS_N2
PRTPWR3/BC_EN3
28
29
31
32
33
36
35
34
30
VDDA33
RBIAS
PLLFILT
XTALIN/CLKIN
XTALOUT
USBDP_UP
USBDM_UP
VDDA33
SUSP_IND/LOCAL_PWR/NON_REM0
Indicates pins on the bottom of the device.
2010 - 2015 Microchip Technology Inc. DS00001692C-page 9
USB251xB/xBi
FIGURE 3-3: USB2514B PIN DIAGRAM
Ground Pad
(must be connected to VSS)
USB2514B/14Bi
(Top View)
18
17
16
15
14
13
12
11
10 VDDA33
TEST
PRTPWR1/BC_EN1
OCS_N1
CRFILT
VDD33
PRTPWR2/BC_EN2
OCS_N2
PRTPWR3/BC_EN3
28
29
31
32
33
36
35
34
30
VDDA33
RBIAS
PLLFILT
XTALIN/CLKIN
XTALOUT
USBDP_UP
USBDM_UP
VDDA33
SUSP_IND/LOCAL_PWR/NON_REM0
Indicates pins on th e bottom of the device.
USB251xB/xBi
DS00001692C-page 10 2010 - 2015 Microchip Technology Inc.
3.2 Pin List (Alphabetical)
TABLE 3-1: USB251XB/XBI PIN LIST (ALPHABETICAL)
Symbol Name
Pin Numbers
USB2512B
USB2512Bi
USB2513B
USB2513Bi
USB2514B
USB2514Bi
BC_EN1 Battery Charging
Strap Option 12
BC_EN2 16
BC_EN3 -18
BC_EN4 -20
CFG_SEL0 Configuration
Programming
Selection
24
CFG_SEL1 25
CLKIN External Clock Input 33
CRFILT Core Regulator Filter
Capacitor 14
Ground Pad
(VSS) Exposed Pad Tied to
Ground (VSS) ePad
HS_IND Hi-Speed Upstream
Port Indicator 25
LOCAL_PWR Local Power
Detection 28
NC No Connect 6 -
NC 7-
NC 18 -
NC 19 -
NC 8-
NC 9-
NC 20 -
NC 21 -
NON_REM0 Non-Removable
Port Strap Option 28
NON_REM1 22
OCS_N1 Over-Current Sense 13
OCS_N2 17
OCS_N3 -19
OCS_N4 -21
PLLFILT PLL Regulator Filter
Capacitor 34
PRT_DIS_M1 Downstream Port
Disable Strap Option 1
PRT_DIS_M2 3
PRT_DIS_M3 -6
PRT_DIS_M4 -8
PRT_DIS_P1 Port Disable 2
PRT_DIS_P2 4
PRT_DIS_P3 -7
PRT_DIS_P4 -9
2010 - 2015 Microchip Technology Inc. DS00001692C-page 11
USB251xB/xBi
PRTPWR1 USB Port Power
Enable 12
PRTPWR2 16
PRTPWR3 -18
PRTPWR4 -20
RBIAS USB Transceiver
Bias 35
RESET_N Reset Input 26
SCL Serial Clock 24
SDA Serial Data Signal 22
SMBCLK System
Management Bus
Clock
24
SMBDATA System
Management Bus
Data Signal
22
SUSP_IND Active/Suspend
Status Indicator 28
TEST Test Pin 11
USBDM_UP USB Bus Data 30
USBDP_UP 31
USBDM_DN1 Hi-Speed USB Data 1
USBDM_DN2 3
USBDM_DN3 -6
USBDM_DN4 -8
USBDP_DN1 2
USBDP_DN2 4
USBDP_DN3 -7
USBDP_DN4 -9
VBUS_DET Upstream VBUS
Power Detection 27
VDD33 3.3 V Digital Power 15
VDD33 23
VDDA33 3.3 V Analog Power 5
VDDA33 10
VDDA33 29
VDDA33 36
XTALIN Crystal Input 33
XTALOUT Crystal Output 32
TABLE 3-1: USB251XB/XBI PIN LIST (ALPHABETICAL) (CONTINUED)
Symbol Name
Pin Numbers
USB2512B
USB2512Bi
USB2513B
USB2513Bi
USB2514B
USB2514Bi
USB251xB/xBi
DS00001692C-page 12 2010 - 2015 Microchip Technology Inc.
3.3 Pin Descriptions (Grouped by Function)
An N at th e end of a signal na me indicates that the active (asserted) state occurs when the signal is at a low voltage
level. When the N is not present, the signal is asserted when it is at a high voltage level. The terms assertion and nega-
tion are used exclusively in order to avoid confusion when working with a mixtur e of active low and active high sign a ls .
The term assert, or assertion, indicates that a signal is active, independent of whether that level is represented by a high
or low voltage. The term negate, or negation, indicates that a signal is inactive.
TABLE 3-2: USB251XB/XBI PIN DESCRIPTIONS
Symbol Buffer
Type Description
UPSTREAM USB 2.0 INTERFACES
USBDM_UP
USBDP_UP IO-U USB Data: connect to the upstream USB bus data signals (host, port, or upstream
hub).
VBUS_DET I Detect Upstream VBUS Power: detects the state of the upstream VBUS power.
The hub monitors VBUS_DET to determine whe n to assert the internal D+ pull-u p
resistor: (signaling a connect event).
When designing a detachabl e hub, this pin should be connected to VBUS on the
upstream port via a 2:1 voltage divider. Two 100 k resistors are suggested.
For self-powered appli cations with a permanently attached host, this pi n must be
connected to a dedicated host control output, or connected to the 3.3 V domain
that powers the host (typically VDD33).
DOWNSTREAM USB 2.0 INTERFACES
USBDP_DN[x:1]/P
RT_DIS_P[x:1] IO-U Hi-Speed USB Data: connect to the downstream USB p eripheral devices attached
to the hub’s port. To disable, use a 10 k pull-up resistor to 3.3 V.
USBDM_DN[x:1]/P
RT_DIS_M[x:1] Downstream Port Disable Strap Option: when enabled by package and
configuration settings (see Table 5-1 on page 19), this pin is sampled at RESET_N
negation to determine if the port is disabled.
To disable a port, pull u p both PRT_DIS_M[x:1] and PRT_DIS_P[x:1] pins for the
corresponding port number(s). See Section 3.3.1, on page 14 for pull up details.
PRTPWR[x:1]/ O12 USB Power Enable: enables power to USB peripheral devices downstream.
BC_EN[x:1] IPD Battery Charging Strap Option: when enabled by package and configuration
settings (see Table 5-1), the pin will be sampled at RESET_N negation to
determine if ports [x:1] support the battery charging protocol. When supporting the
battery charging protocol, the hub also supports external port power controllers.
The battery charging protocol enables a device to draw the currents per the USB
battery charging specification. See Secti on 3.3.1, on page 14 for strap pin details.
1 : Battery charging feature is supported for port x
0 : Battery charging feature is not supported for port x
OCS_N[x:1] IPU Over-Current Sense: input from external current monitor indicating an over-current
condition.
RBIAS I-R USB Transceiver Bias: a 12.0 k (+/- 1%) resistor is attached from ground to this
pin to set the transceiver’s internal bias settings.
2010 - 2015 Microchip Technology Inc. DS00001692C-page 13
USB251xB/xBi
SERIAL PORT INTERFACES
SDA/ I/OSD12 Serial Data Signal
SMBDATA/ System Management Bus Signal
NON_REM1 Non-Removable Port 1 Strap Option: when enabled by package and configuration
options (see Table 5-1 on page 19), this pin will be sampled (in conjunction with
LOCAL_PWR/SUSP_IND/NON_REM0) at RESET_N negation to determine if
ports [x:1] contain permanently attached (non-removable) devices:
NON_REM[1:0] = 00 : all ports are removable
NON_REM[1:0] = 01 : port 1 is non-removable
NON_REM[1:0] = 10 : ports 1 and 2 are non-removable
NON_REM[1:0] = 11 : when available, ports 1, 2, and 3 are non-removable
When NON_REM[1:0] is chosen such that there is a non-removable device, the
hub will automatically report itself as a compound device (using the proper
descriptors).
RESET_N IS RESET Input: the system can reset the chip by driving this input low. The
minimum active low pulse is 1 s.
SCL/ I/OSD12 Serial Clock (SCL)
SMBCLK/ System Management Bus Clock
CFG_SEL0 Configuration Select: the logic state of this multifunction pin is internally latched
on the rising edge of RESET_N (RESET_N negati on), and will determine the hub
configuration method as described in Table 5-1.
HS_IND/ I/O12 Hi-Speed Upstream Port Indicator: upstream port connection speed.
Asserted = the hub is connected at HS
Negated = the hub is connected at FS
Note: When implementing an external LED on this pin, the active state is
indicated above and outlined in Section 3.3.1.3, on page 15.
CFG_SEL1 Configuration Programming Select 1: the l ogic state of this pin is internally latche d
on the rising edge of RESET_N (RESET_N negati on), and will determine the hub
configuration method as described in Table 5-1.
MISC
XTALIN ICLKx Crystal Input: 24 MHz crystal.
This pin connects to either one terminal of the crystal or to an external 24 MHz
clock when a crystal is not used.
CLKIN External Clock Input: this pin connects to either one terminal of the crystal or to
an external 24 MHz clock when a crystal is not used.
XTALOUT OCLKx Crystal Output: this is the other terminal of the crystal circuit with 1.2 V p-p output
and a weak (< 1mA) driving strength. When an external clock source is used to
drive XTALIN/CLKIN, leave this pin unconnected, or use with appropriate
caution.
TABLE 3-2: USB251XB/XBI PIN DESCRIPTIONS (CONTINUED)
Symbol Buffer
Type Description
USB251xB/xBi
DS00001692C-page 14 2010 - 2015 Microchip Technology Inc.
3.3.1 CONFIGURING THE STRAP PINS
If a pin's strap function is enabled thru the hub configuration selection, (Table 5-1, “Initial Interface/Configuration
Options,” on page 19) the strap pins must be pulled either high or low using the values provided in Table 3-3. Each strap
option is dependent on the pin’s buf fer type, as outlined in the sections that follow .
SUSP_IND/ I/O Active/Suspend Status LED: indicates USB state of the hub.
Negated = unconfigured; or configured and in USB suspend
Asserted = hub is configured and is active (i.e., not in suspend)
LOCAL_PWR/ Local Power: detects availability of local self-power source.
Low = self/local power source is NOT available (i.e., the hub gets all power from
the upstream USB VBus)
High = self/local power source is available
NON_REM0 Non-Removable 0 Strap Option: when enabled by package and configuration
settings (see Table 5-1 on page 19), this pin will be sampled (in conjunction with
NON_REM[1]) at RESET_N negation to determine if ports [x:1] contain
permanently attached (non-removable) devices:
Note: When implementing an external LED on this pin, the active state is
outlined below and detailed in Section 3.3.1.3, on page 15.
NON_REM[1:0] = 00 : all ports are removable; LED is active high
NON_REM[1:0] = 01 : port 1 is non-removable; LED is active low
NON_REM[1:0] = 10 : ports 1 and 2 are non-removable; LED is active high
NON_REM[1:0] = 11 : (when available) ports 1, 2, and 3 are non-removable; LED
is active low
TEST IPD Test Pin: treat as a no connect pin or con nect to ground . No trace or signal should
be routed or attached to this pin.
POWER, GROUND, and NO CONNECTS
CRFILT VDD Core Regulator Filter Capacitor: this pin can have up to a 0.1 F low-ESR
capacitor to VSS, or be left unconnected.
VDD33 3.3 V Power
VDDA33 3.3 V Analog Power
PLLFILT PLL Regulator Filter Capacitor: this pin can have up to a 0.1 F low-ESR capacitor
to VSS, or be left unconnected.
VSS Ground Pad/ePad: the package slug is the only VSS for the device and must be
tied to ground with multiple vias.
NC No Connect: no signal or trace should be routed or attached to all NC pins.
TABLE 3-3: STRAP OPTION SUMMARY
Strap Option Resistor Value Buffer Ty pe Notes
Non-Removable 47 - 100 kI/O
Internal Pull-Down 10 kIPD • Only applicable to port power pins
• Contains a built-in resistor
LED 47 - 100 kI/O
TABLE 3-2: USB251XB/XBI PIN DESCRIPTIONS (CONTINUED)
Symbol Buffer
Type Description
2010 - 2015 Microchip Technology Inc. DS00001692C-page 15
USB251xB/xBi
3.3.1.1 Non-Removable
If a strap pin’s buffer type is I/O, an external pull-up or pull-down must be implemented as shown in Figure 3-4. Use
Strap High to set the strap option to 1 and Stap Low to set the strap option to 0. When implementing the Strap Low
option, no additional components are needed (i.e., the internal pull-down provide s the resistor).
3.3.1.2 Internal Pull-Down (IPD)
If a strap pin’s buffer type is IPD (pins BC_EN[x:1]), one of the two hardware configurations outlined below must be
implemented. Use the Strap High configuration to set the st rap opti on value to 1 and Strap Low to set the strap option
value to 0.
3.3.1.3 LED
If a strap pin’s buffer type is I/O and shares functionality with an LED, the hardwa re configuration outlined be low must
be implemented. The internal logic will drive the LED appropriately (active high or low) depending on the sampled strap
option. Use the Strap High configuration to set the strap option value to 1 and Strap Low to set the strap option to 0.
FIGURE 3-4: NON-REMOVABLE PIN STRAP EXAMPLE
FIGURE 3-5: PIN STRAP OPTION WITH IPD PIN EXAMPLE
FIGURE 3-6: LED PIN STRAP EXAMPLE
HUBHUB
I/O Strap Pin Strap High
+V
I/O Strap Pin Strap Low
GND
R k
R k
HUBHUB
IPD Strap Pin Strap High
R k
+V
VSS
IPD Strap Pin Strap Low
VSS
HUBHUB
Strap Pin
LED/
Strap High
Strap Pin
LED/
Strap Low
R
k
R
k
+V
USB251xB/xBi
DS00001692C-page 16 2010 - 2015 Microchip Technology Inc.
3.4 Buffer Type Descriptions
TA BLE 3-4: BUFFER TYPE DESCRIPTIONS
Buffer Type Description
I Input
I/O Input/output
IPD Input with internal weak pull-down resistor
IPU Input with internal weak pull-up resistor
IS Input with Schmitt trigger
O12 Output 12 mA
I/O12 Input/output buffer with 12 mA sink and 12 mA source
I/OSD12 Open drain with Schmitt trigger and 12 mA sink. Meets the I2C-Bus
Specification [2] requirements.
ICLKx XTAL clock input
OCLKx XTAL clock output
I-R RBIAS
I/O-U Analog input/output defined in USB specification
2010 - 2015 Microchip Technology Inc. DS00001692C-page 17
USB251xB/xBi
4.0 BATTERY CHARGING SUPPORT
The USB251xB/xBi hub p rovides suppo rt fo r battery chargi ng devices on a per port basis in compli ance with the USB
Battery Charging Specificati on, Revision 1.1. The hub can be configured to i ndividua lly enable each downstream po rt
for battery charging support either via pin strapping as il lustra ted in Figure 4-1 or by setting the corresponding configu-
ration bits via I2C EEPROM or SMBus (Section 5.1 on page 19).
4.1 USB Battery Charging
A downstream port enabled for battery charging turns on port power as soon as the power on reset and hardware con-
figuration process has completed. The hub does not need to be enumerated nor does VBUS_DET need to be asserted
for the port power to be enabled. These conditions allow battery charging in S3, S4, and S5 system power states as well
as in the fully operational state. The USB Battery Charging Specification does not interfere with standard USB operation,
which allows a device to perform battery charging at any time.
A port that supports battery charging must be able to support 1.5 amps of current on VBUS. Standard USB port power
controllers typically only a llow for 0.8 amps of curre nt before detecting a n over-current co ndition. Therefore, th e 5 volt
power supply, port power controller, or over-current protection devices must be chosen to handle the larger current
demand compared to standard USB hub designs.
4.1.1 SPECIAL BEHAVIOR OF PRTPWR PINS
The USB251xB/xBi enables VBUS by asserting the port power (PRTPWR) as soon as the hardware configuration pro-
cess has completed. If the port detects an over-current condition, PRTPWR will be turned off to protect the circuitry from
overloading. If an over-current condition is detected when the hub is not enumerated, PRTPWR can only be turned on
from the host or if RESET_N is toggled. These behaviors provide battery charging even when the hub is not enumerated
and protect the hub from sustained short circuit conditions. If the short circuit condition persists when the hub is plugged
into a host system the user is notified that a port has an over-current condition. Otherwise PRTPWR turned on by the
host system and the ports operate normally.
FIGURE 4-1: BATTERY CHARGING VIA EXTERNAL POWER SUPPLY
Note: RSTRAP enables battery charging.
USB251xB/xBi
USB Port Power
Controller
IN
EN
FLAG
VBUS
5.0 V3.3 V
RSTRAP
PRTPWR[x:1]
OCS_N[x]
USB251xB/xBi
DS00001692C-page 18 2010 - 2015 Microchip Technology Inc.
4.2 Battery Charging Configuration
The battery charging option can be configured in one of two ways:
• When the hub is brought up in the default configuration with strapping options enabled, with the PRT-
PWR[x:1]/BC_EN[x:1] pins configured. See the following sections for details:
-Section 3.3, "Pin Descriptions (Grouped by Function)," on page 12
-Section 3.3.1.2, "Internal Pull-Down (IPD)," on page 15
• When the hub is initialized for configuration over I2C EEPROM or SMBus. Either of these interfaces can be used
to configure the battery charging option.
4.2.1 BATTERY CHARGING ENABLED VIA I2C EEPROM OR SMBUS
Register mem ory map lo cation 0xD0 is allocated for b attery charging support. The Battery Charging register at location
0xD0 starting from bit 1 enables battery charg ing f or each do wnst re am port when assert ed. Bit 1 represents port 1, bit
2 represents port 2, etc. Each port with battery charging enabled asserts the corresponding PRTPWR[x:1] pin.
2010 - 2015 Microchip Technology Inc. DS00001692C-page 19
USB251xB/xBi
5.0 INITIAL INTERFACE/CONFIGURATION OPTIONS
The hub must be configured in order to correctly function when attached to a USB host controller. The hub can be con-
figured either int ernally or externally by set ting the CFG_SEL[1:0] pi ns (immediately after RESET_N negat ion) as out-
lined in the table below.
To configure the hub externally, there are two principal ways to interface to the hub: over SMBus or I2C EEPROM. The
hub can be configured internally, where several default configurations are available as described in the table below.
When configured internally, additional configuration is available using the strap options (listed in Section 3.3.1 on page
14).
5.1 Internal Register Set (Common to I2C EEPROM and SMBus)
The register set available when configuring the hub to interface over I2C or SMBus is outlined in the table below. Each
register has R/W capability, where EEPROM reset values are 0x00. Reserved registers should be written to 0 unless
otherwise specified. Contents read from unavailable registers should be ignored.
Note: See Chapter 11 (Hub Specification) of the USB specification for general details regarding hub operation
and functionality.
Note: Strap options are not available when configuring the hub over I2C or SMBus.
TABLE 5-1: INITIAL INTERFACE/CONFIGURATION OPTIONS
CFG_SEL[1] CFG_SEL[0] Description
0 0 Default configuration:
• Strap options enabled
• Self-powered operation enabled
• Individual power switching
• Individual over-current sensing
0 1 The hub is configured externally over SMBus (as an SMBus slave
device):
• Strap options disabled
• All registers configu re d over SM Bu s
1 0 Default configuration with the following overrides:
• Bus-powered operation
1 1 The hub is configured over 2-wire I2C EEPROM:
• Strap options disabled
• All registers configured by I2C EEPROM
Address Register Name
Default ROM Values
(Hexidecimal)
USB2512B/12Bi
USB2513B/13Bi
USB2514B/14Bi
00h Vendor ID LSB 24
01h Vendor ID MSB 04
02h Product ID LSB 12 13 14
03h Product ID MSB 25
04h Device ID LSB B3
05h Device ID MSB 0B
USB251xB/xBi
DS00001692C-page 20 2010 - 2015 Microchip Technology Inc.
06h Configuration Data Byte 1 9B
07h Configuration Data Byte 2 20
08h Configuration Data Byte 3 02
09h Non-Removable Devices 00
0Ah Port Disable (Self) 00
0Bh Port Disable (Bus) 00
0Ch Max Power (Self) 01
0Dh Max Power (Bus) 32
0Eh Hub Controller Max Current (Self) 01
0Fh Hub Controller Max Current (Bus) 32
10h Power-on Time 32
11h Language ID High 00
12h Language ID Low 00
13h Manufacturer String Length 00
14h Product String Length 00
15h Serial String Length 00
16h-53h Manufacturer String 00
54h-91h Product String 00
92h-CFh Serial String 00
D0h Battery Charging Enable 00
E0h rsvd 00
F5h rsvd 00
F6h Boost_Up 00
F7h rsvd 00
F8h Boost_x:0 00
F9h rsvd 00
FAh Port Swap 00
FBh Port Map 12 00
FCh Port Map 34 - 00
FD-FEh rsvd 00
FFh Status/Command
Note: SMBus register only 00
Address Register Name
Default ROM Values
(Hexidecimal)
USB2512B/12Bi
USB2513B/13Bi
USB2514B/14Bi
2010 - 2015 Microchip Technology Inc. DS00001692C-page 21
USB251xB/xBi
5.1.1 REGISTE R 00H: VENDOR ID (LSB)
5.1.2 REGISTE R 01H: VENDOR ID (MSB)
5.1.3 REGISTE R 02H: PRODUCT ID (LSB)
5.1.4 REGISTE R 03H: PRODUCT ID (MSB)
5.1.5 REGISTE R 04H: DEVICE ID (LSB)
5.1.6 REGISTE R 05H: DEVICE ID (MSB)
Bit Number Bit Name Description
7:0 VID_LSB Least Significant Byte of the Vendor I D: a 16-bit value that uniquel y identifies
the Vendor of the user device (assigned by USB-Interface Forum). Set this
field using either the SMBus or I2C EEPROM interface options.
Bit Number Bit Name Description
7:0 VID_MSB Most Significant Byte of the Vendor ID: a 16-bit value that uniquely identifies
the Vendor of the user device (assigned by USB-Interface Forum). Set this field
using either the SMBus or I2C EEPROM interface options.
Bit Number Bit Name Description
7:0 PID_LSB Least Significant Byte of the Product ID: a 16-bit valu e that uniquely identifies
the Product ID of t he user device. Set thi s field using either the SMBus o r I2C
EEPROM interface options.
Bit Number Bit Name Description
7:0 PID_MSB Most Significant Byte of the Product ID: a 16-bit value that uniq uely identifies
the Product I D of the user de vice. Set this fiel d us ing ei ther t he SMBus or I 2C
EEPROM interface options.
Bit Number Bit Name Description
7:0 DID_LSB Least Significant Byte of the Device ID: a 16-bit device release number in
BCD format (assigned by OEM). Set this field using either the SMBus or I2C
EEPROM interface options.
Bit Number Bit Name Description
7:0 D ID_MSB Most Significant Byte of the Device ID: a 16-bit device release number in BCD
format (assigned by OEM). Set this field using either the SMBus or I2C
EEPROM interface options.
USB251xB/xBi
DS00001692C-page 22 2010 - 2015 Microchip Technology Inc.
5.1.7 REGISTE R 06H: CONFIG_BYTE_1
Bit Number Bit Name Description
7 SELF_BUS_PWR Self or Bus Power: selects between self- and bus-powered operation.
The hub is either self-powered (draws less tha n 2 mA of upstream bus power)
or bus-powered (limited to a 100 mA maximum of upstream power prior to
being configured by the host controller).
When configured as a bus-powered device, the hub consumes less than
100 mA of current prior to being configured. After configuration, the bus-
powered hub, along with all associated hub circuitry, any embedded devices
(if part of a compound device), and all externally available downstream ports
(max 100 mA) must consume no more than 500 mA of upstream VBUS
current. The current consumption is system dependent and must not violate
the USB 2.0 Specification [1].
When configured as a self-powered device, < 1 mA of upstream VBUS current
is consumed and all ports are available. Each port is capable of sourcing
500 mA of current.
This field is set over either the SMBus or I2C EEPROM interface options.
0 : bus-powered operation
1 : self-powered operation
If dynamic power switching is enabled (Section 5.1.8), this bit is ignored and
LOCAL_PWR is used to determine if the hub is operating from self or bus
power.
6 rsvd
5 HS_DISABLE Hi-Speed Disable: disables the capability to attach as either a hi- or full-speed
device, forcing full-speed attachment only (i.e., no hi-speed support).
0 : hi-/full-speed
1 : full-speed only (hi-speed disabled)
4 MTT_ENABLE Multi-TT Enable: enables one transaction translator per port operation.
Selects between a mode where only one tr ansactio n translator is a vailable f or
all ports (single-TT), or each port gets a dedicated transaction translator
(multi-TT).
0 : single TT for all ports
1 : multi-TT (one TT per port)
3 EOP_DISABLE EOP Disable: disables End Of Packet (EOP) generation at End Of Frame
Time #1 (EOF1) when in full-speed mode.
During full-speed operation only, the hub can send EOP when no downstream
traffic is detected at EOF1. See the USB 2.0 Specification, Section 11.3.1 for
details.
0 : EOP generation is normal
1 : EOP generation is disabled
2:1 CURRENT_SNS Over-Current Sense: selects current sensing on all ports (ganged); a port-by-
port basis (individual); or none (for bus-powered hubs only). The ability to
support current sensing on a ganged or port-by-port basis is hardware
implementation dependent.
00 : ganged sensing
01 : individual sensing
1x : over-current sensing not supported (use with bus-powered configurations)
0 PORT_PWR Port Power Switching: enables power switching on all ports (ganged) or a port-
by-port basis (individual). The ability to support power enabling on a ganged
or port-by-port basis is hardware implementation dependent.
0 : ganged switching
1 : individual switching
2010 - 2015 Microchip Technology Inc. DS00001692C-page 23
USB251xB/xBi
5.1.8 REGISTE R 07 H: CONFIGURATION DATA BYTE 2
5.1.9 REGISTE R 08 H: CONFIGURATION DATA BYTE 3
Bit Number Bit Name Description
7 DYNAMIC Dynamic Power Enable: controls the ability of the hub to automatically change
from self-powered to bus-powered operation if the local power source is
removed or unavailable. It can also go from bus-powered to self-powered
operation if the local power source is restored.
When dynamic power switching is ena bled, the hub detects the availabilit y of
a local power source by monitoring LOCAL_PWR. If the hub detects a change
in power source availability, the hub immediately disconnects and removes
power from all downstream devices. It also disconnects the upstream port.
The hub will then re-attach to the upstream port as either a bus-powered hub
(if local power is unavailable) or a self-powered hub (if local power is
available).
0 : no dynamic auto-switching
1 : dynamic auto-switching capable
6 rsvd
5:4 OC_TIMER Over Current Timer Delay:
00 : 0.1 ms
01 : 4.0 ms
10 : 8.0 ms
11 : 16.0 ms
3 COMPOUND Compound Device: indicates the hub is part of a compound device (see the
USB Specification for definition). The applicable port(s) must also be defined
as having a non-removable device.
Note: When configured via strapping options, declaring a port as non-
removable automaticall y causes the hub con troller to report that it is
part of a compound device.
0 : no
1 : yes, the hub is part of a compound device
2:0 rsvd
Bit Number Bit Name Description
7:4 rsvd
3 PRTMAP_EN Port Mapping Enable: selects the method used by the hub to assign port
numbers and disable ports.
0 : standard mode
1 : port mapping mode
2:1 rsvd
0 STRING_EN Enables String Descriptor Support
0 : string support disabled
1 : string support enabled
USB251xB/xBi
DS00001692C-page 24 2010 - 2015 Microchip Technology Inc.
5.1.10 REGISTER 09H: NON-REMOVABLE DEVIC E
5.1.11 REGISTER 0AH: PORT DISABLE FOR SELF-POWERED OPERATION
Bit Number Bit Name Description
7:0 NR_DEVICE Non-Removable Device: indicates which port has a non-removable device.
0 : port is removable
1 : port is non-removable
Bit 7 : rsvd
Bit 6 : rsvd
Bit 5 : rsvd
Bit 4 : controls port 4
Bit 3 : controls port 3
Bit 2 : controls port 2
Bit 1 : controls port 1
Bit 0 : rsvd
Note: The device must provide its own descriptor data.
When using the default configuration, th e NON_REM[1:0] pins will designate
the appropriate ports as being non-removable.
Bit Number Bit Name Description
7:0 PORT_DIS_SP Port Disable Self-Powered: disables one or more ports.
0 = port is available
1 = port is disabled
Bit 7 : rsvd
Bit 6 : rsvd
Bit 5 : rsvd
Bit 4 : controls port 4
Bit 3 : controls port 3
Bit 2 : controls port 2
Bit 1 : controls port 1
Bit 0 : rsvd
During self-powered operation when mapping mode is disabled (PRTMAP_EN
= 0), this register selects the ports that will be permanently disabled. These
ports are then unavailable and cannot be enabled or enumerated by a host
controller. The po rts can be disabled in any order, whe re the int ernal logic will
automatically report the correct number of enabled ports to the USB host. The
active ports will be reordered in order to ensure proper function.
When using the default configuration, PRT_DIS_P[x:1] and PRT_DIS_M[x:1]
pins disable the appropriate ports.
2010 - 2015 Microchip Technology Inc. DS00001692C-page 25
USB251xB/xBi
5.1.12 REGISTER 0BH: PORT DISABLE FOR BUS-POWERED OPERATION
5.1.13 REGISTER 0CH: MAX POWER FOR SELF-POWERED OPERATION
5.1.14 REGISTER 0DH: MAX POWER FOR BUS-POWERED OPERATION
Bit Number Bit Name Description
7:0 PORT_DIS_BP Port Disable Bus-Powered: disables one or more ports.
0 = port is available
1 = port is disabled
Bit 7 : rsvd
Bit 6 : rsvd
Bit 5 : rsvd
Bit 4 : controls port 4
Bit 3 : controls port 3
Bit 2 : controls port 2
Bit 1 : controls port 1
Bit 0 : rsvd
During self-powered operation when mapping mode is disabled (PRTMAP_EN
= 0), this selects the ports which will be permanently disabled.These ports are
then unavailable and cannot be enabled or enumerated by a host controller.
The ports can be disabled in any order, where the internal logic will
automatically report the correct number of enabled ports to the USB host. The
active ports will be reordered in order to ensure proper function.
When using the internal default option, the PRT_DIS_P[x:1] and
PRT_DIS_M[x:1] pins disable the appropriate ports.
Bit Number Bit Name Description
7:0 MAX_PWR_SP Max Power Self-Powered: the value in 2 mA increments that the hub
consumes from an upstream port (VBUS) when operating as a self-powered
hub. This value includes the hub silicon along with the combined power
consumption (from VBUS) of all associated circuitry on t he board. This value
also includes the power consumption of a permanently attached peripheral if
the hub is configured as a compound device. The embedded peripheral
reports 0 mA in its descriptors.
Note: The USB 2.0 Specification does not permit this value to exceed
100 mA
Bit Number Bit Name Description
7:0 MAX_PWR_BP Max Power Bus-Powered: the value in 2 mA increments that the hub
consumes from an upstream port (VBUS) when operating as a bus-powered
hub. This value includes the hub silicon along with the combined power
consumption (from VBUS) of all associated circuitry on t he board. This value
also includes the power consumption of a permanently attached peripheral if
the hub is configured as a compound device. The embedded peripheral
reports 0 mA in its descriptors.
USB251xB/xBi
DS00001692C-page 26 2010 - 2015 Microchip Technology Inc.
5.1.15 REGISTER 0EH: HUB CONTROLLER MAX CURRENT FOR SELF-POWERED OPERATION
5.1.16 REGISTER 0FH: HUB CONTROLLER MAX CURRENT FOR BUS-POWERED OPERATION
5.1.17 REGISTER 10H: POWER-ON TIME
5.1.18 REGISTER 11H: LANGUAGE ID HIGH
5.1.19 REGISTER 12H: LANGUAGE ID LOW
5.1.20 REGISTER 13H: MANUFACTURER STRING LENGTH
Bit Number Bit Name Description
7:0 HC_MAX_C_SP Hub Controller Max Current Self-Powered: the value in 2 mA increments that
the hub consumes from an upstream port (VBUS) when operating as a self-
powered hub. This value includes the hub silicon along with the combined
power consumption (from VBUS) of all as sociated circui try on the board . This
value does NOT include the power consumption of a permanently attached
peripheral if the hub is configured as a compound device.
Note: The USB 2.0 Specification does not permit this value to exceed
100 mA
A value of 50 (decimal) indicates 100 mA, which is the default value.
Bit Number Bit Name Description
7:0 HC_MAX_C_BP Hub Controller Ma x Current Bus-Powered: the value in 2 mA incre ments that
the hub consumes from an upstream port (VBUS) when operating as a bus-
powered hub. This value wi ll include the hub silicon a long with the combined
power consumption (from VBUS) of all associated circuitry on the board.
Note: This value will not incl ude the power consumption of a permanently
attached peripheral if the hub is configured as a compound device.
A value of 50 (decimal) would indicate 100 mA, which is the default value.
Bit Number Bit Name Description
7:0 POWER_ON_TIME Power-On Time: the length of time that it takes (in 2 ms intervals) from the
time the host initiated the power-on sequence on a port until the port has
adequate power.
Bit Number Bit Name Description
7:0 LANG_ID_H USB Language ID: upper 8 bits of a 16-bit ID field
Bit Number Bit Name Description
7:0 LANG_ID_L USB Language ID: lower 8 bits of a 16-bit ID field
Bit Number Bit Name Description
7:0 MFR_STR_LEN Manufacturer String Length: with a maximum string length of 31 characters
(when supported).
2010 - 2015 Microchip Technology Inc. DS00001692C-page 27
USB251xB/xBi
5.1.21 REGISTER 14H: PRODUCT STRING LENGTH
5.1.22 REGISTER 15H: SERIAL STRING LENGTH
5.1.23 REGISTER 16H-53H: MANUFACTURER STRING
5.1.24 REGISTER 54H-91H: PRODUCT STRING
5.1.25 REGISTER 92H-CFH: SERIAL STRING
Bit Number Bit Name Description
7:0 PRD_STR_LEN Product String Length: with a maximum string length of 31 characters (when
supported).
Bit Number Bit Name Description
7:0 SER_STR_LEN Serial String Length: with a maximum string length of 31 characters (when
supported).
Bit Number Bit Name Description
7:0 MFR_STR Manufacturer String: UNICODE UTF-16LE per USB 2.0 Specification: with a
maximum string length of 31 characters (when supported).
Note: The string consists of individual 16-bit UNICODE UTF-16LE
characters. The characters will be stored starting with the LSB at the
least significant address and the MSB at the next 8-bit location.
(Subsequent characters must be stored in sequential contiguous
addresses in the same LSB, MSB manner.)
Warning: Close at tention to the byte order of the selected programming tool
should be monitored.
Bit Number Bit Name Description
7:0 PRD_STR Product String: UNICODE UTF-16LE per USB 2.0 Specification
When supported, the maximum string length is 31 characters (62 bytes).
Note: The string consists of individual 16-bit UNICODE UTF-16LE
characters. The characters will be stored starting with the LSB at the
least significant address and the MSB at the next 8-bit location.
(Subsequent characters must be stored in sequential contiguous
address in the same LSB, MSB manner.)
Warning: Close at tention to the byte order of the selected programming tool
should be monitored.
Bit Number Bit Name Description
7:0 SER_STR Serial String: UNICODE UTF-16LE per USB 2.0 specification
When supported, the maximum string length is 31 characters (62 bytes).
Note: The string consists of individual 16-bit UNICODE UTF-16LE
characters. The characters will be stored starting with the LSB at the
least significant address and the MSB at the next 8-bit location.
(Subsequent characters must be stored in sequential contiguous
address in the same LSB, MSB manner.)
Warning: Close at tention to the byte order of the selected programming tool
should be monitored.
USB251xB/xBi
DS00001692C-page 28 2010 - 2015 Microchip Technology Inc.
5.1.26 REGISTER D0H: BATTERY CHARGING ENABLE
5.1.27 REGISTER F6H: BOOST_UP
Bit Number Bit Name Description
7:0 BC_EN Battery Charging Enable: enables the battery charging feature for the
corresponding port.
0 : battery charging support is not enabled
1 : battery charging support is enabled
Bit 7 : rsvd
Bit 6 : rsvd
Bit 5 : rsvd
Bit 4 : controls port 4
Bit 3 : controls port 3
Bit 2 : controls port 2
Bit 1 : controls port 1
Bit 0 : rsvd
Bit Number Bit Name Description
7:2 rsvd
1:0 BOOST_IOUT USB electrical signaling drive strength boost bit for the upstream port.
00 : normal electrical drive strength - no boost
01 : elevated electrical drive strength - low (~ 4% boost)
10 : elevated electrical drive strength - medium (~ 8% boost)
11 : elevated electrical drive strength - high (~12% boost)
Note: Boost could result in non-USB compliant parameters. Therefore, a
value of 00 should be implemented unless specific implementation
issues require additional signal boosting to correct for degraded USB
signalling levels.
2010 - 2015 Microchip Technology Inc. DS00001692C-page 29
USB251xB/xBi
5.1.28 REGISTER F8H: BOOST_4:0
5.1.29 REGISTER FAH: PORT SWAP
Bit Number Bit Name Description
7:6 BOOST_IOUT_4 USB electrical signaling drive strength boost bit for downstream port 4.
00 : normal electrical drive strength - no boost
01 : elevated electrical drive strength - low (~4% boost)
10 : elevated electrical drive strength - medium (~ 8% boost)
11 : elevated electrical drive strength - high (~12% boost)
5:4 BOOST_IOUT_3 USB electrical signaling drive strength boost bit for downstream port 3.
00 : normal electrical drive strength - no boost
01 : elevated electrical drive strength - low (~4% boost)
10 : elevated electrical drive strength - medium (~ 8% boost)
11 : elevated electrical drive strength - high (~12% boost)
3:2 BOOST_IOUT_2 USB electrical signaling drive strength boost bit for downstream port 2.
00 : normal electrical drive strength - no boost
01 : elevated electrical drive strength - low (~4% boost)
10 : elevated electrical drive strength - medium (~ 8% boost)
11 : elevated electrical drive strength - high (~12% boost)
1:0 BOOST_IOUT_1 USB electrical signaling drive strength boost bit for downstream port 1.
00 : normal electrical drive strength - no boost
01 : elevated electrical drive strength - low (~4% boost)
10 : elevated electrical drive strength - medium (~ 8% boost)
11 : elevated electrical drive strength - high (~12% boost)
Note: Boost could result in non-USB compliant parameters. Therefore, a value of 00 should be implemented
unless specific implementation issues require addit ional signal boost ing t o correct for degrad ed USB sig -
naling levels.
Bit Number Bit Name Description
7:0 PRTSP Port Swap: swaps the upstream USBDP/USBDM pins (USBDP_UP and
USBDM_UP) and the downstream USBDP/USBDM pins (USBDP_DN[x:1] and
USBDP_DN[x:1]) for ease of board routing to devices and connectors.
0 : USB D+ functiona lity is associated with the DP p in and D- functionality is
associated with the DM pin.
1 : USB D+ f unctionality is associ ated with the DM pin and D- function ality is
associated with the DP pin.
Bit 7 : rsvd
Bit 6 : rsvd
Bit 5 : rsvd
Bit 4 : controls port 4
Bit 3 : controls port 3
Bit 2 : controls port 2
Bit 1 : controls port 1
Bit 0 : when set to 1, the upstream port DP/DM is swapped.
USB251xB/xBi
DS00001692C-page 30 2010 - 2015 Microchip Technology Inc.
5.1.30 REGISTER FBH: PORTMAP 12
Bit Number Bit Name Description
7:0 PRTR12 PortMap Register for Ports 1 and 2: When a hub is enumerated by a USB
host controller, the hub is only permitted to report how many ports it has; the
hub is not permitted to select a numerical range or assignment. The host
controller will number the downstream ports of the hub starting with the
number 1, up to the number of ports that the hub reports having.
The host's port number is called the Logical Port Number and the physical
port on the hub is the Physical Port Number. When mappi ng mode is enabled
(see PRTMAP_EN, Section 5.1.9 on page 23) the hub's downstream port
numbers can be mapped to different logical port numbers (assigned by the
host).
Note: Contiguous logical port numbers must be implemented, starting from
number 1 up to the maximum number of enabled ports. This ensures
that the hub's ports are numbered in accordance with the way a host
will communicate with the ports.
Bit [7:4] 0000 Physical port 2 is disabled
0001 Physical port 2 is mapped to logical port 1
0010 Physical port 2 is mapped to logical port 2
0011 Physical port 2 is mapped to logical port 3
0100 Physical port 2 is mapped to logical port 4
1000
to
1111
rsvd, will default to 0000 value
Bit [3:0] 0000 Physical port 1 is disabled
0001 Physical port 1 is mapped to logical port 1
0010 Physical port 1 is mapped to logical port 2
0011 Physical port 1 is mapped to logical port 3
0100 Physical port 1 is mapped to logical port 4
1000
to
1111
rsvd, will default to 0000 value
2010 - 2015 Microchip Technology Inc. DS00001692C-page 31
USB251xB/xBi
5.1.31 REGISTER FCH: PORTMAP 34
Bit Number Bit Name Description
7:0 PRTR34 PortMap Register for Ports 3 and 4: When a hub is enumerated by a USB
host controller, the hub is only permitted to report how many ports it has; the
hub is not permitted to select a numerical range or assignment. The host
controller will number the downstream ports of the hub starting with the
number 1, up to the number of ports that the hub reports having.
The host's port number is called the Logical Port Number and the physical
port on the hub is the Physical Port Number. When mappi ng mode is enabled
(see PRTMAP_EN, Section 5.1.9 on page 23) the hub's downstream port
numbers can be mapped to different logical port numbers (assigned by the
host).
Note: Contiguous logical port numbers must be implemented, starting from
number 1 up to the maximum number of enabled ports. This ensures
that the hub's ports are numbered in accordance with the way a host
will communicate with the ports.
Bit [7:4] 0000 Physical port 4 is disabled
0001 Physical port 4 is mapped to logical port 1
0010 Physical port 4 is mapped to logical port 2
0011 Physical port 4 is mapped to logical port 3
0100 Physical port 4 is mapped to logical port 4
1000
to
1111
rsvd, will default to 0000 value
Bit [3:0] 0000 Physical port 3 is disabled
0001 Physical port 3 is mapped to logical port 1
0010 Physical port 3 is mapped to logical port 2
0011 Physical port 3 is mapped to logical port 3
0100 Physical port 3 is mapped to logical port 4
1000
to
1111
rsvd, will default to 0000 value
USB251xB/xBi
DS00001692C-page 32 2010 - 2015 Microchip Technology Inc.
5.1.32 REGISTER FFH: STATUS/COMMAND
5.2 I2C EEPROM
The hub can be configured via a 2-wire (I2C) EEPROM (256x8). See Table 5-1 for details on enabling the I2C EEPROM
interface. The I2C EEPROM interface implements a subset of the I2C Master Specification (refer to the Philips Semi-
conductor Standard I2C-Bus Specification I2C protocol for details). The hub’s interface is designed to attach to a single
dedicated I2C EEPROM which conforms to the Standard-mode I2C specification (100 kbit/s transfer rate and 7-bit
addressing) for protocol and electri cal compatibility. The I2C EEPROM shares the same pins as the SMBus interface,
therefore the SMBus interface is not available when the I2C EEPROM interface has been enabled (and vice versa).
The hub acts as the master and generates the serial clock SCL, controls the bus access (determines which device acts
as the transmitter and which device acts as the receiver), and generates the ST AR T and STOP conditions. The hub will
read the external EEPROM for configuration data and then attach to the upstream USB host.
The hub does not have the capacity to write to the externa l EEPROM. Th e hub onl y has the capability to read from an
external EEPROM. The external EEPROM will be read (even if it is blank), and the hub will be configured with the values
that are read. Any values read for unsupported registers will not be retained (i.e., they will remain as the default values).
Reserved registers should be set to 0 unless otherwise specified. EEPROM reset values are 0x00. Contents read from
unavailable registers should be ignored.
5.2.1 I2C SLAVE ADDRESS
The 7-bit slave add ress is 1010000b.
5.2.2 PROTOCOL IMPLEMENTATION
The hub will only access an EEPROM using the sequential read protocol as outlined in Chapter 8 of MicroChip
24AA02/24LC02B [4].
5.2.3 PULL-UP RESISTOR
The circuit board designer is required to place external pull-up resistors (10 k recommended) on the SDA/SMBDATA
and SCL/SMBCLK/CFG_SEL[0] lines (per SMBus 1.0 Specification [3], and EEPROM manufacturer guidelines) to
VDD33 in order to assure proper operation.
Bit Number Bit Name Description
7:3 rsvd
2 INTF_PW_DN SMBus Interface Power Down:
0 : interface is active
1 : interface power down after ACK has completed
1 RESET Reset the SMBus interface and internal memory back to RESET_N assertion
default settings.
0 : normal run/idle state
1 : force a reset of registers to their default state
0 USB_ATTACH USB Attach (and write protect)
0 : SMBus slave interface is active
1 : the hub will signal a USB attach event to an upstream device, and the
internal memory (address range 0x00-0xFE) is write-protected to prevent
unintentional data corruption.
Note: If no external EEPROM is present, the hub will write 0 to all configuration registers.
Note: 10-bit addressing is not supported.
2010 - 2015 Microchip Technology Inc. DS00001692C-page 33
USB251xB/xBi
5.2.4 IN-CIRCUIT EEPROM PROGRAMMING
The EEPROM can be programmed via automatic test equipment (ATE) by pulling RESET_N low (which tri-states the
hub’s EEPROM interface and allows an external source to program the EEPROM).
5.3 SMBus
The Microchip hub can be configured by an external processor via an SMBus interface (see Table 5-1 for details on
enabling the SMBus interface). The SMBus interface shares the same pins as the EEPROM interface, and therefore
the hub no longer supports the I2C EEPROM interface when t he SMBus interface has been enabled. The hub waits
indefinitely for the SMBus code load to complete and only appears as a newly connected device on USB after the code
load is complete.
The hub’s SMBus acts as a slave-only SMBus device. The implementation only supports block write ( Section 5.3.2.1)
and block read (Section 5.3.2.2) protocols, where the available registers are outlined in Section 5.1 on page 19. Refer-
ence the System Management Bus Specification [3] for additional information.
5.3.1 SMBUS SLAVE ADDRESS
The 7-bit slave address is 0101100b. The hub will not respond to the general call address of 0000000b.
5.3.2 PROTOCOL IMPLEMENTATION
Ty pica l block write and block read protocol s are shown in figures 5-2 and 5-3. Re gist er acce sses are pe rf ormed usi ng
7-bit slave addressing, an 8-bit register address field, and an 8-bit data field. The shading shown in the figures during a
read or write indicates the hub is driving data on the SMBDATA line; otherwise, host data is on the SDA/SMBDATA line.
The SMBus slave address assigned to the hub (0101 100b) allows it to be identified on the SMBus. The register address
field is the internal address of the register to be accessed. The register data field is the data that the host is attempting
to write to the register or the contents of the register that the host is attempting to read.
Note: The Hub does not have the capacity to write, or “Program,” an external EEPROM. The Hub only has the
capability to read external EEPROM s. The external EEPROM will be read (even if it is blank or non-popu-
lated), and the Hub will be “configured” with the values that are read.
Note: Data bytes are transferred MSB first.
USB251xB/xBi
DS00001692C-page 34 2010 - 2015 Microchip Technology Inc.
5.3.2.1 Block Write/Read
The block write begins with a slave address and a write condition. After the command code, the host issues a byte count
which describes how many more bytes will f ollow in the messag e. If a slave h ad 20 byte s to send, the first byte woul d
be the number 20 (14h), followed by the 20 bytes of data. The byte count may not be zero. A block write or read allows
a transfer maximum of 32 data bytes.
TABLE 5-2: BLOCK WRITE
5.3.2.2 Block Read
A block read differs from a block write in that the repeated start condition exists to satisfy the I2C specification’s require-
ment for a change in the transfer di rection.
TABLE 5-3: BLOCK READ
5.3.2.3 Invalid Protocol Response Behavior
Note that any attempt to update registers with an invalid protocol will not be updated. The only valid protocols are write
block and read block (described above), where the hub only responds to the 7-bit hardware selected slave address
(0101100b). Also, the onl y valid registers for the hub are outlined in Section 5.1 on page 19. Attempts to access any
other registers will return no response.
5.3.3 SLAVE DEVICE TIMEOUT
Devices in a transfer can abort the transfer in progress and release the bus when any single clock low interval exceeds
25 ms (T TIMEOUT, MIN). The master must d et ect this con dition and g enera te a st op co ndi tio n wit hin or after the t r ansf er
of the interrupted data byte. Slave devices must reset their communication and be able to receive a new START condi-
tion no later than 35 ms (TTIMEOUT, MAX).
Note: For the following SMBus tables:
Note: Some simple devices do n ot contain a clock low drive circ uit; thi s simple ki nd of device typical ly resets its
communications port after a start or stop condition. The slave device timeout must be implemented.
Denotes Master-to-Slave Denotes Slave-to-Master
SSlave Addre ss Register AddressWr A
17118
A
1
...
181
Byte Count = N AData byte 1 AData by te 2 A
81 1 188 Data byte N AP
1
SS Slave Address Register AddressWr
1711 8
A
1
Slave Address Rd A
711
...
A
81 1 188 181
PA AAAByte Count = N Data by te 2Data byte 1 Data byte N
2010 - 2015 Microchip Technology Inc. DS00001692C-page 35
USB251xB/xBi
5.3.4 STRETCHING THE SCLK SIGNAL
The hub supports stretching of the SCLK by other devices on the SMBus. However, the hub does not stretch the SCLK.
5.3.5 SMBUS TIMING
The SMBus slave interface complies with the SMBus Specification Revision 1.0 [3]. See Section 2.1, AC Specif ication s
on page 3 for more information.
5.3.6 BUS RESET SEQUENCE
The SMBus slave interface resets and returns to the idle state upon a ST ART condition followed immediately by a STOP
condition.
5.3.7 SMBUS ALERT RESPONSE ADDRESS
The SMBALERT# signal is not supported by the hub.
5.4 Default Configuration
To put the hub in the default configuration, strap CFG_SEL[1:0] to 00b. This procedure configures the hub to the internal
defaults and enables the strapping opt ions. To place the hub in default conf iguration with overrides, see Table 5-1 on
page 19 for the list of the options.
The internal default values are used for the registers that are not controlled by strapping option pins. Refer to Section 5.1
on page 19 for the internal default values that are loaded when this option is selected. For a list of strapping option pins,
see Section 5.0, "Initial Interface/Configuration Options", and to configure the strapping pins, see Section 3.3.1 on page
14.
5.5 Reset
The hub experiences the following two resets:
• Hardware reset via the RESET_N pin
• USB bus reset
5.5.1 EXTERNAL HARDWARE RESET_N
A valid hardware reset is defined as assert ion of RESET_N for a minimum of 1 s after all power suppli es are with in
operating range. While reset is asserted, the hub (and its associate d external circuitry) con sumes less than 500 A of
current from the upstream USB power source.
Assertion of RESET_N causes the following:
1. All downstream ports are disabled, and PRTPWR[x:1] to downstream devices is removed (unless BC_EN[x:1]
is enabled).
2. The PHYs are disabled, and the differential pairs will be in a high-impedance state.
3. All transactions immediat ely terminate; no states are saved.
4. All internal registers return to the default state (in most cases, 00h).
5. The external crystal oscillator is halted.
6. The PLL is halted.
The hub is operational 500 s after RESET_N is negated. Once operational, the hub will do one of the following, depend-
ing on configuration:
• Read the strapping pins (def ault configuration with strapping options enabled)
• Read configuration information from the external I2C EEPROM
• Wait for configuration over SMBus.
USB251xB/xBi
DS00001692C-page 36 2010 - 2015 Microchip Technology Inc.
5.5.1.1 RESET_N for Strapping Option Configuration
Note 5-1 10 ms for hubs, 50 ms for root ports.
FIGURE 5-1: RESET_N TIMING FOR DEFAULT CONFIGURATION
Name Description MIN TYP MAX Units
t1 RESET_N asserted 1 s
t2 CFG_SEL[1:0] setup time 16.7 ns
t3 CFG_SEL[1:0] hold time 16.7 1400 ns
t4 Hub outputs driven to inactive logic states 1.5 2 s
t5 USB attach (see notes) 3 s
t6 Host acknowledges attach and signals USB reset 100 ms
t7 USB_RESET Host
Defined ms
t8 USB_RESET State Note 5-1 ms
t9 USB Reset Recovery 10 ms
Note:
• When in bus-powered mode, the hub and its associated circuitry must not consume more than 100 mA from the
upstream USB power source during t1+t5.
• All power supplies must have reached the operating levels mandated in Section 6.0, "DC Parameters", prior to
(or coincident with) the assertion of RESET_N.
t1
t4
t5 t6 t7 t8
valid d riven by hub if strap is an output
RESET_N
VSS
CFG_SEL[2:0]
VSS
Hardware
reset asserted Read
CFG_SEL[1:0]
Drive strap
outp u ts to
inactive levels Attach USB
upstream
Attac h
Debounce
Interval USB_RESETUSB_RESET
State
t2 t3
don’t care don’t care
USB Reset
Recovery
t9
2010 - 2015 Microchip Technology Inc. DS00001692C-page 37
USB251xB/xBi
5.5.1.2 RESET_N for EEPROM Configuration
Note 5-2 10 ms for hubs, 50 ms for root ports.
FIGURE 5-2: RESET_N TIMING FOR EEPROM MODE
Name Description MIN TYP MAX Units
t1 RESET_N asserted 1 s
t2 CFG_SEL[1:0] setup time 16.7 ns
t3 CFG_SEL[1:0] hold time 16.7 1400 ns
t4 Hub recovery/stabilization 500 s
t5 EEPROM read (hub configuration) 40 ms
t6 USB attach (see notes) 40 ms
t7 Host acknowledges attach and signals USB reset 100 ms
t8 USB_RESET host-
defined ms
t9 USB_RESET state Note 5-2 ms
t10 USB Reset Recovery 10 ms
Note:
• When in bus-powered mode, the hub and its associated circuitry must not consume more than 100 mA from the
upstream USB power source during t6+t7+t8+t9.
• All power supplies must have reached the operating levels mandated in Section 6.0, "DC Parameters", prior to
(or coincident with) the assertion of RESET_N.
t1 t5 t7 t8 t9
RESET_N
VSS
Hardwa re res et
asserted Read I2C
EEPROM Attach USB
upstream
Attach
Debounce
Interval USB_RESETUSB_RESET
State
Read
CFG_SEL[1:0]
t2 t3
t6
valid
CFG_SEL[2:0]
VSS
don’t care don’t care
t4
t10
USB Reset
Recovery
USB251xB/xBi
DS00001692C-page 38 2010 - 2015 Microchip Technology Inc.
5.5.1.3 RESET_N for SMBus Slave Configuration
Note 5-3 All power supplies must have reached the operating levels mandated in Section 6.0, "DC
Parameters", prior to (or coincident with) the assertion of RESET_N.
Note 5-4 10 ms for hubs, 50 ms for root ports.
5.5.2 USB BUS RESET
In response to the upstream port signaling a reset to the hub, the hub does the followi ng:
1. Sets default internal USB address to 0
2. Sets configuration to: unconfigured
3. Negates PRTPWR[x:1] to all downstream ports unless battery charging (BC_EN[x:1]) is enabled
4. Clears all TT buffers
5. Moves device from suspended to active (if suspended)
6. Complies with Section 1 1.10 of the USB 2.0 Specification [1] for behavior after completion of the reset sequence.
The host then configures the hub and the hub’s downstream port devices in accordance with the USB Specifica-
tion.
FIGURE 5-3: RESET_N TIMING FOR SMBUS MODE
Name Description MIN TYP MAX Units
t1 RESET_N Asserted 1 s
t2 CFG_SEL[1:0] setup time 16.7 ns
t3 CFG_SEL[1:0] hold time 16.7 1400 ns
t4 Hub recovery/stabilization 500 s
t5 SMBus Code Load 2 1000 ms
t6 Hub configuration and USB attach 0 ms
t7 Host acknowledges attach and signals USB reset 100 ms
t8 USB_RESET host-defined ms
t9 USB_RESET State Note 5-4 ms
t10 USB Reset Recovery 10 ms
Note: The hub does not propagate the upstream USB reset to downstream devices.
t1
t4
t6 t7 t8 t9
RESET_N
VSS
Hardware
reset asserted Read
CFG_SEL[1:0] SMBus code
load Attach USB
upstream
Attach
Debounce
Interval USB_RESET USB_RESET
State
t5
Hub PHY
stabilization
valid
CFG_SEL[2:0]
VSS
don’t care don’t care
t2 t3
t10
USB Reset
Recovery
2010 - 2015 Microchip Technology Inc. DS00001692C-page 39
USB251xB/xBi
6.0 DC PARAMETERS
6.1 Maximum Ratings
6.2 Operating Conditions
Parameter Symbol MIN MAX Units Comments
Storage
Temperature TSTOR -55 150 °C
Lead
Temperature Refer to JEDEC Specification J-STD-
020D [5]
3.3 V supply
voltage VDD33
VDDA33 4.6 V Applies to all packages
Voltage on any
I/O pin -0.5 5.5 V
Voltage on
XTALIN -0.5 4.0 V
Voltage on
XTALOUT -0.5 2.5 V
Note 6-1
• Stresses above the specified parameters could cause permanent da mage to the device. This is a stress rating
only. Therefore, functional operation of the device at any condition above those indicated in the operation sec-
tions of this specification are not implied.
• When powering this device from laboratory or system power supplies, it is important that the absolute maximum
ratings not be exceeded or device failure can result. Some power supplies exhibit voltage spikes on their outputs
when the AC power is switched on or off. In addition, voltage transients on the AC power line may appear on the
DC output. When this possibility exists, it is suggested that a clamp circuit be used.
Parameter Symbol MIN MAX Units Comments
Extended Commercial
Operating Temperature TAE 0 85 °C Ambient temperature in still air
Industrial
Operating Temperature TAI -40 85 °C Ambient temperature in still air
Only applies to USB251xBi products
3.3 V supply voltage VDD33
VDDA33 3.0 3.6 V Applies to all parts
3.3 V supply rise time tRT33 0400sSee Figure 6-1 and Note 6-2
Voltage on any I/O pin -0.3 5.5 V If any 3.3 V supply voltage drops
below 3.0 V, then the MAX
becomes:
(3.3 V supply voltage) + 0.5
Voltage on XTALIN -0.3 VDD33 V
USB251xB/xBi
DS00001692C-page 40 2010 - 2015 Microchip Technology Inc.
Note 6-2 The rise time for the 3.3 V supply can be extended to 100 ms max if RESET_N is actively driven
low, typically by another IC, until 1 s after all supplies are within operating range.
FIGURE 6-1: SUPPLY RISE TIME MODEL
TABLE 6-1: DC ELECTRICAL CHARACTERISTICS
Parameter Symbol MIN TYP MAX Units Comments
I, IS Type Input Buffer
Low Input Level VILI 0.8 V TTL Levels
High Input Level VIHI 2.0 V
Input Leakage IIL -10 +10 AV
IN = 0 to VDD33
Hysteresis (IS only) VHYSI 250 350 mV
Input Buffer with Pull-Up (IPU)
Low Input Level VILI 0.8 V TTL Levels
High Input Level VIHI 2.0 V
Low Input Leakage IILL +35 +90 AV
IN = 0
High Input Leakage IIHL -10 +10 AV
IN = VDD33
Input Buffer with Pull-Down (IPD)
Low Input Level VILI 0.8 V TTL Levels
High Input Level VIHI 2.0 V
Low Input Leakage IILL +10 -10 AV
IN = 0
High Input Leakage IIHL -35 -90 AV
IN = VDD33
USB251xB/xBi
ICLK Input Buffer
Low Input Level VILCK 0.3 V
High Input Level VIHCK 0.9 V
Input Leakage IIL -10 +10 AV
IN = 0 to VDD33
t10%
10%
90%
Voltage tRT33
t90% Time
100%
3.3 V
VSS
VDD33
2010 - 2015 Microchip Technology Inc. DS00001692C-page 41
USB251xB/xBi
Note 6-3 Output leakage is measured with the current pins in high impedance.
Note 6-4 See USB 2.0 Specification [1] for USB DC electrical characteristics.
O12, I/O12 & I/OSD12 Type Buffer
Low Output Level VOL 0.4 V IOL = 12 mA @
VDD33 = 3.3 V
High Output Level VOH 2.4 V IOH = -12 mA @
VDD33 = 3.3 V
Output Leakage IOL -10 +10 A
Hysteresis (SD pad only) IHYSC 250 350 mV VIN = VDD33
(Note 6-1)
TABLE 6-2: SUPPLY CURRENT UNCONFIGURED: HI-SPEED HOST (ICCINTHS)
Part MIN TYP MAX Units Comments
USB2512B/12Bi 40 45 mA
USB2513B/13Bi 40 45 mA
USB2514B/14Bi 45 50 mA
TABLE 6-3: SUPPLY CURRENT UNCONFIGURED: FULL-SPEED HOST (ICCINTFS)
Part MIN TYP MAX Units Comments
USB2512B/12Bi 35 40 mA
USB2513B/13Bi 35 40 mA
USB2514B/14Bi 35 40 mA
TABLE 6-4: SUPPLY CURRENT CONFIGURED: HI-SPEED HOST (IHCH1)
Part MIN TYP MAX Units Comments
USB2512B 60 65 mA
This is the base current
of one downstream port.
USB2512Bi 60 70 mA
USB2513B 65 70 mA
USB2513Bi 65 75 mA
USB2514B 70 80 mA
USB2514Bi 70 85 mA
USB251xB/xBi
Supply Current Configured
Hi-Speed Host, each additional downstream port
1 port
base
+
25 mA
1 port
base
+
25 mA
mA
TABLE 6-1: DC ELECTRICAL CHARACTERISTICS (CONTINUED)
Parameter Symbol MIN TYP MAX Units Comments
USB251xB/xBi
DS00001692C-page 42 2010 - 2015 Microchip Technology Inc.
Note 6-5 Capacitance TA = 25°C; fc = 1 MHz; VDD33 = 3.3 V
TABLE 6-5: SUPPLY CURRENT CONFIGURED: FULL-SPEED HOST (IFCC1)
Part MIN TYP MAX Units Comments
USB2512B 45 50 mA
Base current o f one do wnstream
port
USB2512Bi 45 55 mA
USB2513B 50 55 mA
USB2513Bi 50 60 mA
USB2514B 50 60 mA
USB2514Bi 50 65 mA
USB251xB/xBi
Supply Current Configured
Full-Speed Host, each additional
downstream port
1 port
base
+
8 mA
1 port
base
+
8 mA
mA
TABLE 6-6: SUPPLY CURRENT SUSPEND (ICSBY)
Part MIN TYP MAX Units Comments
USB2512B 475 1000 A
All supplies combined
USB2512Bi 475 1200 A
USB2513B 500 1100 A
USB2513Bi 500 1300 A
USB2514B 550 1200 A
USB2514Bi 550 1500 A
TABLE 6-7: SUPPLY CURRENT RESET (ICRST)
Part MIN TYP MAX Units Comments
USB2512B 550 1100 A
All supplies combined
USB2512Bi 550 1250 A
USB2513B 650 1200 A
USB2513Bi 650 1400 A
USB2514B 750 1400 A
USB2514Bi 750 1600 A
TABLE 6-8: PIN CAPACITANCE
Limits
Parameter Symbol MIN TYP MAX Unit Test Condition
Clock Input Capacitance CXTAL 6 pF All pins except USB pins and the pins
under the test tied to AC ground
Input Capacitance CIN 6pF(Note 6-5)
Output Capacitance COUT 6pF
2010 - 2015 Microchip Technology Inc. DS00001692C-page 43
USB251xB/xBi
6.2.1 PACKAGE THERMAL SPECIFICATIONS
Thermal parameters are measured or estimat ed for devices wi th the exposed pad soldered to t hermal vias in a multi-
layer 2S2P PCB per JESD51. Thermal resistance is measured from the die to the ambient air. The values provided are
based on the package body, die size, maximum power consumpti on, 85°C ambient temperat ure, and 125°C junction
temperature of the die.
Use the following formulas to calculate the junction temperature:
TJ = P x JA + TA
TJ = P x JT + TT
TJ = P x JC + TC
Max Power Supported = (TJ Max. Spec. x TAmb.)/ JA
Symbol USB2512B/12Bi USB2513B/13Bi
USB2514B/14Bi
(°C/W) Velocity (meters/s)
JA 40.1 0
35.0 1
JT 0.5 0
0.7 1
JC 6.3 0
6.3 1
TABLE 6-9: LEGEND
Symbol Description
TJJunction temperature
PPower dissipated
JA Junction-to-ambient-temperature
JC Junction-to-top-of-package
JT Junction-to-bottom-of-case
TAAmbient temperature
TCTemperature of the bottom of the case
TTTemperature of the top of the case
USB251xB/xBi
DS00001692C-page 44 2010 - 2015 Microchip Technology Inc.
7.0 AC SPECIFICATIONS
7.1 Oscillator/Crystal
Crystal: Parallel resonant, fundamental mode, 24 MHz 350 ppm.
Note 7-1 C0 is usually included (subtracted by the crystal manufacturer) in the specification for CL and should
be set to 0 for use in the calculation of the capacitance formulas in Figure 7-2. However, the PCB
itself may present a parasitic capacitance between XTALIN and XTALOUT. For an accurate
calculation of C1 and C2, take the parasitic capacitance between traces XTALIN a nd XTALOUT into
account.
Note 7-2 Each of these capacitance values is typically around 18 pF.
Note: The USB251xB/xBi contains an internal 1 M resistor between the XTALIN and XTALOUT pins.
FIGURE 7-1: TYPICAL CRYSTAL CIRCUIT
TABLE 7-1: CRYSTAL CIRCUIT LEGEND
Symbol Description In Accordance with
C0Crystal shunt capacitance Crystal manufacturer ’s specification (Note 7-1)
CLCrystal load capacitance
CBTotal board or trace capacitance OEM board design
CSStray capacitance Microchip IC and OEM board design
CXTAL XTAL pin input capacitance Microchip IC
C1Load capacitors installed on OEM
board Calculated values based on Figure 7-2 (Note 7-2)
C2
FIGURE 7-2: FORMULA TO FIND THE VALUE OF C1 AND C2
C1
C2
CL
Crystal
XTALOUT
(CS2 = CB2 + C XTAL2 )
XTALIN
(CS1 = CB1 + C XTAL1 )
C0
C1 = 2 x (CL – C0) – CS1
C2 = 2 x (CL – C0) – CS2
2010 - 2015 Microchip Technology Inc. DS00001692C-page 45
USB251xB/xBi
7.2 External Clock
50% duty cycle 10%, 24 MHz 350 ppm, jitter < 100 ps rms.
The external clock is recommended t o conform to the si gnaling level designated in the JESD76-2 Specificatio n [5] on
1.2 V CMOS Logic. XTALOUT should be treated as a weak (<1mA) buffer output.
7.2.1 SMBUS INT ERF ACE
The hub conforms to all voltage, power , and timing characteristics and specifications as set forth in the SMBus 1.0 Spec-
ification [3] for slave-only devices (except as noted in Section 5.3, "SMBus," on page 33.
7.2.2 I2C EEPROM
Clock frequency is fixed at 60 kHz 20
7.2.3 USB 2.0
The Microchip hub conforms to all voltage, power, and timing characteristics and specifi cations as set forth in the USB
2.0 Specification [1].
USB251xB/xBi
DS00001692C-page 46 2010 - 2015 Microchip Technology Inc.
8.0 PACKAGE MARKING INFORMATION
The following sub-section s detail the package marking informatio n for the 36-pin SQFN and 36-pin QFN packages. To
order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
8.1 36-Pin SQFN (Preferred)
*Standard device marking consists of Microchip part number, year code, week code and traceability code.
For device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office.
For QTP devices, any special marking adders are included in QTP price.
Legend: x USB251xB version (2 = 2-port, 3 = 3-port, 4 = 4-port)
iTemperature range designator (Blank = commercial, i = industrial)
R Product revision
nnn Internal code
e3 Pb-free JEDEC® designator for Matte Tin (Sn)
V Plant of assembly
COO Country of origin
YY Year code (last two digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Note: In the event the full Microchip part number cannot be marked on one line, it
will be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
Example
PIN 1 USB251xBi
Rnnn e3
VCOO
YYWWNNN
e3
PIN 1 USB2514Bi
D000 e3
ASETW
1501123
e3
36-Lead SQFN (6x6x0.9 mm)
2010 - 2015 Microchip Technology Inc. DS00001692C-page 47
USB251xB/xBi
8.2 36-Pin QFN (Legacy)
*Standard device marking consists of Microchip part number, year code, week code and traceabil ity code.
For device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office.
For QTP devices, any special marking adders are included in QTP price.
Legend: x USB251xB version (2 = 2-port, 3 = 3-port, 4 = 4-port)
iTemperature range designator: (Blank = commercial, i = industrial)
R Product revision
YY Year code (last two digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
A2P10 Internal code
NNN Alphanumeric traceability code
A Fixed character
V Plant of assembly
COO Country of origin
e3 Pb-free JEDEC® designator for Matte Tin (Sn)
Note: In the event the full Microchip part number cannot be marked on one line, it
will be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
Example
PIN 1
USB251xBi
RYYWW-A2P10
YWWNNNA
VCOO
e3 PIN 1
USB2514Bi
D1501-A2P10
501123A
ASETW
e3
36-Lead QFN (6x6x0.9 mm)
2010 - 2015 Microchip Technology Inc. DS00001692C-page 48
USB251XB/XBI
9.0 PACKAGE INFORMATION
9.1 36-Pin SQFN (Preferred)
FIGURE 9-1: 36-PIN SQFN PACKAGE DRAWING
Note: For the most current package drawings, see the Microchip Packaging Specification at http://www.microchip.com/packaging.
Note: For the most current package drawings,
see the Microchip Packaging Specification at
http://www.microchip.com/packaging
USB251XB/XBI
DS00001692C-page 49 2010 - 2015 Microchip Technology Inc.
9.2 36-Pin QFN (Legacy)
FIGURE 9-2: 36-PIN QFN PACKAGE DRAWING
USB251xB/xBi
DS00001692C-page 50 2010 - 2015 Microchip Technology Inc.
APPENDIX A: ACRONYMS
I2C: Inter-Integrated Circuit
OCS: Over-Current Sense
PCB: Printed Circuit Board
PHY: Physical Layer
PLL: Phase-Locked Loop
QFN: Quad Flat No Leads
RoHS: Restriction of Hazardous Substances Directive
SCL: Serial Clock
SIE: Serial Interface Engine
SMBus: System Management Bus
TT: Transaction Translator
2010 - 2015 Microchip Technology Inc. DS00001692C-page 51
USB251xB/xBi
APPENDIX B: REFERENCES
1. Universal Serial Bus Specification, Version 2.0, April 27, 2000 (12/7/2000 and 5/28/2002 Errata)
USB Implemen te rs Fo ru m, In c. http://www.usb.org
2. I2C-Bus Specification Version 1.1
NXP (formerly a division of Philips). http://www.nxp.com
3. System Management Bus Specification, version 1.0
SMBus. http://smbus.org/specs/
4. MicroChip 24AA02/24LC02B (Revision C)
Microchip Technology Inc. http://www.microchip.com/
5. JEDEC Specifications: JESD76-2 (June 2001) and J-STD-020D.1 (March 2008)
JEDEC Global Standards for the Microelectronics Industry. http://www.jedec.org/standards-documents
USB251xB/xBi
DS00001692C-page 52 2010 - 2015 Microchip Technology Inc.
APPENDIX C: DATA SHEET REVISION HISTORY
TABLE C-1: REVISION HISTORY
Revision Level & Date Section/Figure/Entry Correction
DS00001692C
(10-20-15) Product Identification System PIS ordering code information for preferred
package corrected to align with current Microchip
standard practices.
Section 8.0, "Packa ge Marking
Information" Top marking diagrams corrected to be consistent
with internal specifications and current physical
part markings.
DS00001692B
(08-12-15) All Added new 36-SQFN package option information
(drawings, ordering codes, top markings, etc.)
Cover, Product Identification
System Updated document with new ordering section.
Removed previous ordering section from cover.
Section 8.0, "Packa ge Marking
Information" Added new package marking chapter.
REV A REV A replaces previous SMSC version Rev. 2.4 (11-08-13).
Document is Microchip branded, mention of SMSC is removed.
Order numbers modified adding “G” or “C” as last character to suffix.
The following note added to Package Outline chapter:
“For the most current package drawings, see th e Microchi p Packag ing Specification
at http://www.microchip.com/packaging.”
Rev. 2.4 (11-08-13) Section 5.2.1, "I2C Slave
Address" Corrected slave address to “1010000b”.
Figure 3-1, Figure 3-2,
Figure 3-3, Table 3-1 Corrected pin 36 name (VDDA33).
Section 5.5.1.1, "RESET_N for
Strapping Option
Configuration"
Updated timing diagram and values. Changed t6,
t7, t8 name and ad ded new t9. Updated t5 and 78
values.
Section 5.5.1.2, "RESET_N for
EEPROM Configuration" Updated timing diagram and values. Changed t7,
t8, and t9 name and added new t10. Updated t5,
t6, and t9 values.
Section 5.5.1.3, "RESET_N for
SMBus Slave Configuration" Updated timing diagram and values. Changed t7,
t8, and t9 name and added new t10. Updated t5,
t6, and t9 values. Removed t5 “bus” and “self”
distinction.
Note 6-2 Added note regarding 3.3 V supply rise time.
Rev. 2.3 (06-11-13) Table 3-1, “USB251xB/xBi Pin
List (Alphabetical),” on
page 10
Corrected errant description “Server Message
Block” to “System Management Bus”.
Section 7.1,
"Oscillator/Crystal," on
page 44 and FIGURE 7-1:
Typical Crystal Circuit on
page 44
Updated figure to remove external 1 M
requirement. Added note indicating the device
includes and internal1 M resistor between the
XTALIN and XTALOUT pins.
FIGURE 3-3: USB2514B Pin
Diagram on page 9 Corrected typo on pin 6.
FIGURE 3-1: USB2512B Pin
Diagram on page 7 & Table 3-
1, “USB251xB/xBi Pin List
(Alphabetical),” on page 10
Added alternate port disable functions to pins 1-4
of the USB2512B.
Rev. 2.2 (02-17-12) Cover Updated clock bullet to remove reference to 48MHz
clock support.
2010 - 2015 Microchip Technology Inc. DS00001692C-page 53
USB251xB/xBi
Section 1.1, "Configurable
Features," on page 4 Updated bulleted lists. USB signal drive strength,
USB differential pair pin location and downstream
port power control / over-current detection items
moved from first (strap-con fi gurab le) bull et ed list to
the second (EEPROM-configurable) bulleted list.
Added enabling of battery charging to the first
bulleted list.
Section 3.1, "Pin
Configurations," on page 7 Clarified introductory sentence.
Table 3-2, “USB251xB/xBi Pin
Descriptions,” on page 12 Updated VBUS_DET buffer type to “I” and changed
description to: “For self-powered applications with a
permanently attached host, this pin must be
connected to a dedicated host control output, or
connected to the 3.3 V domain that powers the
host (typically VDD33).”
Table 3-2, “USB251xB/xBi Pin
Descriptions,” on page 12 Updated CRFILT and PLLFILT pin descriptions.
Section 7.1,
"Oscillator/Crystal," on
page 44
Removed redundant sentence: “External Clock:
50% duty cycle 10%, 24 /48 MHz 350 ppm, jitter
<100 ps rms”. This information is provided in
Section 7.2, "External Clock," on page 45.
Section 7.0, "AC
Specifications" Removed ceramic resonator information.
Section 7.2, "External Clock" Replaced “1.8 V CMOS Logic” with “1.2 V CMOS
Logic”. Updated XTALOUT description.
Section 3.3, "Pin Descriptions
(Grouped by Function)" Updated CRFILT and PLLFILT pin descriptions.
Cover, Package, All Removed the 49-BGA option.
Order Code Page Changed ordering codes for non-industrial
USB2513B and USB2514B. Last character was
changed from “G” to “C”.
Front page Removed support for ceramic resonator.
Rev. 2.1 (02-22-11) Section 6.2.1, Package
Thermal Specifications Added Max Power Supported = (TJ, max.spec. - Tamb)/ ΘJA
Rev. 2.0 (10-01-10) All General refresh, corre cted grammatical errors and
unified tone.
TABLE C-1: REVISION HISTORY (CONTINUED)
Revision Level & Date Section/Figure/Entry Correction
USB251xB/xBi
DS00001692C-page 54 2010 - 2015 Microchip Technology Inc.
THE MICROCHIP WEB SITE
Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make
files and information easily available to customers. Accessible by using your favorite Internet browser , the web site con-
tains the following information:
•Product Support – Data sheets and errata, application notes and sample programs, design resources, user’s
guides and hardware support documents, latest software releases and archived software
•General Technical Support – Frequently Asked Questions (FAQ), technical support requests, online discussion
groups, Microchip consultant program member listing
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CUSTOMER CHANGE NOTIFICATION SERVICE
Microchip’s customer notification service help s keep customers current on Microchip products. Subscribers will receive
e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or
development tool of interest.
To register, access the Micro chip web sit e at www.microchip.com. Under “Support”, cli c k on “Customer Ch ange Not if i-
cation” and follow t he registration instructions.
CUSTOMER SUPPORT
Users of Microchip products can receive assistance through several channels:
• Distributor or Representative
• Local Sales Office
• Field Application Engineer (FAE)
• Technical Support
Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales
offices are also available to help customers. A listing of sales offices and locations is included in the back of this docu-
ment.
Technical support is available through the web site at: http://www.microchip.com/support
2010 - 2015 Microchip Technology Inc. DS00001692C-page 55
USB251xB/xBi
PRODUCT IDENTIFICATION SYSTEM
The USB251xB/xBi is ava ilab le i n a 36-pi n SQFN (p re ferr ed) an d 36 -pin QFN (legacy) package. For new desi gns, t he
36-pin SQFN is recommended. The ordering code information varies dependent on the package selected. The following
sub-sections detail the product identification system for the 36-pin SQFN (preferred) and 32-pin QFN (legacy). To order
or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
36-Pin SQFN (Preferred)
36-Pin QFN (Legacy)
* Add “-TR” to the end of any QFN order number to order tape and reel. Reel size is 3,000 pieces.
Order Numbers*ROHS Compliant Package Package Size
(mm) Temperature Range
USB2512B-AEZG
USB2513B-AEZC
USB2514B-AEZC 36-QFN 6x6
0ºC to 85ºC
USB2512Bi-AEZG
USB2513Bi-AEZG
USB2514Bi-AEZG
-40ºC to 85ºC
Device: USB2512B = 2-Port USB 2.0 Hub
USB2513B = 3-Port USB 2.0 Hub
USB2514B = 4-Port USB 2.0 Hub
Tape and Reel
Option: Blank = Standard packaging (tray)
T = Tape and Reel (Note 1)
Te mperature
Range: Blank = 0C to +85C (Extended Commercial)
I= -40C to +85C (Industrial)
Package: M2 = 36-pin SQFN
Examples:
a) USB2512B/M2
2-Port USB hub, Tray, Extended com-
mercial temp, 36-pin SQFN
b) USB2514BT-I/M2
4-Port USB hub, Tape & reel, Industrial
temp., 36-pin SQFN
Note 1: Reel size is 3,000 pieces. Tape and
Reel identifier only appears in the
catalog part number description. This
identifier is used for ordering pur-
poses and is not printed on the
device package. Check with your
Microchip Sales Office for package
availability with the Tape and Reel
option.
PART NO.
Device Tape and Reel
Option
/
Temperature
Range
XX[X](1) [-X]
Package
DS00001692C-page 56 2010 - 2015 Microchip Technology Inc.
Information contained in this publication regarding device applications and the like is provided only for your convenience and may be super-
seded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REP-
RESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMA TION, INCLUDIN G BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,
MERCHANT ABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Micro-
chip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold
harmless Microchip from any and all damages, claim s, suits, or expenses result ing from such use. No licenses are conveyed, implicitly or
otherwise, under any Microchip intellectual property righ t s unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC, FlashFlex, flexPWR, JukeBlox, KEELOQ, KEELOQ logo, Kleer, LANCheck,
MediaLB, MOST, MOST logo, MPLAB, OptoL yzer , PIC, PICST ART, PIC32 logo, RightTouch, SpyNIC, SST, SST Logo, SuperFlash and
UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
The Embedded Control Solutions Company and mTouch are registered trademarks of Microchip Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, ECAN, In-Circuit Serial
Programming, ICSP, Inter-Chip Connectivity , KleerNet, KleerNet logo, MiWi, motorBench, MPASM, MPF , MPLAB Certified logo, MPLIB,
MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, RightTouch logo, REAL ICE,
SQI, Serial Quad I/O, Total Endurance, TSHARC, USBCheck, VariSense, V iewSpan, WiperLock, Wireless DNA, and ZENA are
trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in
other countries.
All other trademarks mentioned herein are property of their respective companies.
© 2010 - 2015, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
ISBN: 9781632778987
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection featur es of our
products. Attempts to break Microchip’ s code protection feature may be a violation of the Digita l Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:200 9 certif ication for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperi pherals, nonvola tile memo ry and
analog product s. In addition, Microchip ’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITYMANAGEMENTS
YSTEM
CERTIFIEDBYDNV
== ISO/TS16949==
DS00001692C-page 57 2010 - 2015 Microchip Technology Inc.
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07/14/15
