OPA548
VIN
–
VIN
+
V+
E/S
RCL
RCL sets the current limit
value from 0 to 5A.
(1/4W Resistor)
ILIM
VO
V–
High-Voltage, High-Current
OPERATIONAL AMPLIFIER
DESCRIPTION
The OPA548 is a low-cost, high-voltage/high-current opera-
tional amplifier ideal for driving a wide variety of loads. A
laser-trimmed monolithic integrated circuit provides excellent
low-level signal accuracy and high output voltage and cur-
rent.
The OPA548 operates from either single or dual supplies for
design flexibility. In single-supply operation, the input com-
mon-mode range extends below ground.
The OPA548 is internally protected against over-temperature
conditions and current overloads. In addition, the OPA548
was designed to provide an accurate, user-selected current
limit. Unlike other designs which use a “power” resistor in
series with the output current path, the OPA548 senses the
load indirectly. This allows the current limit to be adjusted
from 0A to 5A with a resistor/potentiometer or controlled
digitally with a voltage-out or current-out DAC.
The Enable/Status (E/S) pin provides two functions. An input
on the pin not only disables the output stage to effectively
disconnect the load, but also reduces the quiescent current
to conserve power. The E/S pin output can be monitored to
determine if the OPA548 is in thermal shutdown.
The OPA548 is available in an industry-standard
7-lead staggered and straight lead TO-220 package, and a
7-lead DDPAK surface-mount plastic power package. The
copper tab allows easy mounting to a heat sink or circuit
board for excellent thermal performance. It is specified for
operation over the extended industrial temperature range,
–40°C to +85°C. A SPICE macromodel is available for
design analysis.
FEATURES
●WIDE SUPPLY RANGE
Single Supply: +8V to +60V
Dual Supply: ±4V to ±30V
●HIGH OUTPUT CURRENT:
3A Continuous
5A Peak
●WIDE OUTPUT VOLTAGE SWING
●FULLY PROTECTED:
Thermal Shutdown
Adjustable Current Limit
●OUTPUT DISABLE CONTROL
●THERMAL SHUTDOWN INDICATOR
●HIGH SLEW RATE: 10V/µs
●LOW QUIESCENT CURRENT
●PACKAGES:
7-Lead TO-220, Zip and Straight Leads
7-Lead DDPAK Surface-Mount
APPLICATIONS
●VALVE, ACTUATOR DRIVERS
●SYNCHRO, SERVO DRIVERS
●POWER SUPPLIES
●TEST EQUIPMENT
●TRANSDUCER EXCITATION
●AUDIO AMPLIFIERS
OPA548
SBOS070B – OCTOBER 1997 – OCTOBER 2003
www.ti.com
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1997-2003, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
OPA548
OPA548
OPA548
OPA548
2SBOS070B
www.ti.com
ABSOLUTE MAXIMUM RATINGS(1)
Output Current ................................................................. See SOA Curve
Supply Voltage, V+ to V–................................................................... 60V
Input Voltage .................................................. (V–) – 0.5V to (V+) + 0.5V
Input Shutdown Voltage ........................................................................V+
Operating Temperature ..................................................–40°C to +125°C
Storage Temperature .....................................................–55°C to +125°C
Junction Temperature...................................................................... 150°C
Lead Temperature (soldering 10s)(2) .............................................. 300°C
Top Front View
PIN CONFIGURATIONS
NOTES: (1) Stresses above these ratings may cause permanent damage.
(2) Vapor-phase or IR reflow techniques are recommended for soldering the
OPA547F surface-mount package. Wave soldering is not recommended due to
excessive thermal shock and “shadowing” of nearby devices.
PACKAGE/ORDERING INFORMATION
For the most current package and ordering information, see the Package Ordering Addendum at the end of this data sheet.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
7-Lead
Straight-Formed
TO-220 (T-1)
NOTE: Tabs are electrically connected to the V– supply.
ILIMV–VO
V+
VIN–
VIN+
123456
E/S
7
7-Lead
DDPAK (FA)
Surface-Mount
ILIMV–VO
V+
VIN–
VIN+
123456
E/S
7
7-Lead
Stagger-Formed
TO-220 (T)
ILIMV–VO
V+
VIN–
VIN+
123456
E/S
7
OPA548 3
SBOS070B www.ti.com
ELECTRICAL CHARACTERISTICS
At TCASE = +25°C, VS = ±30V and E/S pin open, unless otherwise noted.
OPA548T, F
PARAMETER CONDITION MIN TYP MAX UNITS
OFFSET VOLTAGE
Input Offset Voltage VCM = 0, IO = 0 ±2±10 mV
vs Temperature TA = –40°C to +85°C±30 µV/°C
vs Power Supply VS = ±4V to ±30V 30 100 µV/V
INPUT BIAS CURRENT(1)
Input Bias Current(2) VCM = 0V –100 –500 nA
vs Temperature TA = –40°C to +85°C±0.5 nA/°C
Input Offset Current VCM = 0V ±5±50 nA
NOISE
Input Voltage Noise Density, f = 1kHz 90 nV/√Hz
Current Noise Density, f = 1kHz 200 fA/√Hz
INPUT VOLTAGE RANGE
Common-Mode Voltage Range: Positive Linear Operation (V+) – 3 (V+) – 2.3 V
Negative Linear Operation (V–) – 0.1 (V–) – 0.2 V
Common-Mode Rejection VCM = (V–) –0.1V to (V+) –3V 80 95 dB
INPUT IMPEDANCE
Differential 107 || 6 Ω || pF
Common-Mode 109 || 4 Ω || pF
OPEN-LOOP GAIN
Open-Loop Voltage Gain VO = ±25V, RL = 1kΩ90 98 dB
VO = ±25V, RL = 8Ω90 dB
FREQUENCY RESPONSE
Gain-Bandwidth Product RL = 8Ω1 MHz
Slew Rate G = 1, 50Vp-p, RL = 8Ω10 V/µs
Full-Power Bandwidth See Typical Characteristics kHz
Settling Time: ±0.1% G = –10, 50V Step 15 µs
Total Harmonic Distortion + Noise, f = 1kHz RL = 8Ω, G = +3, Power = 10W 0.02(3) %
OUTPUT
Voltage Output, Positive IO = 3A (V+) – 4.1 (V+) – 3.7 V
Negative IO = –3A (V–) + 3.7 (V–) + 3.3 V
Positive IO = 0.6A (V+) – 2.4 (V+) – 2.1 V
Negative IO = –0.6A (V–) + 1.3 (V–) + 1.0 V
Maximum Continuous Current Output: dc ±3A
ac 3 Arms
Leakage Current, Output Disabled, dc See Typical Characteristics
Output Current Limit
Current Limit Range 0 to ±5A
Current Limit Equation ILIM = (15000)(4.75)/(13750Ω + RCL)A
Current Limit Tolerance(1) RCL = 14.8kΩ (ILIM = ±2.5A), ±100 ±250 mA
RL = 8Ω
Capacitive Load Drive See Typical Characteristics(4)
OUTPUT ENABLE /STATUS (E/S) PIN
Shutdown Input Mode
VE/S HIGH (output enabled) E/S Pin Open or Forced High (V–) + 2.4 V
VE/S LOW (output disabled) E/S Pin Forced Low (V–) + 0.8 V
IE/S HIGH (output enabled) E/S Pin High –65 µA
IE/S LOW (output disabled) E/S Pin Low –70 µA
Output Disable Time 1µs
Output Enable Time 3µs
Thermal Shutdown Status Output
Normal Operation Sourcing 20µA(V–) + 2.4 (V–) + 3.5 V
Thermally Shutdown Sinking 5µA, TJ > 160°C(V–) + 0.35 (V–) + 0.8 V
Junction Temperature, Shutdown +160 °C
Reset from Shutdown +140 °C
POWER SUPPLY
Specified Voltage ±30 V
Operating Voltage Range ±4±30 V
Quiescent Current ILIM Connected to V–, IO = 0 ±17 ±20 mA
Quiescent Current, Shutdown Mode ILIM Connected to V–, IO = 0 ±6mA
TEMPERATURE RANGE
Specified Range –40 +85 °C
Operating Range –40 +125 °C
Storage Range –55 +125 °C
Thermal Resistance,
θ
JC
7-Lead DDPAK, 7-Lead TO-220 f > 50Hz 2 °C/W
7-Lead DDPAK, 7-Lead TO-220 dc 2.5 °C/W
Thermal Resistance,
θ
JA
7-Lead DDPAK, 7-Lead TO-220 No Heat Sink 65 °C/W
NOTES: (1) High-speed test at TJ = +25°C. (2) Positive conventional current flows into the input terminals. (3) See “Total Harmonic Distortion+Noise vs Frequency” in
the Typical Characteristics section for additional power levels. (4) See “Small-Signal Overshoot vs Load Capacitance” in the Typical Characteristics section.
OPA548
4SBOS070B
www.ti.com
TYPICAL CHARACTERISTICS
At TCASE = +25°C, VS = ±30V and E/S pin open, unless otherwise noted.
1 10 100 1k 10k 100k 1M 10M
100
80
60
40
20
0
–20
Gain (dB)
0
–45
–90
–135
–180
Phase (°)
Frequency (Hz)
OPEN-LOOP GAIN AND PHASE
vs FREQUENCY
φ
G
No
Load
RL = 8Ω
RL = 8ΩNo Load
0±5±10 ±15 ±20 ±25 ±30
±5
±4
±3
±2
±1
0
Current Limit (A)
Supply Voltage (V)
CURRENT LIMIT vs SUPPLY VOLTAGE
RCL = 4.02kΩ
RCL = 14.7kΩ
RCL = 57.6kΩ
–75 –50 –25 0 25 50 75 100 125
–160
–140
–120
–100
–80
–60
–40
Input Bias Current (nA)
Temperature (°C)
INPUT BIAS CURRENT vs TEMPERATURE
VS = ±5V
VS = ±30V
–30 –20 –100 102030
–200
–150
–100
–50
0
Input Bias Current (nA)
Common-Mode Voltage (V)
INPUT BIAS CURRENT
vs COMMON-MODE VOLTAGE
–75 –50 –25 0 25 50 75 100 125
±20
±18
±16
±14
±12
±10
±8
±6
±4
Quiescent Current (mA)
Temperature (°C)
QUIESCENT CURRENT vs TEMPERATURE
VS = ±5V
IQVS = ±30V
VS = ±5V
VS = ±30V
IQ Shutdown
–75 –50 –25 0 25 50 75 100 125
±5
±4
±3
±2
±1
0
Current Limit (A)
Temperature (°C)
CURRENT LIMIT vs TEMPERATURE
R
CL
= 4.02kΩ
R
CL
= 14.7kΩ
R
CL
= 57.6kΩ
+I
LIM
–I
LIM
OPA548 5
SBOS070B www.ti.com
TYPICAL CHARACTERISTICS (Cont.)
At TCASE = +25°C, VS = ±30V and E/S pin open, unless otherwise noted.
10 100 1k 10k 100k 1M
100
80
60
40
20
0
Common-Mode Rejection (dB)
Frequency (Hz)
COMMON-MODE REJECTION vs FREQUENCY
–75 –50 –25 0 25 50 75 100 125
1.25
1
0.75
0.5
0.25
0
13
12
11
10
9
8
Gain-Bandwidth Product (MHz)
Slew Rate (V/µs)
Temperature (°C)
GAIN-BANDWIDTH PRODUCT AND
SLEW RATE vs TEMPERATURE
SR+
SR–
GBW
1 10 100 1k 10k 100k 1M
500
400
300
200
100
0
Voltage Noise (nV/√Hz)
Frequency (Hz)
VOLTAGE NOISE DENSITY vs FREQUENCY
20 100 1k 10k 20k
1
0.1
0.01
0.001
THD+N (%)
Frequency (Hz)
TOTAL HARMONIC DISTORTION+NOISE
vs FREQUENCY
G = +3
RL = 8Ω
0.1W 1W
10W 20W
10 100 1k 10k 100k 1M
100
80
60
40
20
0
Power Supply Rejection (dB)
Frequency (Hz)
POWER-SUPPLY REJECTION
vs FREQUENCY
+PSRR
–PSRR
–75 –50 –25 0 25 50 75 100
A
OL
125
100
95
90
85
80
A
OL
, PSRR (dB)
110
105
100
95
90
CMRR (dB)
Temperature (°C)
OPEN-LOOP GAIN, COMMON-MODE REJECTION,
AND POWER-SUPPLY REJECTION vs TEMPERATURE
CMRR
PSRR
OPA548
6SBOS070B
www.ti.com
TYPICAL CHARACTERISTICS (Cont.)
At TCASE = +25°C, VS = ±30V and E/S pin open, unless otherwise noted.
0123 4
5
4
3
2
1
0
V
SUPPLY
– V
OUT
(V)
Output Current (A)
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
(V+) –V
O
(V–) –V
O
5
4
3
2
1
0
V
SUPPLY
– V
OUT
(V)
Temperature (°C)
OUTPUT VOLTAGE SWING vs TEMPERATURE
–75 –50 –25 0 25 50 75 100 125
I
O
= +3A
I
O
= –3A
I
O
= +0.6A
I
O
= –0.6A
1k 10k 100k 1M
30
25
20
15
10
5
0
Output Voltage (Vp)
Frequency (Hz)
MAXIMUM OUTPUT VOLTAGE SWING
vs FREQUENCY
Maximum Output
Voltage Without
Slew Rate Induced
Distortion
OFFSET VOLTAGE
PRODUCTION DISTRIBUTION
Percent of Amplifiers (%)
Offset Voltage (mV)
–10 –9–8–7–6–5–4–3–2–1012345678910
20
18
16
14
12
10
8
6
4
2
0
Typical distribution
of packaged units.
OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
Percent of Amplifiers (%)
Offset Voltage Drift (µV/°C)
14
12
10
8
6
4
2
0
Typical production
distribution of
packaged units.
010 20 30 40 50 60 70 80 90 100 110 120 130
–40 –30 –20 –10 0 10 20 4030
10
5
0
–5
–10
Leakage Current (mA)
Output Voltage (V)
OUTPUT LEAKAGE CURRENT
vs APPLIED OUTPUT VOLTAGE
RL = 8Ω
Output Disabled
VE/S < (V–) + 0.8V
RCL = ∞
RCL = 0
OPA548 7
SBOS070B www.ti.com
TYPICAL CHARACTERISTICS (Cont.)
At TCASE = +25°C, VS = ±30V and E/S pin open, unless otherwise noted.
0 2k 4k 6k 8k 10k 12k 14k 16k 18k 20k
50
40
30
20
10
0
Overshoot (%)
Load Capacitance (pF)
SMALL-SIGNAL OVERSHOOT
vs LOAD CAPACITANCE
G = –1
G = +1
SMALL-SIGNAL STEP RESPONSE
G = 3, CL = 1000pF
100mV/div
2µs/div
LARGE-SIGNAL STEP RESPONSE
G = 3, CL = 1000pF, RL = 8Ω
10V/div
5µs/div
SMALL-SIGNAL STEP RESPONSE
G = 1, CL = 1000pF
50mV/div
2µs/div
OPA548
8SBOS070B
www.ti.com
APPLICATIONS INFORMATION
Figure 1 shows the OPA548 connected as a basic noninverting
amplifier. The OPA548 can be used in virtually any op amp
configuration.
Power-supply terminals should be bypassed with low series
impedance capacitors. The technique shown in Figure 7,
using a ceramic and tantalum type in parallel is recom-
mended. In addition, we recommend a 0.01µF capacitor
between V+ and V– as close to the OPA548 as possible.
Power-supply wiring should have low series impedance.
With the OPA548, the simplest method for adjusting the
current limit uses a resistor or potentiometer connected
between the ILIM pin and V– according to the Equation 1:
RI
CL LIM
=
(
)
(
)
15000 4 75 13750
.–Ω
The low-level control signal (0µA to 330µA) also allows the
current limit to be digitally controlled.
See Figure 3 for a simplified schematic of the internal
circuitry used to set the current limit. Leaving the ILIM pin
open programs the output current to zero, while connecting
ILIM directly to V– programs the maximum output current limit,
typically 5A.
SAFE OPERATING AREA
Stress on the output transistors is determined both by the
output current and by the output voltage across the conduct-
ing output transistor, VS – VO. The power dissipated by the
output transistor is equal to the product of the output current
and the voltage across the conducting transistor, VS – VO.
The Safe Operating Area (SOA curve, Figure 2) shows the
permissible range of voltage and current.
FIGURE 1. Basic Circuit Connections.
POWER SUPPLIES
The OPA548 operates from single (+8V to +60V) or dual
(±4V to ±30V) supplies with excellent performance. Most
behavior remains unchanged throughout the full operating
voltage range. Parameters which vary significantly with oper-
ating voltage are shown in the typical characteristic curves.
Some applications do not require equal positive and negative
output voltage swing. Power-supply voltages do not need to
be equal. The OPA548 can operate with as little as 8V
between the supplies and with up to 60V between the
supplies. For example, the positive supply could be set to
55V with the negative supply at –5V, or vice-versa.
ADJUSTABLE CURRENT LIMIT
The OPA548 features an accurate, user-selected current
limit. Current limit is set from 0A to 5A by controlling the input
to the ILIM pin. Unlike other designs which use a power
resistor in series with the output current path, the OPA548
senses the load indirectly. This allows the current limit to be
set with a 0µA to 330µA control signal. In contrast, other
designs require a limiting resistor to handle the full output
current (5A in this case).
FIGURE 2. Safe Operating Area.
The safe output current decreases as VS – VO increases.
Output short-circuits are a very demanding case for SOA. A
short-circuit to ground forces the full power-supply voltage
(V+ or V–) across the conducting transistor. Increasing the
case temperature reduces the safe output current that can be
tolerated without activating the thermal shutdown circuit of
the OPA548. For further insight on SOA, consult Application
Bulletin SBOA022.
AMPLIFIER MOUNTING
Figure 4 provides recommended solder footprints for both the
TO-220 and DDPAK power packages. The tab of both pack-
ages is electrically connected to the negative supply, V–. It may
be desirable to isolate the tab of the TO-220 package from its
G = 1+
R
2
R
1
Z
L
E/S
3
7
5
2
14
6
R
2
I
LIM(1)
R
1
0.1µF
(2)
10µF
OPA548
V–
V+
+
+
V
IN
10µF
0.1µF
(2)
0.01µF
(2)
V
O
NOTES: (1) I
LIM
connected to V– gives the maximum
current limit, 5A (peak). (2) Connect capacitors directly to
package power-supply pins.
12 510
V
S
– V
O
(V)
20 50 100
SAFE OPERATING AREA
10
1
Output Current (A)
0.1
Pulse Operation Only
(Limit rms current to ≤ 3A)
Current-Limited
Output current can
be limited to less
than 3A—see text.
T
C
= 125°C
T
C
= 85°C
T
C
= 25°C
PD = 50W
PD = 26W
PD = 10W
(1)
OPA548 9
SBOS070B www.ti.com
DDPAK-7(1)
(Package Designator KTW)
TO220-7
(Package Designator KVT)
NOTE: (1) For improved thermal performance increase footprint area.
See Figure 6, “Thermal Resistance vs Circuit Board Copper Area”.
Mean dimensions in inches. Refer to end of data sheet
or www.ti.com for tolerances and detailed package
drawings.
0.335
0.15
0.05
0.45
0.51
0.105 0.05 0.035
0.04
0.2
0.085
heat dissipation. See Figure 6 for typical thermal resistance
from junction-to-ambient as a function of the copper area.
POWER DISSIPATION
Power dissipation depends on power supply, signal, and load
conditions. For dc signals, power dissipation is equal to
the product of output current times the voltage across the
mounting surface with a mica (or other film) insulator (see
Figure 5). For lowest overall thermal resistance it is best to
isolate the entire heat sink/OPA548 structure from the mount-
ing surface rather than to use an insulator between the
semiconductor and heat sink.
For best thermal performance, the tab of the DDPAK sur-
face-mount version should be soldered directly to a circuit
board copper area. Increasing the copper area improves
13750Ω
RCL 0.01µF
(optional, for noisy
environments)
3
4
3
4
4.75V
RCL = – 13750Ω
OPA547 CURRENT LIMIT: 0 to 5A
NOTE: (1) Resistors are nearest standard 1% values.
DESIRED
CURRENT LIMIT
0A
1A
2.5A
3A
4A
5A
RESISTOR(1)
(RCL)
ILIM Open
57.6kΩ
14.7kΩ
10kΩ
4.02kΩ
ILIM Connected to V–
CURRENT
(ISET)
0µA
67µA
167µA
200µA
267µA
333µA
VOLTAGE
(VSET)
(V–) + 4.75V
(V–) + 3.8V
(V–) + 2.5V
(V–) + 2V
(V–) + 1.1V
(V–)
RESISTOR METHOD
15000 (4.75V)
ILIM
V–
13750Ω
ISET = ILIM /15000
VSET = (V–) + 4.75V – (13750Ω) (ILIM)/15000
DAC METHOD (Current or Voltage)
V–
D/A
ISET
4.75V
±ILIM =
Max IO = ILIM
(4.75) (15000)
13750Ω + RCL
Max IO = ILIM
±ILIM =15000 ISET
FIGURE 3. Adjustable Current Limit.
FIGURE 4. TO-220 and DDPAK Solder Footprints.
OPA548
10 SBOS070B
www.ti.com
THERMAL RESISTANCE vs
CIRCUIT BOARD COPPER AREA
50
40
30
20
10
0
Thermal Resistance, θ
JA
(°C/W)
012345
Copper Area (inches
2
)
OPA548F
Surface Mount Package
1oz copper
Circuit Board Copper Area
OPA548
Surface-Mount Package
FIGURE 5. TO-220 Thermal Resistance vs Aluminum Plate Area.
FIGURE 6. DDPAK Thermal Resistance vs Circuit Board Copper Area.
conducting output transistor. Power dissipation can be mini-
mized by using the lowest possible power-supply voltage
necessary to assure the required output voltage swing.
For resistive loads, the maximum power dissipation occurs at
a dc output voltage of one-half the power-supply voltage.
Dissipation with ac signals is lower. Application Bulletin
SBOA022 explains how to calculate or measure power
dissipation with unusual signals and loads.
THERMAL PROTECTION
Power dissipated in the OPA548 will cause the junction
temperature to rise. The OPA548 has thermal shutdown
circuitry that protects the amplifier from damage. The thermal
protection circuitry disables the output when the junction
temperature reaches approximately 160°C, allowing the de-
vice to cool. When the junction temperature cools to approxi-
mately 140°C, the output circuitry is again enabled. Depend-
ing on load and signal conditions, the thermal protection
circuit may cycle on and off. This limits the dissipation of the
amplifier but may have an undesirable effect on the load.
Any tendency to activate the thermal protection circuit indi-
cates excessive power dissipation or an inadequate heat
sink. For reliable operation, junction temperature should be
limited to 125°C, maximum. To estimate the margin of safety
in a complete design (including heat sink) increase the
ambient temperature until the thermal protection is triggered.
Use worst-case load and signal conditions. For good reliabil-
ity, thermal protection should trigger more than 35°C above
the maximum expected ambient condition of your applica-
tion. This produces a junction temperature of 125°C at the
maximum expected ambient condition.
The internal protection circuitry of the OPA548 was designed
to protect against overload conditions. It was not intended to
replace proper heat sinking. Continuously running the OPA548
into thermal shutdown will degrade reliability.
012345678
18
16
14
12
10
8
Thermal Resistance
JA
(°C/W)
Aluminum Plate Area (inches
2
)
THERMAL RESISTANCE
vs ALUMINUM PLATE AREA Aluminum Plate Area
Flat, Rectangular
Aluminum Plate
OPA548
TO220 Package
θ
0.030in Al
0.062in Al
0.050in Al
Vertically Mounted
in Free Air
Optional mica or film insulator
for electrical isolation. Adds
approximately 1°C/W.
Aluminum
Plate Thickness
OPA548 11
SBOS070B www.ti.com
HEAT SINKING
Most applications require a heat sink to assure that the
maximum operating junction temperature (125°C) is not
exceeded. In addition, the junction temperature should be
kept as low as possible for increased reliability. Junction
temperature can be determined according to the equation:
TJ = TA + PD
θ
JA (1)
where,
θ
JA =
θ
JC +
θ
CH +
θ
HA (2)
TJ = Junction Temperature (°C)
TA = Ambient Temperature (°C)
PD = Power Dissipated (W)
θ
JC = Junction-to-Case Thermal Resistance (°C/W)
θ
CH = Case-to-Heat Sink Thermal Resistance (°C/W)
θ
HA =
Heat Sink-to-Ambient Thermal Resistance (°C/W)
θ
JA = Junction-to-Air Thermal Resistance (°C/W)
Figure 7 shows maximum power dissipation versus ambient
temperature with and without the use of a heat sink. Using a
heat sink significantly increases the maximum power dissipa-
tion at a given ambient temperature as shown.
The difficulty in selecting the heat sink required lies in
determining the power dissipated by the OPA548. For dc
output into a purely resistive load, power dissipation is simply
the load current times the voltage developed across the
conducting output transistor, PD = IL(VS–VO). Other loads are
not as simple. Consult Application Bulletin SBOA022 for
further insight on calculating power dissipation. Once power
dissipation for an application is known, the proper heat sink
can be selected.
Combining equations (1) and (2) gives:
TJ = TA + PD(
θ
JC +
θ
CH +
θ
HA) (3)
TJ, TA, and PD are given.
θ
JC is provided in the specification
table, 2.5°C/W (dc).
θ
CH can be obtained from the heat sink
manufacturer. Its value depends on heat sink size, area, and
material used. Semiconductor package type, mounting screw
torque, insulating material used (if any), and thermal
joint compound used (if any) also affect
θ
CH. A typical
θ
CH for
a TO-220 mounted package is 1°C/W. Now we can solve for
θ
HA:
θθθ
θ
HA JA
DJC CH
HA
TT
PCC
WCW CW CW
=+
(
)
=°° °+°
(
)
=°
––
––./ / ./
125 40
525 1 135
To maintain junction temperature below 125°C, the heat sink
selected must have a
θ
HA less than 14°C/W. In other words,
the heat sink temperature rise above ambient must be less
than 67.5°C (13.5°C/W • 5W). For example, at 5W Thermalloy
model number 6030B has a heat sink temperature rise of
66°C above ambient (
θ
HA = 66°C/5W = 13.2°C/W), which is
below the 67.5°C required in this example. Figure 7 shows
power dissipation versus ambient temperature for a TO-220
package with a 6030B heat sink.
Another variable to consider is natural convection versus
forced convection air flow. Forced-air cooling by a small fan
can lower
θ
CA (
θ
CH +
θ
HA) dramatically. Heat sink manufac-
tures provide thermal data for both of these cases. For
additional information on determining heat sink requirements,
consult Application Bulletin SBOA021.
As mentioned earlier, once a heat sink has been selected,
the complete design should be tested under worst-case load
and signal conditions to ensure proper thermal protection.
ENABLE/STATUS (E/S) PIN
The Enable/Status pin provides two functions: forcing this pin
LOW disables the output stage, or E/S can be monitored to
determine if the OPA548 is in thermal shutdown. One or both
of these functions can be utilized on the same device using
single or dual supplies. For normal operation (output en-
abled), the E/S pin can be left open or pulled HIGH (at least
2.4V above the negative rail). A small value capacitor con-
nected between the E/S pin and V– may be required for noisy
applications.
Output Disable
A unique feature of the OPA548 is its output disable capabil-
ity. This function not only conserves power during idle peri-
ods (quiescent current drops to approximately 6mA), but also
allows multiplexing in low frequency (f < 20kHz), multichan-
nel applications. Signals greater than 20kHz may cause
leakage current to increase in devices that are shutdown.
Figure 18 shows the two OPA548s in a switched amplifier
configuration. The on/off state of the two amplifiers is con-
trolled by the voltage on the E/S pin.
Heat Sink Selection Example
A TO-220 package is dissipating 5W. The maximum ex-
pected ambient temperature is 40°C. Find the proper heat
sink to keep the junction temperature below 125°C (150°C
minus 25°C safety margin).
FIGURE 7. Maximum Power Dissipation vs Ambient
Temperature.
10
8
6
4
2
0
Power Dissipation (Watts)
0 25 50 75 100 125
Ambient Temperature (°C)
MAXIMUM POWER DISSIPATION
vs AMBIENT TEMPERATURE
TO220 with Thermalloy
6030B Heat Sink
JA
= 16.7°C/W
PD = (TJ (max) – TA) /
JA
TJ (max) = 150°C
With infinite heat sink
( JA = 2.5°C/W),
max PD = 50W at TA = 25°C.
θ
θ
DDPAK
JA
= 26°C/W
(3 in
2
one oz
copper mounting pad)
θ
DDPAK or TO-220
JA
= 65°C/W (no heat sink)
θ
θ
OPA548
12 SBOS070B
www.ti.com
To disable the output, the E/S pin is pulled LOW, no greater
than 0.8V above the negative rail. Typically the output is
shutdown in 1µs. Figure 8 provides an example of how to
implement this function using a single supply. Figure 9 gives
a circuit for dual-supply applications. To return the output to an
enabled state, the E/S pin should be disconnected (open) or
pulled to at least (V–) + 2.4V. It should be noted that pulling the
E/S pin HIGH (output enabled) does not disable internal
thermal shutdown.
Output Disable and Thermal Shutdown Status
As mentioned earlier, the OPA548’s output can be disabled
and the disable status can be monitored simultaneously.
Figures 12 and 13 provide examples interfacing to the E/S
pin while using a single supply and dual supplies, respec-
tively.
OUTPUT STAGE COMPENSATION
The complex load impedances common in power op amp
applications can cause output stage instability. For normal
operation output compensation circuitry is typically not re-
quired. However, if the OPA548 is intended to be driven into
current limit, an R/C network may be required. See Figure 14
for an output series R/C compensation (snubber) network
which generally provides excellent stability.
A snubber circuit may also enhance stability when driving
large capacitive loads (> 1000pF) or inductive loads (motors,
loads separated from the amplifier by long cables). Typically
3Ω to 10Ω in series with 0.01µF to 0.1µF is adequate. Some
variations in circuit value may be required with certain loads.
OUTPUT PROTECTION
Reactive and EMF-generating loads can return load cur-
rent to the amplifier, causing the output voltage to exceed
the power-supply voltage. This damaging condition can be
FIGURE 11. Thermal Shutdown Status with Dual Supplies.
FIGURE 10. Thermal Shutdown Status with a Single Supply.
OPA548
V+
E/S
V–
1kΩ
5V
22kΩ
470Ω
2N3906
Zetex
ZVN3310
OPA548
V+
E/S
V–
CMOS or TTL
OPA548
V+
E/S
HCT
OR
TTL
2.49kΩ
Zetex
ZVN3310
5V
V–
Thermal Shutdown Status
Internal thermal shutdown circuitry shuts down the output when
the die temperature reaches approximately 160°C, resetting
when the die has cooled to 140°C. The E/S pin can be
monitored to determine if shutdown has occurred. During
normal operation the voltage on the E/S pin is typically 3.5V
above the negative rail. Once shutdown has occurred, this
voltage drops to approximately 350mV above the negative rail.
Figure 10 gives an example of monitoring shutdown in a
single-supply application. Figure 11 provides a circuit for dual
supplies. External logic circuitry or an LED could be used to
indicate if the output has been thermally shutdown, see
Figure 16.
FIGURE 9. Output Disable with Dual Supplies.
OPA548
V+
E/S
V–
NOTE: (1) Optional—may be required to limit leakage
current of optocoupler at high temperatures.
(1)
61
1
4N38
Optocoupler
5
4HCT or TTL In
5V
FIGURE 8. Output Disable with a Single Supply.
OPA548 13
SBOS070B www.ti.com
avoided with clamp diodes from the output terminal to the
power supplies, as shown in Figure 14. Schottky rectifier
diodes with a 5A or greater continuous rating are recom-
mended.
VOLTAGE SOURCE APPLICATION
Figure 15 illustrates how to use the OPA548 to provide an
accurate voltage source with only three external resistors.
First, the current limit resistor, RCL, is chosen according to
the desired output current. The resulting voltage at the ILIM
pin is constant and stable over temperature. This voltage,
VCL, is connected to the noninverting input of the op amp and
used as a voltage reference, thus eliminating the need for an
external reference. The feedback resistors are selected to
gain VCL to the desired output voltage level.
PROGRAMMABLE POWER SUPPLY
A programmable source/sink power supply can easily be
built using the OPA548. Both the output voltage and output
current are user-controlled. See Figure 16 for a circuit using
potentiometers to adjust the output voltage and current while
Figure 17 uses DACs. An LED tied to the E/S pin through a
logic gate indicates if the OPA548 is in thermal shutdown.
FIGURE 13. Output Disable and Thermal Shutdown Status with Dual Supplies.
FIGURE 12. Output Disable and Thermal Shutdown Status
with a Single Supply. FIGURE 14. Motor Drive Circuit.
OPA548
V+
E/S
Open Drain
(Output Disable) HCT
(Thermal Status
Shutdown)
V–
OPA548
V+
E/S
NOTE: (1) Optional—may be required to limit leakage
current of optocoupler at high temperatures.
V–
(1)
6
1
2
4N38
Optocoupler
5
4
HCT or TTL In
5V 6
2
1
4N38
Optocoupler
5
4
Zetex
ZVN3310
TTL Out
7.5kΩ
1W
5V
G = – = –4
R2
R1
10Ω
(Carbon)
0.01µF
R2
20kΩ
R1
5kΩ
OPA548
V–
V+
VIN
Motor
D1
D2
D1, D2 : Motorola MUR410.
OPA548
14 SBOS070B
www.ti.com
G = 1 + = 10
9kΩ
1kΩ
9kΩ1kΩ
OPA548
+30V
+5V
+5V
0.12V to 2.5V
0V to 4.75V
Output
Adjust
V+
56
Thermal
Shutdown Status
NOTES: (1) For V
O
≤ 0V, V– ≤ –1V.
(2) Optional: Improves noise
immunity.
(LED)
74HCT04 R ≥ 250Ω
E/S V
O
= 1.2V to 25V
(1)
I
O
= 0 to 5A
7
4
3
1
2
V–
I
LIM
10.5kΩ
499Ω
10kΩ
Current
Limit
Adjust
1kΩ
20kΩ0.01µF
(2)
V–
13750Ω
RCL
ILIM
0.01µF
(Optional, for noisy
environments)
4.75V
IO =15000 (4.75V)
13750Ω + RCL
VO = VCL (1 + R2/R1)
V–
V+
VCL
VCL = = 2V
Desired VO = 20V,
R1 = 1kΩ and R2 = 9kΩ
G = = 10
20
2
For Example:
10kΩ • 4.75V
(10kΩ + 13750Ω)
If ILIM = 3A, RCL = 10kΩ
R2
R1
Uses voltage developed at ILIM pin
as a moderately accurate reference
voltage.
FIGURE 16. Resistor-Controlled Programmable Power Supply.
FIGURE 15. Voltage Source.
OPA548 15
SBOS070B www.ti.com
( )
E/S
R2
R1
VIN1
AMP1
VO
E/S
R4
R3
VE/S > (V–) +2.4V: Amp 1 is on, Amp 2 if off
VO = –VIN1 R2
R1
VE/S VIN2
AMP2
( )
VE/S < (V–) +2.4V: Amp 2 is on, Amp 1 if off
VO = –VIN2 R4
R3
OPA548
R
CL2
R
CL1
Close for high current
(Could be open drain
output of a logic gate).
I
LIM
V–
FIGURE 19. Multiple Current Limit Values.
FIGURE 20. Single Quadrant V • I Limiting.
FIGURE 17. Digitally-Controlled Programmable Power Supply.
OPA548 VO
ILIM
RCL
As VO increases,
ILIM decreases.
FIGURE 18. Switched Amplifier.
DAC B
1/2 DAC7800/1/2
(3)
1/2 DAC7800/1/2
(3)
10pF
I
OUT B
R
FB B
AGND B 0.01µF
(2)
I
LIM
Thermal
Shutdown Status (LED)
74HCT04 R ≥ 250Ω
9kΩ1kΩ
V
O
= 0.8 to 25V
(1)
I
O
= 0 to 5A
G = 10
V–
E/S
DAC A
+5V
+5V
V
REF B
DGND
10pF
I
OUT A
R
FB A
OUTPUT ADJUST
OPA548
CURRENT LIMIT ADJUST
AGND A
+30V
V
REF A
NOTES: (1) For V
O
≤ 0V, V– ≤ –1V. (2) Optional, improves noise immunity. (3) Chose DAC780X based on
digital interface: DAC7800—12-bit interface, DAC7801—8-bit interface + 4 bits, DAC7802—serial
interface.
1/2
OPA2336
1/2
OPA2336
V
REF
–5V
OPA548
16 SBOS070B
www.ti.com
I
LIM
V–
V+
R
1
1kΩR
2
4kΩ
OPA548
OPA548
V
O
I
O
= 10A (peak)
(2)
G
= 1 + = 5
(1)
V
IN
800Ω
800Ω
0.25Ω4kΩ
1kΩ
0.25Ω
NOTES: (1) Works well for G < 10. Input offset causes output current to flow between amplifiers
with G > 10. Gains (resistor ratios) of the two amplifiers should be carefully matched to ensure
equal current sharing. (2) As configured (I
LIM
connected to V–) output current limit is set to 10A
(peak). Each amplifier is limited to 5A (peak). Other current limit values may be obtained, see
Figure 3, “Adjustable Current Limit”.
I
LIM
V–
V+
R
3
1kΩR
4
4kΩ
FIGURE 21. Parallel Output for Increased Output Current.
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
OPA548F OBSOLETE DDPAK KTW 7 TBD Call TI Call TI
OPA548F/500 ACTIVE DDPAK KTW 7 500 Green (RoHS &
no Sb/Br) CU SN Level-2-260C-1 YEAR
OPA548F/500G3 ACTIVE DDPAK KTW 7 500 Green (RoHS &
no Sb/Br) CU SN Level-2-260C-1 YEAR
OPA548FKTWT ACTIVE DDPAK KTW 7 50 Green (RoHS &
no Sb/Br) CU SN Level-2-260C-1 YEAR
OPA548FKTWTG3 ACTIVE DDPAK KTW 7 50 Green (RoHS &
no Sb/Br) CU SN Level-2-260C-1 YEAR
OPA548T ACTIVE TO-220 KVT 7 50 Green (RoHS &
no Sb/Br) CU SN N / A for Pkg Type
OPA548T-1 ACTIVE TO-220 KC 7 50 Green (RoHS &
no Sb/Br) CU SN N / A for Pkg Type
OPA548T-1G3 ACTIVE TO-220 KC 7 50 Green (RoHS &
no Sb/Br) CU SN N / A for Pkg Type
OPA548TG3 ACTIVE TO-220 KVT 7 50 Green (RoHS &
no Sb/Br) CU SN N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 18-Sep-2008
Addendum-Page 1
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
OPA548FKTWT DDPAK KTW 7 50 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
OPA548FKTWT DDPAK KTW 7 50 367.0 367.0 45.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
MECHANICAL DATA
MPSF015 – AUGUST 2001
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
KTW (R-PSFM-G7) PLASTIC FLANGE-MOUNT
0.010 (0,25) AM
4201284/A 08/01
0.385 (9,78)
0.410 (10,41)
MM
BC
–A– 0.006
–B–
0.170 (4,32)
0.183 (4,65)
0.000 (0,00)
0.012 (0,305)
0.104 (2,64)
0.096 (2,44)
0.034 (0,86)
0.022 (0,57)
0.050 (1,27)
0.055 (1,40)
0.045 (1,14)
0.014 (0,36)
0.026 (0,66)
0.330 (8,38)
0.370 (9,40)
0.297 (7,54)
0.303 (7,70)
0.0585 (1,485)
0.0625 (1,587)
0.595 (15,1 1)
0.605 (15,37)
0.019 (0,48)
0.017 (0,43)
0°~3°
0.179 (4,55)
0.187 (4,75)
0.056 (1,42)
0.064 (1,63)
0.296 (7,52)
0.304 (7,72)
0.300 (7,62)
0.252 (6,40)
F
C
C
H
H
H
C
A
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Lead width and height dimensions apply to the
plated lead.
D. Leads are not allowed above the Datum B.
E. Stand–of f height is measured from lead tip
with reference to Datum B.
F. Lead width dimension does not include dambar
protrusion. Allowable dambar protrusion shall not
cause the lead width to exceed the maximum
dimension by more than 0.003”.
G. Cross–hatch indicates exposed metal surface.
H. Falls within JEDEC MO–169 with the exception
of the dimensions indicated.
MECHANICAL DATA
MSOT010 – OCTOBER 1994
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
KC (R-PSFM-T7) PLASTIC FLANGE-MOUNT PACKAGE
4040251/B 01/95
0.420 (10,67)
0.055 (1,40)
0.335 (8,51)
0.030 (0,76)
0.026 (0,66)
0.380 (9,65)
0.325 (8,25)
0.045 (1,14)
0.113 (2,87)
0.103 (2,62)
0.146 (3,71)
0.156 (3,96)
0.122 (3,10)
0.102 (2,59)
DIA
(see Note C)
0.125 (3,18)
0.137 (3,48)
0.147 (3,73)
1.020 (25,91)
1.000 (25,40)
0.175 (4,46)
0.185 (4,70)
17
0.050 (1,27)
0.300 (7,62) 0.025 (0,64)
0.012 (0,30)
M
0.010 (0,25)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Lead dimensions are not controlled within this area.
D. All lead dimensions apply before solder dip.
E. The center lead is in electrical contact with the mounting tab.
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