© 2000 Fairchild Semiconductor Corporation DS006439 www .fairchildsemi.com
August 1986
Revised March 2000
DM74LS00 Quad 2-Input NAND Gate
DM74LS00
Quad 2-Input NAND Gate
General Descript ion
This device contains four independent gates each of which
performs the logic NAND function.
Ordering Code:
Devices also available in Tape and Ree l. S pecify by ap pending the suffix let t er “X” to the o rdering c ode.
Connection Diagram Function Table
Y = AB
H = HIGH Logic Lev el
L = LOW Lo gic Level
Order Number Package Number Package Description
DM74LS00M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
DM74LS00SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74LS00N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs Output
ABY
LLH
LHH
HLH
HHL
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DM74LS00
Absolute Maximum Ratings(N o te 1) Note 1: The “Absolute Maximum Ratings” are those values beyond which
the saf ety of the device cannot be guarante ed. The device s hould not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Re comme nded Operat ing Co ndition s” table will define the cond itions
for actu al device operation.
Recommended Operating Conditions
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Note 2: All typic als are at VCC = 5V, TA = 25°C.
Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Switching Characteri stics
at VCC = 5V and TA = 25°C
Supply Voltage 7V
Input Vol tag e 7V
Operating Free Air Temperature Range 0°C to +70°C
Storage Temperature Range 65°C to +150°C
Symbol Parameter Min Nom Max Units
VCC Supply Voltage 4.75 5 5.25 V
VIH HIGH Level Input Voltage 2 V
VIL LOW Level Input Voltage 0.8 V
IOH HIGH Level Output Current 0.4 mA
IOL LOW Level Ou tput Current 8 mA
TAFree Air Operating Temperature 0 70 °C
Symbol Parameter Conditions Min Typ Max Units
(Note 2)
VIInput Clamp Voltage VCC = Min, II = 18 mA 1.5 V
VOH HIGH Level VCC = Min, I OH = Max, 2.7 3.4 V
Output Voltage VIL = Max
VOL LOW Level VCC = Min, IOL = Max, 0.35 0.5
Output Voltage VIH = Min V
IOL = 4 mA, VCC = Min 0.25 0.4
IIInput Current @ Max Input Voltage VCC = Max, VI = 7V 0.1 mA
IIH HIGH Level Input Curre nt VCC = Max, VI = 2.7V 20 µA
IIL LOW Level Input Current VCC = Max, VI = 0.4V 0.36 mA
IOS Short Circuit Output Current VCC = Max (Note 3) 20 100 mA
ICCH Supply Current with Outputs HIGH VCC = Max 0.8 1.6 mA
ICCL Supply Current with Outputs LOW VCC = Max 2.4 4.4 mA
RL = 2 k
Symbol Parameter CL = 15 pF CL = 50 pF Units
Min Max Min Max
tPLH Propagation Delay Time 310415ns
LOW-to-HIGH Level Output
tPHL Propagation Delay Time 310415ns
HIGH-to-LOW Level Output
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DM74LS00
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
Package Number M14A
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DM74LS00
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Sma ll Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
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DM74LS00 Quad 2-Input NAND Gate
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Packag e Num be r N14A
Fairchild does not assume any responsibility for use of any circu itry d escribed, no circuit patent licenses are im plied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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to perform when properly used in accordance with
instruct ions fo r use pr ovi de d in the labe l ing, can be re a-
sonably expected to result in a significant injury to the
user.
2. A criti cal com ponen t in any compo nent o f a l ife supp ort
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device or system, or to affect its safety or effectiveness.
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