DS26C31MQML www.ti.com SNOSAS2A - OCTOBER 2010 - REVISED APRIL 2013 DS26C31MQML CMOS Quad TRI-STATE Differential Line Driver Check for Samples: DS26C31MQML FEATURES DESCRIPTION * * * The DS26C31 is a quad differential line driver designed for digital data transmission over balanced lines. The DS26C31 meets all the requirements of EIA standard RS-422 while retaining the low power characteristics of CMOS. The DS26C31 is compatible with EIA standard RS-422; however, one exception in test methodology is taken. This enables the construction of serial and terminal interfaces while maintaining minimal power consumption. 1 2 * * * TTL Input Compatible Outputs Will Not Load Line When VCC = 0V Meets the Requirements of EIA Standard RS422 Operation from Single 5V Supply TRI-STATE Outputs for Connection to System Buses Low Quiescent Current The DS26C31 accepts TTL or CMOS input levels and translates these to RS-422 output levels. This part uses special output circuitry that enables the drivers to power down without loading down the bus. This device has enable and disable circuitry common to all four drivers. The DS26C31 is pin compatible to the AM26LS31 and the DS26LS31. All inputs are protected against damage due to electrostatic discharge by diodes to VCC and ground. Connection Diagram Figure 1. CDIP, CLGA Packages- Top View See Package Numbers NFE0016A, NAD0016A 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2010-2013, Texas Instruments Incorporated DS26C31MQML SNOSAS2A - OCTOBER 2010 - REVISED APRIL 2013 www.ti.com Figure 2. 20-Lead LCCC Package- Top View See Package Number NAJ0020A Logic Diagram Truth Table ENABLE ENABLE L H Input (1) Non-Inverting Inverting Output Output X Z Z All other L L H combinations of H H L enable inputs (1) 2 L = Low logic state X = Irrelevant H = High logic state Z = TRI-STATE (high impedance) Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: DS26C31MQML DS26C31MQML www.ti.com SNOSAS2A - OCTOBER 2010 - REVISED APRIL 2013 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) Supply Voltage (VCC) -0.5V to 7.0V DC Input Voltage (VI) -1.5V to VCC +0.5V -0.5V to 7V DC Output Voltage (VO) Clamp Diode Current (IIK, IOK) 20 mA DC Output Current, per pin (IO) 150 mA DC VCC or Gnd Current, per pin (ICC) 150 mA -65C TA +150C Storage Temperature Range (TStg) Lead Temperature (TL) Soldering, 4 sec. (1) (2) 260C Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not verify specific performance limits. For verified specifications and test conditions, see the Electrical Characteristics. The verified specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Unless otherwise specified, all voltages are referenced to ground. All currents into device pins are positive, all currents out of device pins are negative. Operating Conditions Supply Voltage (VCC) DC Input or Output Voltage (VI, VO) Operating Temperature Range (TA) Min Max Units 4.50 5.50 V 0 VCC V -55 +125 C Quality Conformance Inspection Table 1. Mil-Std-883, Method 5005 - Group A Subgroup Description Temp C 1 Static tests at +25 2 Static tests at +125 3 Static tests at -55 4 Dynamic tests at +25 5 Dynamic tests at +125 6 Dynamic tests at -55 7 Functional tests at +25 8A Functional tests at +125 8B Functional tests at -55 9 Switching tests at +25 10 Switching tests at +125 11 Switching tests at -55 12 Settling time at +25 13 Settling time at +125 14 Settling time at -55 Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: DS26C31MQML 3 DS26C31MQML SNOSAS2A - OCTOBER 2010 - REVISED APRIL 2013 www.ti.com DS26C31M Electrical Characteristics DC Parameters Parameter Test Conditions Notes Min Max 2.0 Unit Subgroups V 1, 2, 3 V 1, 2, 3 V 1, 2, 3 V 1, 2, 3 VIH Logical "1" Input Voltage VIL Logical "0" Input Voltage VOH Logical "1" Output Voltage VI = VIH or VIL, VCC = 4.5V, IO = -20mA VOL Logical "0" Output Voltage VI = VIH or VIL, IO = 20mA, VCC = 4.5V VT Differential Output Voltage RL = 100, VCC = 4.5V (1) V 1, 2, 3 |VT| - |VT | Difference in Differential Output RL = 100, VCC = 4.5V (1) 0.4 V 1, 2, 3 VOS Common Mode Output Voltage RL = 100, VCC = 5.5V (1) 3.0 V 1, 2, 3 (1) 0.8 |VOS-VOS | Diff in Common Mode Output RL = 100, VCC = 5.5V II Input Current VI = VCC, Gnd, VIH, or VIL, VCC = 5.5V ICC Quiescent Power Supply Current IO = 0A, VI = VCC or Gnd, VCC = 5.5V IO = 0A, VI = 2.4V or 0.5V, VCC = 5.5V 2.5 0.5 2.0 0.4 V 1, 2, 3 1.0 A 1, 2, 3 (2) 500 A 1, 2, 3 (2) 2.1 mA 1, 2, 3 5.0 A 1, 2, 3 -150 mA 1, 2, 3 IOZ TRI-STATE Output Leakage Current VO = VCC or Gnd, Enable = VIL, VCC = 5.5V, Enable = VIH ISC Output Short Circuit Current VI = VCC or Gnd, VCC = 5.5V IOff Output Leakage Current "Power Off" VCC = 0V, VO = 6V 100 A 1, 2, 3 VCC = 0V, VO = 0V -100 A 1, 2, 3 (1) (2) (3) (1) (3) , -30 See EIA Specification RS-422 for exact test conditions. Measured per input. All other inputs at VCC or GND. This is the current sourced when a high output is shorted to ground. Only one output at a time should be shorted. DS26C31M Electrical Characteristics AC Parameters - Propagation Delay Time (see Figure 26) The following conditions apply, unless otherwise specified. Parameter VCC = 5V, tR 6ns, tF 6ns Test Conditions Notes Min Max Unit Subgroups tPLH Input to Output Prop Delay Figure 27 14 ns 9, 10, 11 tPHL Input to Output Prop Dalay Figure 27 14 ns 9, 10, 11 3.0 ns 9, 10, 11 (1) Skew tTLH Output Rise Time Figure 29 14 ns 9, 10, 11 tTHL Output Fall Time Figure 29 14 ns 9, 10, 11 tPZH Output Enable Time Figure 28 22 ns 9, 10, 11 tPZL Output Enable Time Figure 28 28 ns 9, 10, 11 tPHZ Output Disable Time Figure 28 (2) 12 ns 9, 10, 11 tPLZ Output Disable Time Figure 28 (2) 14 ns 9, 10, 11 (1) (2) 4 Skew is defined as the difference in propagation delays between complimentary outputs at the 50% point. Output disable time is the delay from ENABLE or ENABLE being switched to the output transistors turning off. Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: DS26C31MQML DS26C31MQML www.ti.com SNOSAS2A - OCTOBER 2010 - REVISED APRIL 2013 Typical Performance Characteristics Differential Propagation Delay vs Temperature Differential Propagation Delay vs Power Supply Voltage Figure 3. Figure 4. Differential Skew vs Temperature Differential Skew vs Power Supply Voltage Figure 5. Figure 6. Differential Transition Time vs Temperature Differential Transition Time vs Power Supply Voltage Figure 7. Figure 8. Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: DS26C31MQML 5 DS26C31MQML SNOSAS2A - OCTOBER 2010 - REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) 6 Complementary Skew vs Temperature Complementary Skew vs Power Supply Voltage Figure 9. Figure 10. Differential Output Voltage vs Output Current Differential Output Voltage vs Output Current Figure 11. Figure 12. Output High Voltage vs Output High Current Output High Voltage vs Output High Current Figure 13. Figure 14. Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: DS26C31MQML DS26C31MQML www.ti.com SNOSAS2A - OCTOBER 2010 - REVISED APRIL 2013 Typical Performance Characteristics (continued) Output Low Voltage vs Output Low Current Output Low Voltage vs Output Low Current Figure 15. Figure 16. Supply Current vs Temperature Output Low Voltage vs Output Low Current Figure 17. Figure 18. Output Low Voltage vs Output Low Current Supply Current vs Temperature Figure 19. Figure 20. Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: DS26C31MQML 7 DS26C31MQML SNOSAS2A - OCTOBER 2010 - REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) Supply Current vs Power Supply Voltage No Load Supply Current vs Data Rate Figure 21. Figure 22. Loaded Supply Current vs Data Rate Output Short Circuit Current vs Temperature Figure 23. Figure 24. Output Short Circuit Current vs Power Supply Voltage Figure 25. 8 Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: DS26C31MQML DS26C31MQML www.ti.com SNOSAS2A - OCTOBER 2010 - REVISED APRIL 2013 AC TEST CIRCUIT AND SWITCHING TIME WAVEFORMS Note: C1 = C2 = C3 = 40 pF (Including Probe and Jig Capacitance), R1 = R2 = 50, R3 = 500. Figure 26. AC Test Circuit Figure 27. Propagation Delays Figure 28. Enable and Disable Times Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: DS26C31MQML 9 DS26C31MQML SNOSAS2A - OCTOBER 2010 - REVISED APRIL 2013 www.ti.com Input pulse; f = 1 MHz, 50%; tr 6 ns, tf 6 ns Figure 29. Differential Rise and Fall Times TYPICAL APPLICATIONS *RT is optional although highly recommended to reduce reflection. Figure 30. Two-Wire Balanced System, RS-422 10 Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: DS26C31MQML DS26C31MQML www.ti.com SNOSAS2A - OCTOBER 2010 - REVISED APRIL 2013 REVISION HISTORY Table 2. Revision History Released Revision 10/26/2010 A Section New Release, Corporate format Changes 1 MDS data sheets converted into one Corp. data sheet format. MNDS26C31M-X Rev 0B0 will be archived. Changes from Original (April 2013) to Revision A * Page Changed layout of National Data Sheet to TI format .......................................................................................................... 10 Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: DS26C31MQML 11 PACKAGE OPTION ADDENDUM www.ti.com 15-Apr-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (C) (3) Top-Side Markings (4) DS26C31ME/883 ACTIVE LCCC NAJ 20 50 TBD Call TI Call TI -55 to 125 DS26C31ME/ 883 Q 5962-91639 01M2A ACO 01M2A >T DS26C31MJ/883 ACTIVE CDIP NFE 16 25 TBD Call TI Call TI -55 to 125 DS26C31MJ/883 5962-9163901MEA Q DS26C31MW/883 ACTIVE CFP NAD 16 19 TBD Call TI Call TI -55 to 125 DS26C31MW /883 Q 5962-91639 01MFA ACO 01MFA >T (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. 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