1
2
3
4
5
6
7
8
ISO7640
9
10
11
12
13
14
15
16
NC
INA
GND1
GND2
GND2
INB
INC
OUTA
OUTC
OUTB
EN
IND OUTD
VCC1
GND1
VCC2 1
2
3
4
5
6
7
89
10
11
12
13
14
15
16
INA
GND2
GND2
INB
INC
OUTA
OUTC
OUTB
IND
EN2
EN1
GND1
GND1
VCC1
OUTD
VCC2
ISO7641
ISO7640FM
ISO7641FM
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SLLSE89D –SEPTEMBER 2011–REVISED JULY 2012
Low Power Quad Channels Digital Isolators
Check for Samples: ISO7640FM,ISO7641FM
1FEATURES APPLICATIONS
• Signaling Rate: 150 Mbps • Optocoupler Replacement in:
• Low Power Consumption, Typical ICC per – Industrial Fieldbus
Channel (3.3 V Supplies): – Profibus
– ISO7640FM: 2 mA at 25 Mbps – Modbus
– ISO7641FM: 2.4 mA at 25 Mbps – DeviceNetTM Data Buses
• Low Propagation Delay: 7 ns Typical – Servo Control Interface
• Output Defaults to Low-state in fail-safe mode – Motor Control
• Wide Temperature Range: –40°C to 125°C – Power Supplies
• 50 KV/µs Transient Immunity, Typical – Battery Packs
• Long Life with SiO2Isolation barrier SAFETY AND REGULATORY
• Operates From 2.7V, 3.3 V and 5 V Supply and APPROVALS
Logic Levels • 6000 VPK / 4243 VRMS for 1 Minute per UL 1577
• Wide Body SOIC-16 Package (approved)
• VDE Approval for DIN EN 60747-5-2 (VDE 0884
Rev. 2), 1414 VPK Working Voltage (approved)
• CSA Component Acceptance Notice 5A, IEC
60601-1 Medical Standard (approved)
• 5 KVRMS Reinforced Insulation per TUV for
EN/UL/CSA 60950-1 and EN/UL/CSA 61010-1
(approved)
DESCRIPTION
ISO7640FM and ISO7641FM provide galvanic isolation up to 6 KVPK for 1 minute per UL and VDE. These
devices are also certified up to 5 KVRMS Reinforced isolation at a working voltage of 400 VRMS per end equipment
standards EN/UL/CSA 60950-1 and 61010-1. ISO7640F and ISO7641F are quad channel isolators; ISO7640F
has four forward and ISO7641F has three forward and one reverse direction channels. Suffix F indicates that
output defaults to Low-state in fail-safe conditions (see Table 1). M-Grade devices are high speed isolators
capable of 150 Mbps data rate with fast propagation delays
Spacer
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains Copyright © 2011–2012, Texas Instruments Incorporated
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
ISO7640FM
ISO7641FM
SLLSE89D –SEPTEMBER 2011–REVISED JULY 2012
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
DESCRIPTION CONTINUED
Each isolation channel has a logic input and output buffer separated by a silicon dioxide (SiO2) insulation barrier.
Used in conjunction with isolated power supplies, these devices prevent noise currents on a data bus or other
circuits from entering the local ground and interfering with or damaging sensitive circuitry. The devices have TTL
input thresholds and can operate from 2.7 V, 3.3 V and 5 V supplies. All inputs are 5 V tolerant when supplied
from 3.3 V or 2.7 V supplies.
PIN DESCRIPTIONS
PIN I/O DESCRIPTION
NAME ISO7640 ISO7641
INA 3 3 I Input, channel A
INB 4 4 I Input, channel B
INC 5 5 I Input, channel C
IND 6 11 I Input, channel D
OUTA 14 14 O Output, channel A
OUTB 13 13 O Output, channel B
OUTC 12 12 O Output, channel C
OUTD 11 6 O Output, channel D
Enables (when input is High or Open) or Disables (when input is Low) OUTA, OUTB, OUTC
EN 10 - I and OUTD of ISO7640
EN1 - 7 I Enables (when input is High or Open) or Disables (when input is Low) OUTD of ISO7641
Enables (when input is High or Open) or Disables (when input is Low) OUTA, OUTB, and
EN2 - 10 I OUTC of ISO7641
VCC1 1 1 – Power supply, VCC1
VCC2 16 16 – Power supply, VCC2
GND1 2,8 2,8 – Ground connection for VCC1
GND2 9,15 9,15 – Ground connection for VCC2
NC 7 - - No Connect pins are floating with no internal connection
Table 1. FUNCTION TABLE(1)
INPUT OUTPUT INPUT OUTPUT ENABLE OUTPUT
VCC VCC (INx) (ENx) (OUTx)
H H or Open H
L H or Open L
PU PU X L Z
Open H or Open L
PD PU X H or Open L
PD PU X L Z
PU PD X X Z
(1) PU = Powered Up(VCC ≥2.7 V); PD = Powered Down (VCC ≤2.1 V); X = Irrelevant; H = High Level; L
= Low Level; Z = High Impedance
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SLLSE89D –SEPTEMBER 2011–REVISED JULY 2012
AVAILABLE OPTIONS
RATED INPUT DATA RATE CHANNEL MARKED ORDERING
PRODUCT PACKAGE
ISOLATION THRESHOLD and FILTER DIRECTION AS NUMBER
ISO7640FMDW (rail)
4 Forward,
ISO7640FM ISO7640FM
0 Reverse
1.5 V TTL ISO7640FMDWR (reel)
6 KVPK / 150 Mbps,
DW-16 (CMOS
5 KVRMS (1) No Noise Filter ISO7641FMDW (rail)
Compatible) 3 Forward,
ISO7641FM ISO7641FM
1 Reverse ISO7641FMDWR (reel)
(1) See the Regulatory Information table for detailed isolation ratings.
ABSOLUTE MAXIMUM RATINGS(1)
VALUE
PARAMETER UNIT
MIN MAX
Supply voltage(2) VCC1, VCC2 –0.5 6 V
Voltage INx, OUTx, ENx –0.5 6 V
Output Current, IO±15 mA
Human Body Model ESDA, JEDEC JS-001-2012 ±4 kV
Field-Induced Charged Device
Electrostatic discharge JEDEC JESD22-C101E All pins ±1.5 kV
Model
Machine Model JEDEC JESD22-A115-A ±200 V
Maximum junction temperature, TJ150 °C
Storage temperature, TSTG -65 150 °C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values except differential I/O bus voltages are with respect to the local ground terminal (GND1 or GND2) and are peak
voltage values.
RECOMMENDED OPERATING CONDITIONS
PARAMETER MIN TYP MAX UNIT
Supply voltage VCC1, VCC2 2.7 5.5 V
High-level output current IOH -4 mA
Low-level output current IOL 4 mA
High-level input voltage VIH 2 VCC V
Low-level input voltage VIL 0 0.8 V
≥3V-Operation 6.67
Input pulse duration tui ns
<3V-Operation 10
≥3V-Operation 0 150
Signaling rate 1 / tui Mbps
<3V-Operation 0 100
Junction temperature TJ-40 136 °C
Ambient temperature TA-40 25 125 °C
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THERMAL INFORMATION ISO76xx
THERMAL METRIC(1) UNITS
DW (16 Pins)
θJA Junction-to-ambient thermal resistance 72
θJC(top) Junction-to-case(top) thermal resistance 38
θJB Junction-to-board thermal resistance 39 °C/W
ψJT Junction-to-top characterization parameter 9.4
ψJB Junction-to-board characterization parameter n/a
θJC(bottom) Junction-to-case(bottom) thermal resistance n/a
VCC1 = VCC2 = 5.5V, TJ= 150°C, CL= 15pF
PDMaximum Device Power Dissipation 399 mW
Input a 75 MHz 50% duty cycle square wave
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
ELECTRICAL CHARACTERISTICS
VCC1 and VCC2 at 5 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IOH = –4 mA; see Figure 1 VCCx(1) – 0.8 4.8
VOH High-level output voltage V
IOH = –20 μA; see Figure 1 VCCx(1) – 0.1 5
IOL = 4 mA; see Figure 1 0.2 0.4
VOL Low-level output voltage V
IOL = 20 μA; see Figure 1 0 0.1
VI(HYS) Input threshold voltage hysteresis 450 mV
IIH High-level input current VIH = VCC at INx or ENx 10 μA
IIL Low-level input current VIL = 0 V at INx or ENx -10
CMTI Common-mode transient immunity VI= VCC or 0 V; see Figure 4 25 75 kV/μs
(1) VCCx is the supply voltage, VCC1 or VCC2, for the output channel that is being measured.
SWITCHING CHARACTERISTICS
VCC1 and VCC2 at 5 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH, tPHL Propagation delay time 3.5 7 10.5
See Figure 1
PWD(1) Pulse width distortion |tPHL – tPLH| 2
Same-direction Channels 2 ns
tsk(o)(2) Channel-to-channel output skew time Opposite-direction Channels 3
tsk(pp)(3) Part-to-part skew time 4.5
trOutput signal rise time 1.6
See Figure 1 ns
tfOutput signal fall time 1
Disable Propagation Delay, high-to-high
tPHZ 5 16
impedance output
Disable Propagation Delay, low-to-high
tPLZ 5 16
impedance output See Figure 2 ns
Enable Propagation Delay, high impedance-to-
tPZH 4 16
high output
Enable Propagation Delay, high impedance-to-
tPZL 4 16
low output
Fail-safe output delay time from input data or
tfs See Figure 3 9.5 μs
power loss
(1) Also known as Pulse Skew.
(2) tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same
direction while driving identical loads.
(3) tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same
direction while operating at identical supply voltages, temperature, input signals and loads.
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SLLSE89D –SEPTEMBER 2011–REVISED JULY 2012
SUPPLY CURRENT
VCC1 and VCC2 at 5 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ISO7640FM
ICC1 0.6 1.2
Disable EN = 0 V
ICC2 4.5 6.6
ICC1 0.7 1.3
DC to 1 Mbps
ICC2 4.6 6.7
ICC1 1.1 2
10 Mbps mA
DC Signal: VI= VCC or 0 V,
ICC2 6.6 10.5
AC Signal: All channels switching with square wave clock
ICC1 1.9 3
input; CL= 15 pF
25 Mbps
ICC2 9.7 14.7
ICC1 8.2 14.5
150 Mbps
ICC2 35 58
ISO7641FM
ICC1 2.6 4.2
Disable EN1 = EN2 = 0 V
ICC2 4.2 6.8
ICC1 2.7 4.3
DC to 1 Mbps
ICC2 4.3 6.9
ICC1 3.6 4.9
10 Mbps mA
DC Signal: VI= VCC or 0 V,
ICC2 6 8.2
AC Signal: All channels switching with square wave clock
ICC1 5.1 6.6
input; CL= 15 pF
25 Mbps
ICC2 8.8 11.4
ICC1 17 22
150 Mbps
ICC2 31 42
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ELECTRICAL CHARACTERISTICS
VCC1 at 5 V ± 10% and VCC2 at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IOH = –4 mA; see OUTx on VCC1 (5V) side VCC1 – 0.8 4.8
Figure 1 OUTx on VCC2 (3.3V) side VCC2 - 0.4 3
VOH High-level output voltage V
IOH = –20 μA; see OUTx on VCC1 (5V) side VCC1 – 0.1 5
Figure 1 OUTx on VCC2 (3.3V) side VCC2 – 0.1 3.3
IOL = 4 mA; see Figure 1 0.2 0.4
VOL Low-level output voltage V
IOL = 20 μA; see Figure 1 0 0.1
VI(HYS) Input threshold voltage 430 mV
hysteresis
IIH High-level input current VIH = VCC at INx or ENx 10 μA
IIL Low-level input current VIL = 0 V at INx or ENx -10
Common-mode transient
CMTI VI= VCC or 0 V; see Figure 4 25 50 kV/μs
immunity
SWITCHING CHARACTERISTICS
VCC1 at 5 V ± 10% and VCC2 at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH, tPHL Propagation delay time 4 8 13
See Figure 1
PWD(1) Pulse width distortion |tPHL – tPLH| 2
Same-direction Channels 2.5 ns
tsk(o)(2) Channel-to-channel output skew time Opposite-direction Channels 3.5
tsk(pp)(3) Part-to-part skew time 6
trOutput signal rise time 2
See Figure 1 ns
tfOutput signal fall time 1.2
Disable Propagation Delay, high-to-high
tPHZ 6.5 17
impedance output
Disable Propagation Delay, low-to-high
tPLZ 6.5 17
impedance output See Figure 2 ns
Enable Propagation Delay, high impedance-to-
tPZH 5.5 17
high output
Enable Propagation Delay, high impedance-to-
tPZL 5.5 17
low output
Fail-safe output delay time from input data or
tfs See Figure 3 9.5 μs
power loss
(1) Also known as Pulse Skew.
(2) tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same
direction while driving identical loads.
(3) tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same
direction while operating at identical supply voltages, temperature, input signals and loads.
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SLLSE89D –SEPTEMBER 2011–REVISED JULY 2012
SUPPLY CURRENT
VCC1 at 5 V ± 10% and VCC2 at 3.3V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ISO7640FM
ICC1 0.6 1.2
Disable EN = 0 V
ICC2 3.6 5.1
ICC1 0.7 1.3
DC to 1 Mbps
ICC2 3.7 5.2
ICC1 1.1 2
10 Mbps mA
DC Signal: VI= VCC or 0 V,
ICC2 5 7.1
AC Signal: All channels switching with square wave clock input; CL
ICC1 1.9 3
= 15 pF
25 Mbps
ICC2 6.9 11
ICC1 8.2 14.5
150 Mbps
ICC2 24 40
ISO7641FM
ICC1 2.6 4.2
Disable EN1 = EN2 = 0 V
ICC2 3.2 4.9
ICC1 2.7 4.3
DC to 1 Mbps
ICC2 3.3 5
ICC1 3.6 4.9
10 Mbps mA
DC Signal: VI= VCC or 0 V,
ICC2 4.4 5.8
AC Signal: All channels switching with square wave clock input; CL
ICC1 5.1 6.6
= 15 pF
25 Mbps
ICC2 6.1 7.6
ICC1 17 22
150 Mbps
ICC2 20.6 26.5
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ELECTRICAL CHARACTERISTICS
VCC1 at 3.3 V ± 10% and VCC2 at 5 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IOH = –4 mA; see Figure 1 OUTx on VCC1 (3.3 V) side VCC1–0.4 3
OUTx on VCC2 (5 V) side VCC2–0.8 4.8
VOH High-level output voltage V
IOH = –20 μA; see Figure 1 OUTx on VCC1 (3.3 V) side VCC1–0.1 3.3
OUTx on VCC2 (5 V) side VCC2–0.1 5
IOL = 4 mA; see Figure 1 0.2 0.4
VOL Low-level output voltage V
IOL = 20 μA; see Figure 1 0 0.1
VI(HYS) Input threshold voltage hysteresis 430 mV
IIH High-level input current VIH = VCC at INx or ENx 10 μA
IIL Low-level input current VIL = 0 V at INx or ENx -10
CMTI Common-mode transient immunity VI= VCC or 0 V; see Figure 4 25 50 kV/μs
SWITCHING CHARACTERISTICS
VCC1 at 3.3 V ± 10% and VCC2 at 5 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH, tPHL Propagation delay time 4 7.5 12.5
See Figure 1
PWD(1) Pulse width distortion |tPHL – tPLH| 2
Same-direction Channels 2.5 ns
tsk(o)(2) Channel-to-channel output skew time Opposite-direction Channels 3.5
tsk(pp)(3) Part-to-part skew time 6
trOutput signal rise time 1.7
See Figure 1 ns
tfOutput signal fall time 1.1
Disable Propagation Delay, high-to-high impedance
tPHZ 5.5 17
output
Disable Propagation Delay, low-to-high impedance
tPLZ 5.5 17
output See Figure 2 ns
Enable Propagation Delay, high impedance-to-high
tPZH 4.5 17
output
Enable Propagation Delay, high impedance-to-low
tPZL 4.5 17
output
Fail-safe output delay time from input data or power
tfs See Figure 3 9.5 μs
loss
(1) Also known as Pulse Skew.
(2) tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same
direction while driving identical loads.
(3) tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same
direction while operating at identical supply voltages, temperature, input signals and loads.
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SUPPLY CURRENT
VCC1 at 3.3 V ± 10% and VCC2 at 5 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ISO7640FM
ICC1 0.35 0.7
Disable EN = 0 V
ICC2 4.5 6.6
ICC1 0.4 0.8
DC to 1 Mbps
ICC2 4.6 6.7
ICC1 0.7 1.2
10 Mbps mA
DC Signal: VI= VCC or 0 V,
ICC2 6.6 10.5
AC Signal: All channels switching with square wave clock input; CL=
ICC1 1.1 2
15 pF
25 Mbps
ICC2 9.7 14.7
ICC1 5 8.5
150 Mbps
ICC2 35 58
ISO7641FM
ICC1 1.9 2.9
Disable EN1 = EN2 = 0 V
ICC2 4.2 6.8
ICC1 2 3
DC to 1 Mbps
ICC2 4.3 6.9
ICC1 2.5 3.5
10 Mbps mA
DC Signal: VI= VCC or 0 V,
ICC2 6 8.2
AC Signal: All channels switching with square wave clock input; CL=
ICC1 3.4 4.5
15 pF
25 Mbps
ICC2 8.8 11.4
ICC1 10.5 14.5
150 Mbps
ICC2 31 42
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ELECTRICAL CHARACTERISTICS
VCC1 and VCC2 at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IOH = –4 mA; see Figure 1 VCCx(1) – 0.4 3
VOH High-level output voltage V
IOH = –20 μA; see Figure 1 VCCx(1) – 0.1 3.3
IOL = 4 mA; see Figure 1 0.2 0.4
VOL Low-level output voltage V
IOL = 20 μA; see Figure 1 0 0.1
VI(HYS) Input threshold voltage 425 mV
hysteresis
IIH High-level input current VIH = VCC at INx or ENx 10 μA
IIL Low-level input current VIL = 0 V at INx or ENx -10
Common-mode transient
CMTI VI= VCC or 0 V; see Figure 4 25 50 kV/μs
immunity
(1) VCCx is the supply voltage, VCC1 or VCC2, for the output channel that is being measured.
SWITCHING CHARACTERISTICS
VCC1 and VCC2 at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH, tPHL Propagation delay time 4 8.5 14
See Figure 1
PWD(1) Pulse width distortion |tPHL – tPLH| 2
Same-direction Channels 3 ns
tsk(o)(2) Channel-to-channel output skew time Opposite-direction Channels 4
tsk(pp)(3) Part-to-part skew time 6.5
trOutput signal rise time 2
See Figure 1 ns
tfOutput signal fall time 1.3
Disable Propagation Delay, high-to-high
tPHZ 6.5 17
impedance output
Disable Propagation Delay, low-to-high impedance
tPLZ 6.5 17
output See Figure 2 ns
Enable Propagation Delay, high impedance-to-high
tPZH 5.5 17
output
Enable Propagation Delay, high impedance-to-low
tPZL 5.5 17
output
Fail-safe output delay time from input data or
tfs See Figure 3 9.2 μs
power loss
(1) Also known as Pulse Skew.
(2) tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same
direction while driving identical loads.
(3) tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same
direction while operating at identical supply voltages, temperature, input signals and loads.
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ISO7641FM
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SUPPLY CURRENT
VCC1 and VCC2 at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ISO7640FM
ICC1 0.35 0.7
Disable EN = 0 V
ICC2 3.6 5.1
ICC1 0.4 0.8
DC to 1 Mbps
ICC2 3.7 5.2
ICC1 0.7 1.2
10 Mbps mA
DC Signal: VI= VCC or 0 V,
ICC2 5 7.1
AC Signal: All channels switching with square wave clock input; CL=
ICC1 1.1 2
15 pF
25 Mbps
ICC2 6.9 11
ICC1 5 8.5
150 Mbps
ICC2 24 40
ISO7641FM
ICC1 1.9 2.9
Disable EN1 = EN2 = 0 V
ICC2 3.2 4.9
ICC1 2 3
DC to 1 Mbps
ICC2 3.3 5
ICC1 2.5 3.5
10 Mbps mA
DC Signal: VI= VCC or 0 V,
ICC2 4.4 5.8
AC Signal: All channels switching with square wave clock input; CL=
ICC1 3.4 4.5
15 pF
25 Mbps
ICC2 6.1 7.6
ICC1 10.5 14.5
150 Mbps
ICC2 20.6 26.5
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ELECTRICAL CHARACTERISTICS
VCC1 and VCC2 at 2.7 V(1) (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IOH = –4 mA; see Figure 1 VCC(2) – 0.5 2.4
VOH High-level output voltage V
IOH = –20 μA; see Figure 1 VCC(2) – 0.1 2.7
IOL = 4 mA; see Figure 1 0.2 0.4
VOL Low-level output voltage V
IOL = 20 μA; see Figure 1 0 0.1
VI(HYS) Input threshold voltage hysteresis 350 mV
IIH High-level input current VIH = VCC at INx or ENx 10 μA
IIL Low-level input current VIL = 0 V at INx or ENx -10
CMTI Common-mode transient immunity VI= VCC or 0 V; see Figure 4 25 50 kV/μs
(1) For 2.7 V-operation, max data rate is 100 Mbps.
(2) VCCx is the supply voltage, VCC1 or VCC2, for the output channel that is being measured.
SWITCHING CHARACTERISTICS
VCC1 and VCC2 at 2.7 V (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH, tPHL Propagation delay time 5 8 16
See Figure 1
PWD(1) Pulse width distortion |tPHL – tPLH| 2.5
Same-direction Channels 4 ns
tsk(o)(2) Channel-to-channel output skew time Opposite-direction Channels 5
tsk(pp)(3) Part-to-part skew time 8
trOutput signal rise time 2.3
See Figure 1 ns
tfOutput signal fall time 1.8
Disable Propagation Delay, high-to-high
tPHZ 8 18
impedance output
Disable Propagation Delay, low-to-high
tPLZ 8 18
impedance output See Figure 2 ns
Enable Propagation Delay, high impedance-to-
tPZH 7 18
high output
Enable Propagation Delay, high impedance-to-
tPZL 7 18
low output
Fail-safe output delay time from input data or
tfs See Figure 3 8.5 μs
power loss
(1) Also known as Pulse Skew.
(2) tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same
direction while driving identical loads.
(3) tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same
direction while operating at identical supply voltages, temperature, input signals and loads.
12 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated
Product Folder Link(s): ISO7640FM ISO7641FM
ISO7640FM
ISO7641FM
www.ti.com
SLLSE89D –SEPTEMBER 2011–REVISED JULY 2012
SUPPLY CURRENT
VCC1 and VCC2 at 2.7 V (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ISO7640FM
ICC1 0.2 0.6
Disable EN = 0 V
ICC2 3.3 5
ICC1 0.2 0.7
DC to 1 Mbps
ICC2 3.4 5.1
ICC1 0.4 1.1
10 Mbps mA
DC Signal: VI= VCC or 0 V,
ICC2 4.4 6.8
AC Signal: All channels switching with square wave clock input; CL=
ICC1 0.8 1.8
15 pF
25 Mbps
ICC2 6 9.5
ICC1 2.7 5
100 Mbps
ICC2 14.2 21
ISO7641FM
ICC1 1.6 2.4
Disable EN1 = EN2 = 0 V
ICC2 2.8 4.1
ICC1 1.7 2.5
DC to 1 Mbps
ICC2 2.9 4.2
ICC1 2.1 3
10 Mbps mA
DC Signal: VI= VCC or 0 V,
ICC2 3.8 5
AC Signal: All channels switching with square wave clock input; CL=
ICC1 2.8 3.8
15 pF
25 Mbps
ICC2 5.2 6.7
ICC1 6.4 7.5
100 Mbps
ICC2 11.8 15.5
Copyright © 2011–2012, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Link(s): ISO7640FM ISO7641FM
Input
Generator 50
OUT
RL= 1 k
EN
VO
V
I
IN
0V
ISOLATION BARRIER
CL
W
W
1%
±
NOTE A
NOTE
B
0 V
V
O
VI
0.5 V
50%
Input
Generator 50
OUT
RL= 1 k
EN
V
O
VI
IN
3V
ISOLATION BARRIER
CLW
W
1%
±
NOTE A
NOTE
B
0 V
0 V
VI
50% 0.5 V
tPZH
V
O
VOH
tPHZ
V /2
CC V /2
CC
VCC
tPZL
VCC
V /2
CC
VCC
tPLZ
VCC
V /2
CC
VOL
IN
ISOLATION BARRIER
OUT
VO
CL
Input
Generator 50
VIW
NOTE A NOTE
B10%
90%
50%
0 V
50%
VIV /2
CC
VO
tPLH
VOH
tPHL
trtf
VCC1
VOL
V /2
CC
ISO7640FM
ISO7641FM
SLLSE89D –SEPTEMBER 2011–REVISED JULY 2012
www.ti.com
PARAMETER MEASUREMENT INFORMATION
A. The input pulse is supplied by a generator having the following characteristics: PRR ≤50 kHz, 50% duty cycle, tr≤3
ns, tf≤3ns, ZO= 50 Ω. At the input, 50 Ωresistor is required to terminate Input Generator signal. It is not needed in
actual application.
B. CL= 15 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 1. Switching Characteristics Test Circuit and Voltage Waveforms
A. The input pulse is supplied by a generator having the following characteristics: PRR ≤10 kHz, 50% duty cycle,
tr≤3 ns, tf≤3 ns, ZO= 50 Ω.
B. CL= 15 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 2. Enable/Disable Propagation Delay Time Test Circuit and Waveform
14 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated
Product Folder Link(s): ISO7640FM ISO7641FM
ISOLATION BARRIER
IN OUT
GND2
GND1
C
NOTE A
L
S1
VCC1 VCC2
C = 0.1 F ±1%mC = 0.1 F ±1%m
Pass/Fail Criterion –
the output must
remain stable.
V or V
OH OL
VTEST
VO
OUT
ISOLATION BARRIER
NOTE A
CL
VI
IN = VCC
0 V
tfs
fs low
VO
VI2.7 V
50%
VCC VCC
VOL
VOH
ISO7640FM
ISO7641FM
www.ti.com
SLLSE89D –SEPTEMBER 2011–REVISED JULY 2012
PARAMETER MEASUREMENT INFORMATION (continued)
A. CL= 15 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 3. Failsafe Delay Time Test Circuit and Voltage Waveforms
A. CL= 15 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 4. Common-Mode Transient Immunity Test Circuit
Copyright © 2011–2012, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Link(s): ISO7640FM ISO7641FM
ISO7640FM
ISO7641FM
SLLSE89D –SEPTEMBER 2011–REVISED JULY 2012
www.ti.com
DEVICE INFORMATION
IEC INSULATION AND SAFETY-RELATED SPECIFICATIONS FOR DW-16 PACKAGE
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
L(I01) Minimum air gap (Clearance) Shortest terminal to terminal distance through air 8.3 mm
Minimum external tracking Shortest terminal to terminal distance across the
L(I02)(1) 8.1 mm
(Creepage) package surface
Tracking resistance (Comparative
CTI DIN IEC 60112 / VDE 0303 Part 1 ≥400 V
Tracking Index)
Minimum Internal Gap (Internal Distance through the insulation 0.014 mm
Clearance) VIO = 500 V, TA< 100°C >1012
Isolation resistance, Input to
RIO(2) Ω
Output VIO = 500 V, 100°C ≤TA≤max >1011
Barrier capacitance, Input to VI= 0.4 sin (2πft), f = 1MHz
CIO(2) 2 pF
Output
CI(3) Input capacitance VI= VCC/2 + 0.4 sin (2πft), f = 1MHz, VCC = 5 V 2 pF
(1) Per JEDEC package dimensions.
(2) All pins on each side of the barrier tied together creating a two-terminal device.
(3) Measured from input pin to ground.
spacer
NOTE
Creepage and clearance requirements should be applied according to the specific
equipment isolation standards of an application. Care should be taken to maintain the
creepage and clearance distance of a board design to ensure that the mounting pads of
the isolator on the printed circuit board do not reduce this distance.
Creepage and clearance on a printed circuit board become equal according to the
measurement techniques shown in the Isolation Glossary. Techniques such as inserting
grooves and/or ribs on a printed circuit board are used to help increase these
specifications.
DIN EN 60747-5-2 (VDE 0884 TEIL 2) INSULATION CHARACTERISTICS(4)
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS SPECIFICATION UNIT
VIORM Maximum working insulation voltage (1) 1414 VPEAK
After Input/Output safety test subgroup 2/3,
VPR = VIORM x 1.2, t = 10 s, 1697
Partial discharge < 5 pC
Method a, After environmental tests subgroup 1,
VPR Input-to-output test voltage VPR = VIORM x 1.6, t = 10 s, 2262 VPEAK
Partial Discharge < 5 pC
Method b1, 100% Production test
VPR = VIORM x 1.875, t = 1 s 2652
Partial discharge < 5 pC
VTEST = VIOTM
VIOTM Maximum transient overvoltage t = 60 sec (Qualification) 6000 VPEAK
t = 1 sec (100% Production)
RSInsulation resistance VIO = 500 V at TS>109Ω
Pollution degree 2
(4) Climatic Classification 40/125/21
(1) For applications that require DC working voltages between GND1 and GND2, please contact Texas Instruments for further details.
16 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated
Product Folder Link(s): ISO7640FM ISO7641FM
ISO7640FM
ISO7641FM
www.ti.com
SLLSE89D –SEPTEMBER 2011–REVISED JULY 2012
IEC 60664-1 RATINGS TABLE
PARAMETER TEST CONDITIONS SPECIFICATION
Basic Isolation Group Material Group II
Rated mains voltage ≤300 VRMS I–IV
Installation classification Rated mains voltage ≤600 VRMS I–III
Rated mains voltage ≤1000 VRMS I–II
REGULATORY INFORMATION
VDE TUV CSA UL
Certified according to DIN EN Certified according to Approved under CSA Component Recognized under 1577 Component
60747-5-2 EN/UL/CSA 60950-1 and 61010- Acceptance Notice #5A Recognition Program
1
Basic Insulation 5000 VRMS Reinforced Insulation, 5000 VRMS Reinforced Insulation
Maximum Transient 400 VRMS maximum working 2 Means of Patient Protection at
Overvoltage, 6000 VPK voltage Single Protection, 4243 VRMS(1)
125 VRMS per IEC 60601-1 (3rd
Maximum Working Voltage, 5000 VRMS Basic Insulation, 600 Ed.)
1414 VPK VRMS maximum working voltage
File Number: 40016131 Certificate Number: U8V 11 08 File Number: 220991 File Number: E181974
77311 005
(1) Production tested ≥5092 VRMS for 1 second in accordance with UL 1577.
IEC SAFETY LIMITING VALUES
Safety limiting intends to prevent potential damage to the isolation barrier upon failure of input or output circuitry.
A failure of the IO can allow low resistance to ground or the supply and, without current limiting, dissipate
sufficient power to overheat the die and damage the isolation barrier potentially leading to secondary system
failures.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
θJA = 72 °C/W, VI= 5.5V, TJ= 150°C, TA= 25°C 316
Safety input, output, or supply
ISDW-16 θJA = 72 °C/W, VI= 3.6V, TJ= 150°C, TA= 25°C 482 mA
current θJA = 72 °C/W, VI= 2.7V, TJ= 150°C, TA= 25°C 643
TSMaximum case temperature 150 °C
The safety-limiting constraint is the absolute maximum junction temperature specified in the absolute maximum
ratings table. The power dissipation and junction-to-air thermal impedance of the device installed in the
application hardware determines the junction temperature. The assumed junction-to-air thermal resistance in the
Thermal Information table is that of a device installed on a High-K Test Board for Leaded Surface Mount
Packages. The power is the recommended maximum input voltage times the current. The junction temperature is
then the ambient temperature plus the power times the junction-to-air thermal resistance.
Copyright © 2011–2012, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Link(s): ISO7640FM ISO7641FM
1
2
3
4
5
6
7
89
10
11
12
13
14
15
16
NC
INA
GND1
GND1
GND 2
GND2
INB
INC
OUTA
OUTC
OUTB
EN
IND OUTD
2 mm
max. from
VCC1
2 mm
max. from
VCC2
VCC1 VCC2
0.1 Fm0.1 Fm
ISO7640
1
2
3
4
5
6
7
89
10
11
12
13
14
15
16
EN1
INA
GND1
GND1
GND 2
GND2
INB
INC
OUTA
OUTC
OUTB
EN2
OUTD IND
2 mm
max. from
VCC1
2 mm
max. from
VCC2
VCC1 VCC2
0.1 Fm0.1 Fm
ISO7641
0
100
200
300
400
500
600
700
0 50 100 150 200
Case Temperature - C
o
Safety Limiting Current - mA
V = V = 5.5V
CC1 CC2
V = V = 2.7V
CC1 CC2
V = V = 3.6V
CC1 CC2
ISO7640FM
ISO7641FM
SLLSE89D –SEPTEMBER 2011–REVISED JULY 2012
www.ti.com
Figure 5. DW-16 θJC Thermal Derating Curve per IEC 60747-5-2
APPLICATION INFORMATION
Figure 6. Typical ISO7640FM and ISO7641FM Application Circuit
Note: For detailed layout recommendations, see Application Note SLLA284,Digital Isolator Design Guide.
18 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated
Product Folder Link(s): ISO7640FM ISO7641FM
OUT
8W
13 W
IN
1 MW
500 W
Input Output
VCC VCC
VCC
EN
1 MW
500 W
Enable
VCC VCC VCC
ISO7640FM
ISO7641FM
www.ti.com
SLLSE89D –SEPTEMBER 2011–REVISED JULY 2012
TYPICAL SUPPLY CURRENT EQUATIONS
(Calculated based on room temperature and typical Silicon process)
ISO7640FM:
At VCC1 = VCC2 = 3.3V
ICC1 = 0.388 + 0.0312 x f
ICC2 = 3.39 + 0.03561 x f + 0.006588 x f x CL
At VCC1 = VCC2 = 5V
ICC1 = 0.584 + 0.05349 x f
ICC2 = 4.184 + 0.05597 x f + 0.009771 x f x CL
ISO7641FM:
At VCC1 = VCC2 = 3.3V
ICC1 = 1.848 + 0.03233 x f + 0.001645 x f x CL
ICC2 = 3.005 + 0.03459 x f + 0.0049395 x f x CL
At VCC1 = VCC2 = 5V
ICC1 = 2.369 + 0.05385 x f + 0.002448 x f x CL
ICC2 = 3.857 + 0.05506 x f + 0.007348 x f x CL
ICC1 and ICC2 are typical supply currents measured in mA; f is data rate measured in Mbps; CLis the capacitive
load on each channel measured in pF.
Figure 7. Device I/O Schematics
Copyright © 2011–2012, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Link(s): ISO7640FM ISO7641FM
0
1
2
3
4
5
6
7
8
9
0 25 50 75 100 125 150
Data Rate (Mbps)
Supply Current (mA)
ICC1 at 3.3 V
ICC1 at 5 V
ICC2 at 3.3 V
ICC2 at 5 V
TA= 25°C
CL= 15 pF
G003
0
5
10
15
20
25
30
35
40
0 25 50 75 100 125 150
Data Rate (Mbps)
Supply Current (mA)
ICC1 at 3.3 V
ICC1 at 5 V
ICC2 at 3.3 V
ICC2 at 3.3 V
TA= 25°C
CL= 15 pF
G002
0
1
2
3
4
5
6
7
8
9
10
0 25 50 75 100 125 150
Data Rate (Mbps)
Supply Current (mA)
ICC1 at 3.3 V
ICC1 at 5 V
ICC2 at 3.3 V
ICC2 at 5 V
TA= 25°C
CL= 15 pF
G001
0
5
10
15
20
25
30
35
40
0 25 50 75 100 125 150
Data Rate (Mbps)
Supply Current (mA)
ICC1 at 3.3 V
ICC1 at 5 V
ICC2 at 3.3 V
ICC2 at 3.3 V
TA= 25°C
CL= 15 pF
G002
ISO7640FM
ISO7641FM
SLLSE89D –SEPTEMBER 2011–REVISED JULY 2012
www.ti.com
TYPICAL CHARACTERISTICS
Figure 8. ISO7640FM Supply Current Per Channel Figure 9. ISO7640FM Supply Current For All Channels
vs Data Rate vs Data Rate
Figure 10. ISO7641FM Supply Current Per Channel Figure .
vs Data Rate
Figure 11. High-Level Output Voltage Figure 12. Low-Level Output Voltage
vs High-Level Output Current vs Low-Level Output Current
20 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated
Product Folder Link(s): ISO7640FM ISO7641FM
TA= 25oC, CL= 15 pF
VCC1 = V CC2 = 5 V
Pattern: NRZ 216-1
TA= 25oC, CL= 15 pF
VCC1 = V CC2 = 3.3 V
Pattern: NRZ 216-1
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
0 20 40 60 80 100 120 140 160 180
Data Rate (Mbps)
Pk-Pk Output Jitter (ns)
VCC = 5 V
VCC = 3.3 V
TA= 25°C
CL= 15 pF
All Channels Switching
Typ Jitter on output pin shown
G009
ISO7640FM
ISO7641FM
www.ti.com
SLLSE89D –SEPTEMBER 2011–REVISED JULY 2012
TYPICAL CHARACTERISTICS (continued)
Figure 13. VCC Undervoltage Threshold Figure 14. Propagation Delay Time
vs Free Air Temperature vs Free Air Temperature
Figure 15. Output Jitter vs Data Rate
Figure 16. Typical Eye Diagram at 150 Mbps, Figure 17. Typical Eye Diagram at 150 Mbps,
5 V Operation 3.3 V Operation
Copyright © 2011–2012, Texas Instruments Incorporated Submit Documentation Feedback 21
Product Folder Link(s): ISO7640FM ISO7641FM
ISO7640FM
ISO7641FM
SLLSE89D –SEPTEMBER 2011–REVISED JULY 2012
www.ti.com
REVISION HISTORY
Changes from Original (September 2011) to Revision A Page
• Changed Figure 3 - From: 0 V or VCC To: IN = VCC ........................................................................................................... 15
• Added Note (1) "Per JEDEC package dimensions" to the IEC INSULATION AND SAFETY-RELATED
SPECIFICATIONS FOR DW-16 PACKAGE table .............................................................................................................. 16
• Changed L(I01) Min Value From: 8 mm To: 8.3 mm .......................................................................................................... 16
• Changed L(I02) Min Value From: 7.8 mm To: 8.1 mm ....................................................................................................... 16
• Added pinout for ISO7641 and ISO7631 to Figure 6 ......................................................................................................... 18
Changes from Revision A (October 2011) to Revision B Page
• Changed feature bullet From: ISO7641FC: 1.2 mA at 10 Mbps To: ISO7641FC: 1.3 mA at 10 Mbps ............................... 1
• Changed Safety and Regulatory Approvals bullet From: 6 KVPK for 1 Minute per UL1577 and VDE (Pending) To:
6000 VPK / 4243 VRMS for 1 Minute per UL 1577 (pending) .................................................................................................. 1
• Changed Safety and Regulatory Approvals bullet From: To: 6000 VPK / 4243 VRMS for 1 Minute per UL 1577
(approved) ............................................................................................................................................................................. 1
• Changed Safety and Regulatory Approvals bullet From: CSA Component Acceptance Notice 5A, IEC 60601-1
Medical Standard (pending) To: CSA Component Acceptance Notice 5A, IEC 60601-1 Medical Standard (approved) ..... 1
• Changed all the ELECTRICAL CHARACTERISTICS tables ................................................................................................ 4
• Changed all the SWITCHING CHARACTERISTICS tables ................................................................................................. 4
• Changed the SWITCHING CHARACTERISTICS table ISO7640F and ISO7641F C-Grade values ................................... 5
• Changed the SWITCHING CHARACTERISTICS table ISO7640F and ISO7641F C-Grade values ................................... 7
• Changed the SWITCHING CHARACTERISTICS table ISO7640F and ISO7641F C-Grade values ................................... 9
• Changed the SWITCHING CHARACTERISTICS table ISO7640F and ISO7641F C-Grade values ................................. 11
• Changed the SWITCHING CHARACTERISTICS table ISO7640F and ISO7641F C-Grade values ................................. 13
• Changed the IEC 60664-1 Ratings Table ........................................................................................................................... 17
Changes from Revision B (December 2011) to Revision C Page
• Changed Safety and Regulatory Approvals bullet From: 6000 VPK / 4243 VRMS for 1 Minute per UL1577 (pending)
To: 6000 VPK / 4243 VRMS for 1 Minute per UL 1577 (approved) ......................................................................................... 1
• Changed Description text From: The devices have TTL input thresholds and can operate from 2.7 V, 3.3 V and 5 V
supplies. To: The devices have TTL input thresholds and can operate from 2.7 V (M-Grade), 3.3 V and 5 V
supplies. ................................................................................................................................................................................ 2
• Deleted the Product Preview Note From the Available Options Table ................................................................................. 3
• Changed the ESD standards ................................................................................................................................................ 3
• Changed UL in the REGULATORY INFORMATION Table From: File Number: E181974 (Approval Pending) To: File
Number: E181974 ............................................................................................................................................................... 17
• Changed the typical characteristics section ........................................................................................................................ 20
22 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated
Product Folder Link(s): ISO7640FM ISO7641FM
ISO7640FM
ISO7641FM
www.ti.com
SLLSE89D –SEPTEMBER 2011–REVISED JULY 2012
Changes from Revision C (January 2012) to Revision D Page
• Deleted devices: ISO7631FM, ISO7631FC, ISO7640FC, ISO7641FC from the data sheet ............................................... 1
• Changed the Title From: Low Power Triple and Quad Channels Digital Isolators To: Low Power Quad Channels
Digital Isolators ..................................................................................................................................................................... 1
• Deleted devices from the Features List ................................................................................................................................ 1
• Changed the DESCRIPTION ................................................................................................................................................ 1
• Changed EN1 and EN2 Pin Descriptions ............................................................................................................................. 2
• Deleted device from the Available Options Table ................................................................................................................. 3
• Changed the ELECTRICAL, SWITCHING, and SUPPLY CURRENT CHARACTERISTICS tables .................................... 4
• Changed the ELECTRICAL, SWITCHING, and SUPPLY CURRENT CHARACTERISTICS tables .................................... 6
• Changed the ELECTRICAL, SWITCHING, and SUPPLY CURRENT CHARACTERISTICS tables .................................... 8
• Changed the ELECTRICAL, SWITCHING, and SUPPLY CURRENT CHARACTERISTICS tables .................................. 10
• Changed the ELECTRICAL, SWITCHING, and SUPPLY CURRENT CHARACTERISTICS tables .................................. 12
• Deleted devices from the TYPICAL SUPPLY CURRENT EQUATIONS section ............................................................... 19
• Changed the TYPICAL CHARACTERISTICS section ........................................................................................................ 20
Copyright © 2011–2012, Texas Instruments Incorporated Submit Documentation Feedback 23
Product Folder Link(s): ISO7640FM ISO7641FM
PACKAGE OPTION ADDENDUM
www.ti.com 15-May-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
ISO7640FMDW ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR
ISO7640FMDWR ACTIVE SOIC DW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR
ISO7641FMDW ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR
ISO7641FMDWR ACTIVE SOIC DW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
ISO7640FMDWR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1
ISO7641FMDWR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
ISO7640FMDWR SOIC DW 16 2000 367.0 367.0 38.0
ISO7641FMDWR SOIC DW 16 2000 533.4 186.0 36.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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