1. General description
The 74HC30; 74HCT30 is an 8-inp ut NAND gate. Inputs include clamp diodes. This
enables the use of current limiting resistors to interface inputs to voltages in excess of
VCC.
2. Features and benefits
Complies with JEDEC standard JESD7A
Input levels:
For 74HC30: CMOS level
For 74HCT30: TTL level
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115 -A ex ce ed s 20 0 V
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
3. Ordering information
74HC30; 74HCT30
8-input NAND gate
Rev. 7 — 2 December 2015 Product data sheet
Table 1. Ordering information
Type number Package
Temperatur e ra nge Name Description Version
74HC30D 40 C to +125 C SO14 plastic small outline package; 14 leads;
body width 3.9 mm SOT108-1
74HCT30D
74HC30DB 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads; body
width 5.3 mm SOT337-1
74HCT30DB
74HC30PW 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm SOT402-1
74HCT30PW
© Nexperia B.V. 2017. All rights reserved
74HC_HCT30 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 7 — 2 December 2015 2 of 15
Nexperia 74HC30; 74HCT30
8-input NAND gate
4. Functional diagram
Fig 1. Logic symbol Fig 2. IEC logic symbol
PQD
$
<
%
&
'
(
)
*
+
PQD
Fig 3. Logic diagra m
%
$
&
'
)
(
*
+
PQD
<
© Nexperia B.V. 2017. All rights reserved
74HC_HCT30 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 7 — 2 December 2015 3 of 15
Nexperia 74HC30; 74HCT30
8-input NAND gate
5. Pinning information
5.1 Pinning
5.2 Pin description
Fig 4. Pin configuration SO1 4 an d (T)SSOP14
+&
+&7
$9
&&
%QF
&+
'*
(QF
)QF
*1' <
DDO
Table 2. Pin de scription
Symbol Pin Description
A 1 data input
B 2 data input
C 3 data input
D 4 data input
E 5 data input
F 6 data input
GND 7 ground (0 V)
Y 8 data output
n.c. 9 not connected
n.c. 10 not connected
G 11 data input
H 12 data input
n.c. 13 not connected
VCC 14 supply voltage
© Nexperia B.V. 2017. All rights reserved
74HC_HCT30 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 7 — 2 December 2015 4 of 15
Nexperia 74HC30; 74HCT30
8-input NAND gate
6. Functional description
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care.
7. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SO14 package: Ptot derates linearly with 8 mW/K above 70 C.
For (T)SSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 C.
Table 3. Function table[1]
Input Output
A B C D E F G H Y
LXXXXXXXH
XLXXXXXXH
XXLXXXXXH
XXXLXXXXH
XXXXLXXXH
XXXXXLXXH
XXXXXXLXH
XXXXXXXLH
HHHHHHHHL
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +7 V
IIK input clamping current VI < 0.5 V or VI>V
CC +0.5 V [1] -20 mA
IOK output clamping current VO<0.5 V or VO>V
CC +0.5V [1] -20 mA
IOoutput curren t 0.5 V < VO < VCC +0.5V - 25 mA
ICC supply current - 50 mA
IGND ground current 50 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation SO14, (T)SSOP14 packages [2] -500mW
© Nexperia B.V. 2017. All rights reserved
74HC_HCT30 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 7 — 2 December 2015 5 of 15
Nexperia 74HC30; 74HCT30
8-input NAND gate
8. Recommended operating conditions
9. Static characteristics
Table 5. Re commended operating conditions
Voltages are referenced to GND (ground = 0 V )
Symbol Parameter Conditions 74HC30 74HCT30 Unit
Min Typ Max Min Typ Max
VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V
VIinput voltage 0 - VCC 0-V
CC V
VOoutput voltage 0 - VCC 0-V
CC V
Tamb ambient temperature 40 - +125 40 - +125 C
t/V input transition rise and fall rate VCC = 2.0 V - - 625 - - - ns/V
VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V
VCC = 6.0 V - - 83 - - - ns/V
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ Max Min Max Min Max
74HC30
VIH HIGH-level
input voltage VCC = 2.0 V 1.5 1.2 - 1.5 - 1.5 - V
VCC = 4.5 V 3.15 2.4 - 3.15 - 3 .15 - V
VCC = 6.0 V 4.2 3.2 - 4.2 - 4.2 - V
VIL LOW-level
input voltage VCC = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V
VCC = 4.5 V - 2.1 1.35 - 1.35 - 1.35 V
VCC = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V
VOH HIGH-level
output voltage VI = VIH or VIL
IO = 20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V
IO = 20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V
IO = 20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V
IO = 4.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V
IO = 5.2 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V
VOL LOW-level
output voltage VI = VIH or VIL
IO = 20 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V
IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V
IO = 20 A; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V
IO = 4.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V
IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V
IIinput leakage
current VI = VCC or GND;
VCC =6.0V --0.1 - 1-1A
ICC supply current VI = VCC or GND; IO=0A;
VCC =6.0V --2.0- 20 - 40A
© Nexperia B.V. 2017. All rights reserved
74HC_HCT30 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 7 — 2 December 2015 6 of 15
Nexperia 74HC30; 74HCT30
8-input NAND gate
10. Dynamic characteristics
CIinput
capacitance -3.5- - - - -pF
74HCT30
VIH HIGH-level
input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V
VIL LOW-level
input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V
VOH HIGH-level
output voltage VI = VIH or VIL; VCC = 4.5 V
IO = 20 A 4.4 4.5 - 4.4 - 4.4 - V
IO = 4.0 mA 3.98 4.32 - 3.84 - 3.7 - V
VOL LOW-level
output voltage VI = VIH or VIL; VCC = 4.5 V
IO = 20 A - 0 0.1 - 0.1 - 0.1 V
IO = 4.0 mA - 0.15 0.26 - 0.33 - 0.4 V
IIinput leakage
current VI = VCC or GND;
VCC =5.5V --0.1 - 1-1A
ICC supply current VI = VCC or GND; IO=0A;
VCC =5.5V --2.0- 20 - 40A
ICC additional
supply current per input pin;
VI=V
CC 2.4 V; IO=0A;
other inputs at VCC or GND;
VCC = 4.5 V to 5.5 V
- 60 216 - 275 - 294 A
CIinput
capacitance -3.5- - - - -pF
Table 6. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ Max Min Max Min Max
Table 7. Dynamic characteristics
GND = 0 V; CL= 50 pF; for test circuit see Figure 6.
Symbol Parameter Conditions 25 C40 C to +125 CUnit
Min Typ Max Max
(85 C) Max
(125 C)
74HC30
tpd propagation delay A, B, C, D, E, F, G, H to Y;
see Figure 5 [1]
VCC = 2.0 V - 41 130 165 195 ns
VCC = 4.5 V - 15 26 33 39 ns
VCC = 5.0 V; CL=15pF - 12 - - - ns
VCC = 6.0 V - 12 22 28 33 ns
tttransition time see Figure 5 [2]
VCC = 2.0 V - 19 75 95 110 ns
VCC = 4.5 V - 7 15 19 22 ns
VCC = 6.0 V - 6 13 16 19 ns
© Nexperia B.V. 2017. All rights reserved
74HC_HCT30 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 7 — 2 December 2015 7 of 15
Nexperia 74HC30; 74HCT30
8-input NAND gate
[1] tpd is the same as tPHL and tPLH.
[2] tt is the same as tTHL and tTLH.
[3] CPD is used to determine the dynamic power dissipation (PD in W):
PD=C
PD VCC2fiN+ (CLVCC2fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CLVCC2fo) = sum of outputs.
11. Waveforms
CPD power dissipation
capacitance per package; VI=GNDtoV
CC [3] -15- - -pF
74HCT30
tpd propagation delay A, B, C, D, E, F, G, H to Y;
see Figure 5 [1]
VCC = 4.5 V - 16 28 35 42 ns
VCC = 5.0 V; CL=15pF - 12 - - - ns
tttransition time VCC = 4.5 V; see Figure 5 [2] - 7 15 19 22 ns
CPD power dissipation
capacitance per package;
VI=GNDtoV
CC 1.5 V [3] -15- - -pF
Table 7. Dynamic characteristics …continued
GND = 0 V; CL= 50 pF; for test circuit see Figure 6.
Symbol Parameter Conditions 25 C40 C to +125 CUnit
Min Typ Max Max
(85 C) Max
(125 C)
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 5. Input to output propagation dela y s an d ou tpu t trans iti on times
DDO
9
2/
9
2+
*1'
9
0
W
3+/
W
3/+
W
7+/
W
7/+
9
0
9
;
9
<
Q<RXWSXW
$%&'
()*+
LQSXW
9
,
Table 8. Measur ement points
Type Input Output
VMVMVXVY
74HC30 0.5VCC 0.5VCC 0.1VCC 0.9VCC
74HCT30 1.3 V 1.3 V 0.1VCC 0.9VCC
© Nexperia B.V. 2017. All rights reserved
74HC_HCT30 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 7 — 2 December 2015 8 of 15
Nexperia 74HC30; 74HCT30
8-input NAND gate
Test data is given in Table 9.
Definitions for test circuit:
RT= termination resistance should be equal to the output impedance Zo of the pulse generator.
CL= load capacitance including jig and probe capacitance.
Fig 6. Test circuit for measuring switching times
DDK
W:
W:
WU
WU
WI
90
9,
QHJDWLYH
SXOVH
*1'
9,
SRVLWLYH
SXOVH
*1'
9090
90
WI
9&&
'87
57
9,92
&/
*
Table 9. Test data
Type Input Load Test
VItr, tfCL
74HC30 VCC 6.0 ns 15 pF, 50 pF tPLH, tPHL
74HCT30 3.0 V 6.0 ns 15 pF, 50 pF tPLH, tPHL
© Nexperia B.V. 2017. All rights reserved
74HC_HCT30 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 7 — 2 December 2015 9 of 15
Nexperia 74HC30; 74HCT30
8-input NAND gate
12. Package outline
Fig 7. Package outline SOT108-1 (SO14)
81,7 $
PD[ $
$
$
E
S F '
(
H +
( / /
S 4 =\ZY ș
5()(5(1&(6
287/,1(
9(56,21
(8523($1
352-(&7,21 ,668('$7(
,(& -('(& -(,7$
PP
LQFKHV
R
R
',0(16,216LQFKGLPHQVLRQVDUHGHULYHGIURPWKHRULJLQDOPPGLPHQVLRQV
1RWH
3ODVWLFRUPHWDOSURWUXVLRQVRIPPLQFKPD[LPXPSHUVLGHDUHQRWLQFOXGHG
627
;
Z 0
ș
$
$
$
E
S
'
+
(
/
S
4
GHWDLO;
(
=
H
F
/
Y 0 $
$
$
\
( 06
SLQLQGH[
PP
VFDOH
62SODVWLFVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP 627
© Nexperia B.V. 2017. All rights reserved
74HC_HCT30 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 7 — 2 December 2015 10 o f 15
Nexperia 74HC30; 74HCT30
8-input NAND gate
Fig 8. Package outline SOT337-1 (SSOP14)
81,7 $
$
$
E
S F '
( H +
( / /
S 4 =\ZY ș
5()(5(1&(6
287/,1(
9(56,21
(8523($1
352-(&7,21 ,668('$7(
,(& -('(& -(,7$
PP
R
R
',0(16,216PPDUHWKHRULJLQDOGLPHQVLRQV
1RWH
3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG
627
Z 0
E
S
'
+
(
(
=
H
F
Y 0 $
;
$
\
ș
$
$
$
/
S
4
GHWDLO;
/
$
02
SLQLQGH[
PP
VFDOH
6623SODVWLFVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP 627
$
PD[
© Nexperia B.V. 2017. All rights reserved
74HC_HCT30 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 7 — 2 December 2015 11 of 15
Nexperia 74HC30; 74HCT30
8-input NAND gate
Fig 9. Package outline SOT402-1 (TSSOP14)
81,7 $
$
$
E
S F ' (
H +
( / /
S 4 =\ZY ș
5()(5(1&(6
287/,1(
9(56,21
(8523($1
352-(&7,21 ,668('$7(
,(& -('(& -(,7$
PP
R
R
',0(16,216PPDUHWKHRULJLQDOGLPHQVLRQV
1RWHV
3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG
3ODVWLFLQWHUOHDGSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG
627 02
Z 0
E
S
'
=
H
ș
$
$
$
/
S
4
GHWDLO;
/
$
+
(
(
F
Y 0 $
;
$
\
PP
VFDOH
76623SODVWLFWKLQVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP 627
$
PD[
SLQLQGH[
© Nexperia B.V. 2017. All rights reserved
74HC_HCT30 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 7 — 2 December 2015 12 o f 15
Nexperia 74HC30; 74HCT30
8-input NAND gate
13. Abbreviations
14. Revision history
Table 10. Abbreviations
Acronym Description
CMOS Complementary Metal-Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transi stor-Transistor Logic
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74HC_HCT30 v.7 20151202 Product data sheet - 74HC_HCT30 v.6
Modifications: •Type numbers 74HC30N and 74HCT30N (SOT27-1) removed.
74HC_HCT30 v.6 20121227 Product data sheet - 74HC_HCT30 v.5
Modifications: •New general description.
74HC_HCT30 v.5 2011121 3 Product data sheet - 74HC_HCT30 v.4
Modifications: •Legal pages updated.
74HC_HCT30 v.4 20100504 Product data sheet - 74HC_HCT30 v.3
74HC_HCT30 v.3 20100420 Product data sheet - 74HC_HCT30 v.2
74HC_HCT30 v.2 19970829 Product specification - -
© Nexperia B.V. 2017. All rights reserved
74HC_HCT30 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 7 — 2 December 2015 13 o f 15
Nexperia 74HC30; 74HCT30
8-input NAND gate
15. Legal information
15.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nexperia.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not b e relied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall pre va il.
Product specificat ion — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the Nexperia product is
deemed to off er functions and qualities beyond tho se described in the
Product data sheet.
15.3 Disclaimers
Limited warr a nty and liability — Information in this document is believed to
be accurate and reliable. However, Nexperia does not give any
representations or warrant ies, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no
responsibility for the content in this document if provided by an information
source outside of Nexperia.
In no event shall Nexperia be liable for any indirect, incidental,
punitive, special or consequ ential damages (including - wit hout limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use — Nexperia products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of a Nexperia product can reasonably be expected
to result in perso nal injury, death or severe property or environmental
damage. Nexperia and its suppliers accept no liability for
inclusion and/or use of Nexperia products in such equipment or
applications and ther efore such inclu sion and/or use is at the cu stomer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using Nexperia products, and Nexperia
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the Nexperia
product is suitable and fit for the customer’s applications and
products planned, as well as fo r the planned application and use of
customer’s third party customer(s). Custo mers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Nexperia does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the applica tion or use by customer’s
third party custo mer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using Nexperia
products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). Nexperia does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nexperia.com/profile/terms, unless otherwise
agreed in a valid written individua l agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. Nexperia hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of Nexperia products by customer.
No offer to sell or license — Nothing i n this document may be interpreted or
construed as an of fer t o sell product s that is open for accept ance or the gr ant,
conveyance or implication of any license under any copyrights, patents or
other industrial or inte llectual property rights.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet D evelopment This document contains data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
© Nexperia B.V. 2017. All rights reserved
74HC_HCT30 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 7 — 2 December 2015 14 o f 15
Nexperia 74HC30; 74HCT30
8-input NAND gate
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified,
the product is not suitable for automotive use. It i s neither qua lif ied nor test ed
in accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automot ive specifications and standards, custome r
(a) shall use the product without Nexperia’s warranty of the
product for such au tomotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies Nexperia for any
liability, damages or failed product claims resulting from custome r design and
use of the product for automotive applications beyond Nexperia’s
standard warranty and Nexperia’s product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
15.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respective ow ners.
16. Contact information
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Nexperia 74HC30; 74HCT30
8-input NAND gate
17. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 1
4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Functional description . . . . . . . . . . . . . . . . . . . 4
7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
8 Recommended operating conditions. . . . . . . . 5
9 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
10 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6
11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
13 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 12
14 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12
15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13
15.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13
15.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
15.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
15.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14
16 Contact information. . . . . . . . . . . . . . . . . . . . . 14
17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
© Nexperia B.V. 2017. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release:
02 December 2015
