
MIL-PRF-19500/382K
5 June 2015
SUPERSEDING
MIL-PRF-19500/382J
18 April 2012
PERFORMANCE SPECIFICATION SHEET
* TRANSISTOR, PNP, SILI CON, LOW-POWER,
ENCAPSULATED (THROUGH-HOLE AND SURFACE MOUNT), AND UNENCAPSULA TED, RADIATION
HARDNESS ASSUARANCE, DEVICE TYPES 2N2944A, 2N2945A, 2N2946A,
QUALITY LEVELS: JAN, JANTX, JANTXV, JANS, JANHC, AND JANKC
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
The requirements for acquiring the product described herein shall consist of
this specification sheet and MIL–PRF–19500.
1. SCOPE
*1.1 Scope. This specification covers the performance requirements for low-power, PNP, silicon 2N2944A,
2N2945A, 2N2946A transistors for use in high-speed, switching and general purpose amplifier applications. A ‘M ’
and UB’M’ suffix will indicate a matched pair. Four levels of product assurance are provided for each encapsulated
device type as specified in MIL–PRF–19500, and two levels of product assurance are provided for each
unencapsulated device type. Provisions for radiation hardness assurance (RHA) to eight radiation levels is provided
for quality levels JANTX, JANS, JANHC, and JANKC. RHA level designators “M”, “D”, “P“, “L”, “R”, “F”, “G”, and “H”
are appended to the device prefix to identify devices, which have passed RHA requirements.
*1.2 Package and die outline s. The device package for the encapsulated device type are as follows: TO-46 in
accordance with figure 1 and surface mount in accordance with figure 2. The dimensions and topography for JANHC
and JANKC unencapsulated die are in accordance with figure 3.
1.3 Max imum ratin gs, unl es s other w ise spe cif ied TA = +25°C.
Types
A
SP
STG
2N2944A
2N2945A, AM
mW
400
400
mW
N/A
N/A
V dc
-15
-25
V dc
-15
-25
V dc
-10
-20
V dc
-10
-20
mA dc
-100
-100
°C
-65 to
+200
°C/W
435
435
°C/W
N/A
N/A
2N2944AUB
2N2945AUB
2N2945AUBM
400
400
400
800
800
800
-15
-25
-25
-15
-25
-25
-10
-20
-20
-10
-20
-20
-100
-100
-100
-65 to
+200 435 (5)
435 (5)
435 (5)
90
90
90
(1) For derating, see figures 4 and 5.
(2) See 3.3 for abbreviations.
(3) For thermal curves, see figures 6 and 7.
AMSC N/A FSC 5961
* Comments, suggestions, or questions on this document should be to DLA Land and Maritime, ATTN: VAC,
P.O. Box 3990, Columbus, OH 43218-3990, or emailed to Semiconductor@dla.mil. Since contact infor mat ion
can change, you may want to verify the currency of this address information using the ASSIST Online database
at https://assist.dla.mil .
The documentation and process conversion
measures necessary to comply with this document
shall be completed by 5 September 2015.