Application Circuits (Continued)
Transistor Q1 provides a disconnect between the battery
and the LM3420 when the input voltage is removed. This
prevents the 85 µA quiescent current of the LM3420 from
eventually discharging the battery. In this application Q1 is
used as a low offset saturated switch, with the majority of the
base drive current flowing through the collector and crossing
over to the emitter as the battery becomes fully charged. It
provides a very low collector to emitter saturation voltage
(approximately 5 mV). Diode D1 is also used to prevent the
battery current from flowing through the LM317 regulator
from the output to the input when the DC input voltage is
removed.
As the battery charges, its voltage begins to rise, and is
sensed at the IN pin of the LM3420. Once the battery voltage
reaches 8.4V, the LM3420 begins to regulate and starts
sourcing current to the base of Q2. Transistor Q2 begins
controlling the ADJ. pin of the LM317 which begins to regu-
late the voltage across the battery and the constant voltage
portion of the charging cycle starts. Once the charger is in
the constant voltage mode, the charger maintains a regu-
lated 8.4V across the battery and the charging current is
dependent on the state of charge of the battery. As the cells
approach a fully charged condition, the charge current falls
to a very low value.
Figure 6 shows a Li-Ion battery charger that features a
dropout voltage of less than one volt. This charger is a
constant-current, constant-voltage charger (it operates in
constant-current mode at the beginning of the charge cycle
and switches over to a constant-voltage mode near the end
of the charging cycle). The circuit consists of two basic
feedback loops. The first loop controls the constant charge
current delivered to the battery, and the second determines
the final voltage across the battery.
With a discharged battery connected to the charger, (battery
voltage is less than 8.4V) the circuit begins the charge cycle
with a constant charge current. The value of this current is
set by using the reference section of the LM10C to force 200
mV across R7 thus causing approximately 100 µA of emitter
current to flow through Q1, and approximately 1 mA of
emitter current to flow through Q2. The collector current of
Q1 is also approximately 100 µA, and this current flows
through R2 developing 50 mV across it. This 50 mV is used
as a reference to develop the constant charge current
through the current sense resistor R1.
The constant current feedback loop operates as follows.
Initially, the emitter and collector current of Q2 are both
approximately 1 mA, thus providing gate drive to the MOS-
FET Q3, turning it on. The output of the LM301A op-amp is
low. As Q3’s current reaches 1A, the voltage across R1
approaches 50 mV, thus canceling the 50 mV drop across
R2, and causing the op-amp’s output to start going positive,
and begin sourcing current into R8. As more current is forced
into R8 from the op-amp, the collector current of Q2 is
reduced by the same amount, which decreases the gate
drive to Q3, to maintain a constant 50 mV across the 0.05Ω
current sensing resistor, thus maintaining a constant 1A of
charge current.
The current limit loop is stabilized by compensating the
LM301A with C1 (the standard frequency compensation
used with this op-amp) and C2, which is additional compen-
sation needed when D3 is forward biased. This helps speed
up the response time during the reverse bias of D3. When
the LM301A output is low, diode D3 reverse biases and
prevents the op-amp from pulling more current through the
emitter of Q2. This is important when the battery voltage
reaches 8.4V, and the 1A charge current is no longer
needed. Resistor R5 isolates the LM301A feedback node at
the emitter of Q2.
The battery voltage is sensed and buffered by the op-amp
section of the LM10C, connected as a voltage follower driv-
ing the LM3420. When the battery voltage reaches 8.4V, the
LM3420 will begin regulating by sourcing current into R8,
which controls the collector current of Q2, which in turn
reduces the gate voltage of Q3 and becomes a constant
voltage regulator for charging the battery. Resistor R6 iso-
lates the LM3420 from the common feedback node at the
emitter of Q2. If R5 and R6 are omitted, oscillations could
occur during the transition from the constant-current to the
constant-voltage mode. D2 and the PNP transistor input
stage of the LM10C will disconnect the battery from the
charger circuit when the input supply voltage is removed to
prevent the battery from discharging.
01235911
FIGURE 6. Low Drop-Out Constant Current/Constant Voltage 2-Cell Charger
LM3420-4.2/LM3420-8.2/LM3420-8.4/LM3420-12.6/LM3420-16.8
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