INTEGRATED CIRCUITS DATA SHEET TDA8580J Multi-purpose power amplifier Preliminary specification Supersedes data of 1998 Feb 25 File under Integrated Circuits, IC01 2000 Apr 18 Philips Semiconductors Preliminary specification Multi-purpose power amplifier TDA8580J FEATURES Protection General * Low distortion * Short-circuit proof to ground, positive supply voltage and across load; the supply voltage ranges where the different short circuit conditions are guaranteed are given in Chapter "Limiting values" * Few external components, fixed gain * ESD protected on all pins * High output power * Thermal protection against temperatures exceeding 150 C. * Supply voltage range from 8 to 24 V * Can be used as a stereo amplifier in Bridge-Tied Load (BTL) or quad Single-Ended (SE) amplifiers * Single-ended mode without loudspeaker capacitor GENERAL DESCRIPTION * Mute and standby mode with one- or two-pin operation The TDA8580J is a stereo Bridge-Tied Load (BTL) or a quad Single-Ended (SE) amplifier that operates over a wide supply voltage range from 8 to 24 V. This makes it suitable for applications such as television, home-sound systems and active speakers. * Diagnostic information for Dynamic Distortion Detector (DDD), high temperature (145 C) and short-circuit * No switch on/off plops when switching between standby and mute or mute and on; an external RC-network is prescribed to ensure plop-free operation Because of an internal voltage buffer, this device can be used without a capacitor connected in series with the load (SE application). A combined BTL and 2 x SE application can also be configured (one chip stereo and subwoofer application). * Low offset variation at outputs between mute and on * Fast mute on supply voltage drops. ORDERING INFORMATION TYPE NUMBER TDA8580J 2000 Apr 18 PACKAGE NAME DESCRIPTION VERSION DBS17P plastic DIL-bent-SIL power package; 17 leads (lead length 12 mm) SOT243-1 2 Philips Semiconductors Preliminary specification Multi-purpose power amplifier TDA8580J QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VP operating supply voltage 8.0 14.4 24 V Iq(tot) total quiescent current VP = 14.4 V - 140 170 mA Istb standby supply current VP = 14.4 V - 1 50 A 31 32 33 dB 14 15 - W Bridge-tied load application Gv voltage gain Po output power THD total harmonic distortion Voffset(DC) DC output offset voltage THD = 0.5%; VP = 14.4 V; RL = 4 THD = 0.5%; VP = 24 V; RL = 8 21 23 - W fi = 1 kHz; Po = 1 W; VP = 14.4 V; RL = 4 - 0.05 0.1 % fi = 1 kHz; Po = 10 W; VP = 24 V; RL = 8 - 0.02 0.05 % VP = 14.4 V; mute condition; RL = 4 - 10 20 mV VP = 14.4 V; on condition - 0 140 mV Vno noise output voltage Rs = 1 k; VP = 14.4 V - 100 150 V SVRR supply voltage ripple rejection fi = 1 kHz; Vripple(p-p) = 2 V; on or mute condition; Rs = 0 50 60 - dB 25 26 27 dB THD = 0.5%; VP = 14.4 V; RL = 4 3.8 4.0 - W THD = 0.5%; VP = 24 V; RL = 4 10.5 11.5 - W Single-ended application Gv voltage gain Po output power Voffset(DC) DC output offset voltage VP = 14.4 V; mute condition; RL = 4 - 10 20 mV VP = 14.4 V; on condition - 0 100 mV Vno noise output voltage Rs = 1 k; VP = 14.4 V - 80 120 V SVRR supply voltage ripple rejection fi = 1 kHz; Vripple(p-p) = 2 V; on or mute condition; Rs = 0 40 45 - dB 2000 Apr 18 3 Philips Semiconductors Preliminary specification Multi-purpose power amplifier TDA8580J BLOCK DIAGRAM VP1 VP2 3 15 handbook, full pagewidth IN1 7 60 k TDA8580J IN2 45 k - - V/I + + 8 60 k + + - V/I - 9 45 k 60 k 10 STANDBY 11 45 k - - V/I + + OA + + - - V/I OA 14 17 OUT3- OUT4+ 45 k 13 5 DIAGNOSTIC INTERFACE 2 6 16 MGE010 PGND1 Fig.1 Block diagram. 2000 Apr 18 BUFFER BUFFER 12 60 k MUTE OUT2- 45 k BUFFER IN4 4 OUT1+ 45 k 30 k IN5 OA 1 Vpx Vpx IN3 OA 4 PGND2 DIAG Philips Semiconductors Preliminary specification Multi-purpose power amplifier TDA8580J PINNING SYMBOL PIN DESCRIPTION OUT1+ 1 non-inverting output 1 PGND1 2 power ground 1 VP1 3 supply voltage 1 OUT2- 4 inverting output 2 STANDBY 5 standby/mute/on selection input DIAG 6 diagnostic output IN1 7 input 1 IN2 8 input 2 BUFFER 9 single-ended buffer output IN3 10 input 3 IN4 11 input 4 IN5 12 input 5; signal ground capacitor connection MUTE 13 mute/on selection input OUT3- 14 inverting output 3 VP2 15 supply voltage 2 PGND2 16 power ground 2 OUT4+ 17 non-inverting output 4 handbook, halfpage OUT1+ 1 PGND1 2 VP1 3 OUT2- 4 STANDBY 5 DIAG 6 IN1 7 IN2 8 BUFFER 9 IN3 10 IN4 11 IN5 12 MUTE 13 OUT3- 14 VP2 15 PGND2 16 OUT4+ 17 TDA8580J MGE009 Fig.2 Pin configuration. 2000 Apr 18 5 Philips Semiconductors Preliminary specification Multi-purpose power amplifier TDA8580J * Low noise levels, which are independent of the supply voltage. FUNCTIONAL DESCRIPTION The TDA8580J is a multi-purpose power amplifier with four amplifiers which can be connected in the following configurations with high output power and low distortion (at minimum quiescent current): Protections are included to avoid the IC being damaged at: * Over temperature: Tj > 150 C * Short-circuit of the output pin(s) to ground or supply rail; when short-circuited, the power dissipation is limited * Dual bridge-tied load amplifiers * Quad single-ended amplifiers * ESD protection (Human Body Model 3000 V, Machine Model 300 V) * Dual single-ended amplifiers and one bridge-tied load amplifier. * Energy handling. A DC voltage of 6 V can be connected to the output of any amplifier while the supply pins are short-circuited to ground. The amplifier can be switched in on, mute and off (standby) by the MUTE and STANDBY pins (for interfacing directly with a microcontroller). One-pin operation is also possible by applying a voltage greater than 8 V to the STANDBY pin to switch the amplifier in on mode. Diagnostics are available for the following conditions (see Figs 3, 4 and 5): * Chip temperature above 145 C Special attention is given to the dynamic behaviour as follows: * Distortion over 2% due to clipping * Short-circuit protection active. * Slow offset change between mute and on (controlled by MUTE and STANDBY pins) LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT operating - 24 V no signal condition - 28 V - 18 V non-repetitive peak output current - 6 A IORM repetitive peak output current - 4.5 A VP(scol) supply voltage with short-circuit across load - 28 V VP(scg) supply voltage with short-circuit from output to ground - 26 V VP(scs) supply voltage with short-circuit from output to supply - 16 V VP(rp) reverse polarity - 6 V Ptot total power dissipation - 75 W Tj junction temperature - 150 C Tstg storage temperature -55 +150 C Tamb ambient temperature -40 +85 C VP supply voltage VDIAG voltage on pin DIAG IOSM THERMAL CHARACTERISTICS SYMBOL PARAMETER Rth(j-a) thermal resistance from junction to ambient Rth(j-c) thermal resistance from junction to case 2000 Apr 18 CONDITIONS in free air 6 VALUE UNIT 40 K/W 1.5 K/W Philips Semiconductors Preliminary specification Multi-purpose power amplifier TDA8580J CHARACTERISTICS VP = 14.4 V; Tamb = 25 C; fi = 1 kHz; RL = ; measured in test circuit of Fig.28; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT 24 V Supplies VP operating supply voltage 8.0 14.4 Iq(tot) total quiescent current - 140 170 mA Istb standby current - 1 50 A VO DC output voltage - 7.0 - V VP(mute) low supply voltage mute 6.0 7.0 8.0 V VI DC input voltage - 4.0 - V 0 - 0.8 V Control pins STANDBY PIN (see Table 1) V5(stb) voltage at STANDBY pin for standby condition Vhys(5)(stb) hysteresis voltage at STANDBY pin for standby condition note 1 - 0.2 - V V5(mute) voltage at STANDBY pin for mute condition V13 < 0.8 V 2.0 - 5.3 V V5(on) voltage at STANDBY pin for on condition VP > 9 V; note 2 8.0 - 18 V V5 = 5 V 0 - 0.8 V 2.5 - 5.3 V Isink = 1 mA - 0.2 0.8 V MUTE PIN (see Table 1) V13(mute) voltage at MUTE pin for mute condition V13(on) voltage at MUTE pin for on condition V5 = 5 V Diagnostic; output buffer (open-collector); see Figs 3, 4 and 5 VOL LOW-level output voltage ILI leakage current VDIAG = 14.4 V - - 1 A CD clip detector VDIAG < 0.8 V 1 2 4 % Tj(diag) junction temperature for high temperature warning VDIAG < 0.8 V - 145 - C Stereo BTL application; see Figs 6, 7, 10, 11, 14, 15, 18, 19, 21, 22, 23, 24, 26 and 28 THD Po Gv 2000 Apr 18 total harmonic distortion output power voltage gain fi = 10 kHz; Po = 1 W; RL = 4 ; filter: 22 Hz < f < 30 kHz - 0.2 0.3 % fi = 1 kHz; Po = 1 W; VP = 14.4 V; RL = 4 - 0.05 0.1 % fi = 1 kHz; Po = 10 W; VP = 24 V; RL = 8 - 0.02 0.05 % THD = 0.5%; VP = 14.4 V; RL = 4 14 15 - W THD = 0.5%; VP = 24 V; RL = 8 21 23 - W THD = 10%; VP = 14.4 V; RL = 4 18 20 - W THD = 10%; VP = 24 V; RL = 8 28 30 - W Vo(rms) = 3 V 31 32 33 dB 7 Philips Semiconductors Preliminary specification Multi-purpose power amplifier SYMBOL TDA8580J PARAMETER cs channel separation Gv channel unbalance Voffset(DC) DC output offset voltage CONDITIONS Po = 2 W; fi = 1 kHz; RL = 4 MIN. TYP. MAX. UNIT 60 65 - dB - - 1 dB on condition - 0 140 mV mute condition; RL = 4 - 10 20 mV Vno noise output voltage Rs = 1 k; VP = 14.4 V; note 3 - 100 150 V Vno(mute) noise output voltage mute note 3 - 0 20 V Vo(mute) output voltage mute Vi(rms) = 1 V - 3 500 V SVRR supply voltage ripple rejection Rs = 0 ; fi = 1 kHz; Vripple(p-p) = 2 V; on or mute condition 50 60 - dB Zi input impedance 23 30 37 k CMRR common mode rejection ratio - 60 - dB fi = 1 kHz; Po = 1 W; RL = 4 - 0.05 0.1 % fi = 10 kHz; Po = 1 W; RL = 4 ; filter: 22 Hz < f < 30 kHz - 0.2 0.3 % fi = 1 kHz; Po = 1 W; VP = 24 V, RL = 4 ; filter: 22 Hz < f < 30 kHz - 0.05 0.1 % THD = 0.5%; VP = 14.4 V; RL = 4 3.8 4.0 - W THD = 0.5%; VP = 24 V; RL = 4 10.5 11.5 - W Rs = 0 ; Vi(rms) = 0.5 V; fi = 1 kHz Quad SE application; see Figs 8, 9, 12, 13, 16, 17, 20, 25, 27 and 29 THD Po Gv total harmonic distortion output power THD = 10%; VP = 14.4 V; RL = 4 4.9 5.2 - W THD = 10%; VP = 24 V; RL = 4 14 15 - W voltage gain Vo(rms) = 3 V 25 26 27 dB Po = 2 W; fi = 1 kHz; RL = 4 40 46 - dB - - 1 dB VP = 14.4 V; on condition - 0 100 mV VP = 14.4 V; mute condition; RL = 4 - 10 20 mV cs channel separation Gv channel unbalance Voffset(DC) DC output offset voltage Vno noise output voltage Rs = 1 k; VP = 14.4 V; note 3 - 80 120 V Vno(mute) noise output voltage mute note 3 - 0 20 V Vo(mute) output voltage mute Vi(rms) = 1 V - 3 500 V SVRR supply voltage ripple rejection fi = 1 kHz; Vripple(p-p) = 2 V, on or mute condition; Rs = 0 40 45 - dB Zi input impedance 46 60 74 k CMRR common mode rejection ratio - 60 - dB Vi(rms) = 0.5 V; fi = 1 kHz; Rs = 0 Notes 1. Hysteresis between the rise and fall voltage when pin STANDBY is controlled with low ohmic voltage source. 2. At lower VP the voltage at the STANDBY pin for on condition will be adjusted automatically to maintain an on condition at low battery voltage (down to 8 V) when using one-pin operation. 3. The noise output is measured in a bandwidth of 20 Hz to 20 kHz. 2000 Apr 18 8 Philips Semiconductors Preliminary specification Multi-purpose power amplifier Table 1 TDA8580J Selection of standby, mute and on VOLTAGE AT PIN STANDBY VOLTAGE AT PIN MUTE FUNCTION < 0.8 V don't care standby (off) 2 to 5.3 V < 0.8 V mute (DC settled) 2 to 5.3 V 2.5 to 5.3 V on (AC operating) 8.0 V don't care on (AC operating) temperature overload handbook, halfpage handbook, halfpage normal DIAG active DDD normal DIAG amplifier output amplifier output MGE021 MGE020 Fig.3 Diagnostic waveform: temperature overload. 2000 Apr 18 Fig.4 Diagnostic waveform: DDD function. 9 Philips Semiconductors Preliminary specification Multi-purpose power amplifier TDA8580J MGS700 1 handbook, halfpage THD (%) short-circuit to VP GND handbook, halfpage (1) 10-1 DIAG (2) amplifier output 10-2 10 MGE022 102 103 104 f (Hz) 105 i RL = 4 ; VP = 14.4 V; 2 channel driven. (1) Po = 1 W. (2) Po = 10 W. Fig.5 Diagnostic waveform: short-circuit to GND or VP. Fig.6 MGS701 1 Total harmonic distortion as a function of frequency; BTL mode. MGS702 1 handbook, halfpage handbook, halfpage THD (%) THD (%) 10-1 10-1 (1) (2) 10-2 10 102 103 10-2 10 104 f (Hz) 105 i 102 103 104 f (Hz) 105 i RL = 8 ; VP = 24 V; 2 channel driven. (1) Po = 1 W. (2) Po = 10 W. Po = 1 W; RL = 4 ; VP = 14.4 V; 4 channel driven. Fig.7 Fig.8 Total harmonic distortion as a function of frequency; BTL mode. 2000 Apr 18 10 Total harmonic distortion as a function of frequency; SE mode. Philips Semiconductors Preliminary specification Multi-purpose power amplifier TDA8580J MGS703 1 MGS704 102 handbook, halfpage handbook, halfpage THD (%) THD (%) (2) (1) (3) 10 10-1 1 (1) (1) 10-1 (2) (2) (3) 10-2 10 102 103 10-2 10-1 104 f (Hz) 105 i 10 Po (W) 102 RL = 4 ; VP = 14.4 V; 2 channel driven. (1) fi = 10 kHz. (2) fi = 1 kHz. (3) fi = 100 Hz. RL = 4 ; VP = 24 V; 4 channel driven. (1) Po = 5 W. (2) Po = 1 W. Fig.9 1 Total harmonic distortion as a function of frequency; SE mode. Fig.10 Total harmonic distortion as a function of output power; BTL mode. MGS705 102 handbook, halfpage MGS706 102 handbook, halfpage THD (%) THD (%) (2) (3) (1) 10 (2) (1) (3) 10 1 1 (1) (1) 10-1 10-1 (2) (2) (3) (3) 10-2 10-1 1 10 Po (W) 10-2 10-1 102 1 Po (W) 10 RL = 8 ; VP = 24 V; 2 channel driven. (1) fi = 10 kHz. (2) fi = 1 kHz. (3) fi = 100 Hz. RL = 4 ; VP = 14.4 V; 4 channel driven (1) fi = 10 kHz. (2) fi = 1 kHz. (3) fi = 100 Hz. Fig.11 Total harmonic distortion as a function of output power; BTL mode. Fig.12 Total harmonic distortion as a function of output power; SE mode. 2000 Apr 18 11 Philips Semiconductors Preliminary specification Multi-purpose power amplifier TDA8580J MGS707 102 handbook, halfpage MGS708 30 handbook, halfpage THD (%) Pd (W) (2) (3) (1) 10 20 1 10 (1) 10-1 (2) (3) 10-2 10-1 1 10 Po (W) 0 102 0 RL = 4 ; VP = 24 V; 4 channel driven. (1) fi = 10 kHz. (2) fi = 1 kHz. (3) fi = 100 Hz. 10 20 Po (W) fi = 1 kHz; RL = 4 ; VP = 14.4 V; 2 channel driven. Fig.13 Total harmonic distortion as a function of output power; SE mode. Fig.14 Power dissipation as a function of output power; BTL mode. MGS709 MGS710 16 40 handbook, halfpage handbook, halfpage Pd (W) Pd (W) 30 12 20 8 10 4 0 0 0 30 10 20 30 Po (W) 40 0 2 4 Po (W) 6 fi = 1 kHz; RL = 8 ; VP = 24 V; 2 channel driven. fi = 1 kHz; RL = 4 ; VP = 14.4 V; 4 channel driven. Fig.15 Power dissipation as a function of output power; BTL mode. Fig.16 Power dissipation as a function of output power; SE mode. 2000 Apr 18 12 Philips Semiconductors Preliminary specification Multi-purpose power amplifier TDA8580J MGS712 MGS711 40 40 handbook, halfpage handbook, halfpage Pd (W) Po (W) 30 30 20 20 (1) (2) 10 10 0 0 0 4 8 12 Po (W) 16 8 12 16 VP (V) 20 fi = 1 kHz; RL = 4 ; VP = 24 V; 4 channel driven. fi = 1 kHz; RL = 4 ; 2 channel driven. (1) THD = 10%. (2) THD = 0.5%. Fig.17 Power dissipation as a function of output power; SE mode. Fig.18 Output power as a function of supply voltage; BTL mode. MGS714 MGS713 40 16 handbook, halfpage handbook, halfpage Po (W) Po (W) 30 12 20 8 (1) (1) (2) 4 10 (2) 0 0 8 12 16 20 VP (V) 24 8 12 16 20 VP (V) 24 fi = 1 kHz; RL = 8 ; 2 channel driven. (1) THD = 10%. (2) THD = 0.5% fi = 1 kHz; RL = 4 ; 2 channel driven. (1) THD = 0.5%. (2) THD = 10% Fig.19 Output power as a function of supply voltage; BTL mode. Fig.20 Output power as a function of supply voltage; SE mode. 2000 Apr 18 13 Philips Semiconductors Preliminary specification Multi-purpose power amplifier TDA8580J MGS717 34 Po Gv (dB) (W) 33 0.4 32 0 31 -0.4 30 10 MGS715 0.8 handbook, halfpage 102 103 -0.8 10 104 f (Hz) 105 i 102 103 104 f (Hz) 105 i Ci = 470 nF. THD = 0.5%; RL = 4 ; VP = 14.4 V. Fig.21 Gain as a function of input frequency; BTL mode. Fig.22 Power bandwidth as a function of frequency; BTL mode. MGS716 0.8 MGS718 -50 handbook, halfpage handbook, halfpage cs (dB) Po (W) -54 0.4 -58 0 -62 (1) -0.4 -0.8 10 -66 102 103 -70 10 104 f (Hz) 105 i (2) 102 103 104 f (Hz) 105 i THD = 0.5%; RL = 8 ; VP = 24 V. Po = 2 W; RL = 4 ; VP = 14.4 V. (1) Channels 3 and 4 to channels 1 and 2. (2) Channels 1 and 2 to channels 3 and 4. Fig.23 Power bandwidth as a function of frequency; BTL mode. Fig.24 Channel separation as a function of frequency; BTL mode. 2000 Apr 18 14 Philips Semiconductors Preliminary specification Multi-purpose power amplifier TDA8580J MGS719 -20 MGS720 -20 handbook, halfpage handbook, halfpage cs (dB) SVRR (dB) -30 -40 -40 (1) (1) (2) (3) (2) -60 -50 -60 10 102 103 -80 10 104 f (Hz) 105 i 102 103 104 f (Hz) 105 i Po = 2 W; RS = 0 ; RL = 4 ; VP = 14.4 V. (1) Channel 1 to channel 2. (2) Channel 1 to channel 3. (3) Channel 1 to channel 4. Rs = 0 ; Vripple(p-p) = 2 V. (1) Vp = 14.4 V. (2) Vp = 24 V. Fig.25 Channel separation as a function of frequency; SE mode. Fig.26 SVRR as a function of frequency; BTL mode. MGS721 -20 handbook, halfpage SVRR (dB) -30 -40 (1) (2) -50 -60 10 102 103 104 f (Hz) 105 i Rs = 0 ; Vripple(p-p) = 2 V. (1) Vp = 14.4 V. (2) Vp = 24 V. Fig.27 SVRR as a function of frequency; SE mode. 2000 Apr 18 15 Philips Semiconductors Preliminary specification Multi-purpose power amplifier TDA8580J * The 4.7 F capacitor and the 10 k resistor connected to pin 5 or to pin 13 are used to: APPLICATION INFORMATION The application circuit depends on the supply voltage used. For supply voltages below 18 V the application circuits are shown in Figs 28, 29 and 30. - provide a stable loop - control the switch on/off behaviour - minimize the effect due to clip detection. The typical application circuits for the different supply voltage ranges are shown in Figs 31, 32 and 33. Use of common buffer Additional information for the applications shown in Figs 28, 29 and 30 In SE applications the buffer output is used in place of a SE capacitor. To minimize the crosstalk (high channel separation) and distortion it is advised to connect the speaker wires as closely as possible to pin 9 without using a shared wire. Internally in the IC all the efforts have been taken to minimize the crosstalk by locating the feedback loops as close as possible to pin 9. The RC-network connected to pin 5 determines the amplifier switch on/off behaviour as follows; * Switched from STANDBY to MUTE when Vswitching (typically 9 V) is enabled and the switch SW1 is closed. During MUTE there is no output noise and no offset. * Switched from MUTE to ON when the switch SW1 is opened. During switching ON the offset and noise are gradually built up. The time constant is fixed by R1 x C1. If a common wire is shared by all the speakers, the series resistance of this shared wire will introduce added signal voltages resulting from the currents flowing through this wire when a connected amplifier is driven by a signal. The inputs can be tied together and connected to one input capacitor. Because the input resistance is decreased by a factor of 2, the low frequency roll-off is shifted to a higher frequency when Ci is kept the same value. Optimize the THD performance The TDA8580J application can be optimized to gain the lowest THD possible by applying the following guidelines: The low frequency cut-off is determined by; * SE application: minimize the shared wires to pin 9 (see section "Use of common buffer"). f -3dB = 1 ( 2 x R i x C i ) * Because the inputs are quasi differential, ground loops can be avoided by connecting the negative terminal of the 100 F signal ground capacitor (connected to pin 12) to the ground pin of the signal processor. 1 = --------------------------------------------------------------------- = 12 Hz. 3 -9 2 x 60 x 10 x 220 x 10 The Boucherot network connected to the buffer (pin 9) is necessary to guarantee a low output resistance at high frequencies when the buffer is loaded (only in SE applications). Note: do not leave the inputs in the open condition to prevent HF oscillation. * Increase the value of electrolytic supply capacitor (typical value 1000 F) to the maximum possible to minimize cross talk and distortion at low signal frequencies, due to the PSRR (power supply rejection ratio). For suppressing high frequency transients on the supply line a capacitor (typical value 100 nF) with a low ESR is required to be connected in parallel with the electrolytic capacitor. The capacitor combination must be placed as close as possible to the IC (using short interconnection tracks). Additional information for the applications shown in Figs 31, 32 and 33 Short circuit behaviour at high supply voltages (Vp > 18 V): * When Vp > 18 V it is advisable to use the applications given in Figs 32 and 33. In these applications the diagnostics output is tied to pin 5 (one pin operation) or pin 13 (two pin operation). During a fault condition the amplifier is soft-muted and the amplitude of the output signal is reduced at: Headroom - over temperature (still large dynamic range) A typical CD requires at least 12 dB dynamic headroom (a factor of 15.85), compared with the average power output, for passing the loudest parts without distortion. - short to ground and over load (output current reduced) 2000 Apr 18 16 Philips Semiconductors Preliminary specification Multi-purpose power amplifier TDA8580J For BTL application at Vp = 24 V, RL = 8 and Po at THD = 0.5% (see Fig.15), the Average Listening Level (ALL) for music power without distortion yields: 23 P o ( ALL ) = --------------- = 1.45 W. 15.85 EXAMPLE Measured or given values: Vp = 24 V RL = 8 (2 x BTL) Measured worst case Pd (sine wave) = 32 W Table 2 Pd as a function of headroom (music signals) for Po = 2 x 23 W (THD = 0.5%). HEADROOM Tj(max) = 150oC Tamb(max) = 60oC Pd 0 dB 32 W 12 dB 16 W Rth(j-c) = 1.5 K/W T j ( max ) - T amb ( max ) R th ( hs ) = ------------------------------------------------- - R th ( j - c ) Pd 150 - 60 = ---------------------- - 1.5 = 1.3 K/W 32 So for the average music listening level a total power dissipation of 16 W can be used for calculating the optimum heat sink thermal resistance. Table 3 Heatsink calculation HEAD ROOM The measured thermal resistance of this package Rth(j-c) is a maximum of 1.5 K/W. For a maximum ambient temperature of 60oC the required heatsink thermal resistance can be calculated as shown in the following example. 2000 Apr 18 Heatsink thermal resistance as a function of headroom for Po = 2 x 23 W (THD = 0.5%). 17 Pd Rth(hs) 0 dB 32 W 1.3 K/W 12 dB 16 W 4.12 K/W Philips Semiconductors Preliminary specification Multi-purpose power amplifier TDA8580J handbook, full pagewidth 1000 F 16/40 V 220 nF VP1 VP2 3 15 IN1 7 60 k VinL TDA8580J 45 k - - V/I + + IN2 8 60 k + - V/I - + OA 4 OUT2- 9 BUFFER 45 k 60 k IN3 10 60 k IN4 11 BUFFER 45 k - - V/I + + - V/I 14 OUT3- + - + + - OA OA 17 45 k DIAGNOSTIC INTERFACE Vswitching (9 V typical) 2 PGND1 +5 V 6 DIAG 16 PGND2 MGU075 R1 (1) R2 4.7 F SW1 (1) R1 and R2 values depend on Vswitching applied; the value of R1 and R2 connected in parallel should be minimum 10 k. Fig.28 Stereo bridge-tied load application; VP 18 V. 2000 Apr 18 18 4 or 8 OUT4+ MUTE 13 5 4 or 8 45 k IN5 12 STANDBY - 45 k BUFFER VinR 1 OUT1+ Vpx 30 k 100 F 10 V OA + Vpx 220 nF VP 100 nF 10 k Philips Semiconductors Preliminary specification Multi-purpose power amplifier TDA8580J VP handbook, full pagewidth 1000 F 16/40 V VP1 VP2 3 15 100 nF 220 nF IN1 7 VinR 60 k TDA8580J FRONT 45 k - - V/I + + 220 nF IN2 8 60 k VinL + - V/I - 4 OUT2- OA - 45 k 9 45 k IN5 12 60 k IN3 10 220 nF IN4 11 220 nF BUFFER + - V/I + + 14 OUT3- OA - + + - V/I 4 or 8 - 45 k - - 2 BUFFER VinR 60 k 17 OA OUT4+ + 4 or 8 45 k +5 V VinL MUTE 13 STANDBY 5 DIAGNOSTIC INTERFACE Vswitching (9 V typical) 2 PGND1 6 DIAG 16 PGND2 MGU077 R1 (1) R2 4.7 F SW1 (1) R1 and R2 values depend on Vswitching applied; the value of R1 and R2 connected in parallel should be minimum 10 k. Fig.29 Quad single-ended application; VP 18 V. 2000 Apr 18 19 4 or 8 + 45 k BUFFER REAR 4 or 8 - Vpx 30 k 220 nF OUT1+ + + Vpx 100 F 10 V 1 OA 10 k Philips Semiconductors Preliminary specification Multi-purpose power amplifier TDA8580J handbook, full pagewidth 220 nF VP1 VP2 3 15 100 nF IN1 7 45 k - 60 k VinR - V/I + TDA8580J + IN2 8 - V/I - OUT1+ + 4 OUT2- OA 45 k 45 k 30 k 9 45 k BUFFER 60 k + - V/I + 14 OUT3- OA - + + 60 k - IN4 11 - V/I 4 or 8 - 45 k + IN3 10 220 nF BUFFER - IN5 12 2 BUFFER VinR 220 nF 4 or 8 - Vpx Vpx 100 F 10 V 1 OA + + 60 k 220 nF VP 1000 F 16/40 V 17 OA OUT4+ 4 or 8 + 45 k +5 V VinL MUTE 13 STANDBY 5 DIAGNOSTIC INTERFACE Vswitching (9 V typical) 2 PGND1 6 DIAG 16 PGND2 MGU076 R1 (1) R2 4.7 F SW1 (1) R1 and R2 values depend on Vswitching applied; the value of R1 and R2 connected in parallel should be minimum 10 k. Fig.30 Dual single-ended and one bridge-tied load application; VP 18 V. 2000 Apr 18 20 10 k Philips Semiconductors Preliminary specification Multi-purpose power amplifier handbook, full pagewidth TDA8580J VP 100 nF VP1 1000 F IN1 IN2 inputs IN3 Vswitching IN4 (9 V typical) IN5 (3) R1 45 k 7 3 8 4 10 14 11 TDA8580J 17 9 12 OUT1+ OUT2- OUT3- (1) OUT4 + BUFFER 2 (2) 220 nF (2) 6 5 2 R2 15 k 1 100 F STANDBY (3) VP2 15 DIAG 10 k +5 V 16 PGND1 MGS699 PGND2 4.7 F SW1 (1) Load conditions: quad SE (4 x 4 ), or dual BTL (2 x 8 ), or dual SE (2 x 4 ) and one BTL (1 x 8 ). (2) RC combination not required in BTL mode. (3) R1 and R2 values depend on Vswitching applied; the value of R1 and R2 connected in parallel should be minimum 10 k. Fig.31 Application 1; supply voltage range 8 V < VP 18 V; 1-pin and 2-pin operation. handbook, full pagewidth VP 100 nF VP1 1000 F IN1 IN2 inputs IN3 IN4 Vswitching (9 V typical) (3) R1 45 k IN5 100 F MUTE STANDBY 7 3 R2 15 k 4 10 14 11 TDA8580J 17 9 12 OUT1+ OUT2- OUT3- (1) OUT4 + BUFFER 2 (2) 220 nF (2) 13 6 5 DIAG 16 PGND1 4.7 F 1 8 2 (3) VP2 15 PGND2 3.6 V SW1 MGS697 (1) Load conditions: quad SE (4 x 4 ), or dual BTL (2 x 8 ), or dual SE (2 x 4 ) and one BTL (1 x 8 ). (2) RC combination not required in BTL mode. (3) R1 and R2 values depend on Vswitching applied; the value of R1 and R2 connected in parallel should be minimum 10 k. Fig.32 Application 2; supply voltage range 18 V < VP 24 V; 1-pin operation. 2000 Apr 18 21 Philips Semiconductors Preliminary specification Multi-purpose power amplifier TDA8580J handbook, full pagewidth VP 100 nF VP1 1000 F IN1 IN2 inputs IN3 IN4 IN5 7 3 VP2 15 8 4 10 14 11 TDA8580J 13 6 5 2 10 k 17 9 12 100 F STANDBY 1 OUT1+ OUT2- OUT3- (1) OUT4 + 2 (2) BUFFER 220 nF (2) MUTE DIAG 10 k 16 PGND1 4.7 F PGND2 4.7 F MSB MUTE MGS698 (1) Load conditions: quad SE (4 x 4 ), or dual BTL (2 x 8 ), or dual SE (2 x 4 ) and one BTL (1 x 8 ) (2) RC combination not required in BTL mode. Fig.33 Application 3; supply voltage range 18 V < VP 24 V; 2-pin operation. INTERNAL PIN CONFIGURATION PIN NAME 7, 8, 10, 11 and 12 Inputs EQUIVALENT CIRCUIT Vint Vint 12 7, 8, 10 and 11 MGS723 1, 4, 9, 14 and 17 Outputs VP 1, 4, 9, 14, and 17 0.5 VP 2000 Apr 18 22 MGL849 Philips Semiconductors Preliminary specification Multi-purpose power amplifier PIN NAME 5 STANDBY TDA8580J EQUIVALENT CIRCUIT VP 5 MGL848 13 MUTE Vint 13 4V MGS724 6 DIAG 6 MGS722 2000 Apr 18 23 Philips Semiconductors Preliminary specification Multi-purpose power amplifier TDA8580J PACKAGE OUTLINE DBS17P: plastic DIL-bent-SIL power package; 17 leads (lead length 12 mm) SOT243-1 non-concave Dh x D Eh view B: mounting base side d A2 B j E A L3 L Q c 1 v M 17 e1 Z bp e e2 m w M 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A2 bp c D (1) d Dh E (1) e mm 17.0 15.5 4.6 4.4 0.75 0.60 0.48 0.38 24.0 23.6 20.0 19.6 10 12.2 11.8 2.54 e1 e2 1.27 5.08 Eh j L L3 m Q v w x Z (1) 6 3.4 3.1 12.4 11.0 2.4 1.6 4.3 2.1 1.8 0.8 0.4 0.03 2.00 1.45 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 97-12-16 99-12-17 SOT243-1 2000 Apr 18 EUROPEAN PROJECTION 24 Philips Semiconductors Preliminary specification Multi-purpose power amplifier TDA8580J The total contact time of successive solder waves must not exceed 5 seconds. SOLDERING Introduction to soldering through-hole mount packages The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg(max)). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. This text gives a brief insight to wave, dip and manual soldering. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). Wave soldering is the preferred method for mounting of through-hole mount IC packages on a printed-circuit board. Manual soldering Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds. Soldering by dipping or by solder wave The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joints for more than 5 seconds. Suitability of through-hole mount IC packages for dipping and wave soldering methods SOLDERING METHOD PACKAGE DIPPING DBS, DIP, HDIP, SDIP, SIL WAVE suitable(1) suitable Note 1. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. 2000 Apr 18 25 Philips Semiconductors Preliminary specification Multi-purpose power amplifier TDA8580J DATA SHEET STATUS DATA SHEET STATUS PRODUCT STATUS DEFINITIONS (1) Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Note 1. Please consult the most recently issued data sheet before initiating or completing a design. DEFINITIONS DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2000 Apr 18 26 Philips Semiconductors Preliminary specification Multi-purpose power amplifier TDA8580J NOTES 2000 Apr 18 27 Philips Semiconductors - a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 753503/25/03/pp28 Date of release: 2000 Apr 18 Document order number: 9397 750 05478