DATA SH EET
Preliminary specification
Supersedes data of 1998 Feb 25
File under Integrated Circuits, IC01
2000 Apr 18
INTEGRATED CIRCUITS
TDA8580J
Multi-purpose power amplifier
2000 Apr 18 2
Philips Semiconductors Preliminary specification
Multi-purpose power amplifier TDA8580J
FEATURES
General
Supply voltage range from 8 to 24 V
Low distortion
Few external components, fixed gain
High output power
Can be used as a stereo amplifier in Bridge-Tied Load
(BTL) or quad Single-Ended (SE) amplifiers
Single-ended mode without loudspeaker capacitor
Mute and standby mode with one- or two-pin operation
Diagnostic information for Dynamic Distortion Detector
(DDD), high temperature (145 °C) and short-circuit
No switch on/off plops when switching between standby
and mute or mute and on; an external RC-network is
prescribed to ensure plop-free operation
Low offset variation at outputs between mute and on
Fast mute on supply voltage drops.
Protection
Short-circuitprooftoground,positivesupplyvoltageand
across load; the supply voltage ranges where the
different short circuit conditions are guaranteed are
given in Chapter “Limiting values”
ESD protected on all pins
Thermal protection against temperatures exceeding
150 °C.
GENERAL DESCRIPTION
The TDA8580J is a stereo Bridge-Tied Load (BTL) or a
quad Single-Ended (SE) amplifier that operates over a
wide supply voltage range from 8 to 24 V. This makes it
suitable for applications such as television, home-sound
systems and active speakers.
Because of an internal voltage buffer, this device can be
used without a capacitor connected in series with the load
(SE application). A combined BTL and 2 ×SE application
can also be configured (one chip stereo and subwoofer
application).
ORDERING INFORMATION
TYPE
NUMBER PACKAGE
NAME DESCRIPTION VERSION
TDA8580J DBS17P plastic DIL-bent-SIL power package; 17 leads (lead length 12 mm) SOT243-1
2000 Apr 18 3
Philips Semiconductors Preliminary specification
Multi-purpose power amplifier TDA8580J
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
VPoperating supply voltage 8.0 14.4 24 V
Iq(tot) total quiescent current VP= 14.4 V 140 170 mA
Istb standby supply current VP= 14.4 V 150µA
Bridge-tied load application
Gvvoltage gain 31 32 33 dB
Pooutput power THD = 0.5%; VP= 14.4 V; RL=414 15 W
THD = 0.5%; VP= 24 V; RL=821 23 W
THD total harmonic distortion fi= 1 kHz; Po= 1 W; VP= 14.4 V;
RL=40.05 0.1 %
fi= 1 kHz; Po= 10 W; VP=24V;
R
L=80.02 0.05 %
Voffset(DC) DC output offset voltage VP= 14.4 V; mute condition; RL=4Ω− 10 20 mV
VP= 14.4 V; on condition 0 140 mV
Vno noise output voltage Rs=1k; VP= 14.4 V 100 150 µV
SVRR supply voltage ripple rejection fi= 1 kHz; Vripple(p-p) = 2 V; on or mute
condition; Rs=050 60 dB
Single-ended application
Gvvoltage gain 25 26 27 dB
Pooutput power THD = 0.5%; VP= 14.4 V; RL=43.8 4.0 W
THD = 0.5%; VP= 24 V; RL=410.5 11.5 W
Voffset(DC) DC output offset voltage VP= 14.4 V; mute condition; RL=4Ω− 10 20 mV
VP= 14.4 V; on condition 0 100 mV
Vno noise output voltage Rs=1k; VP= 14.4 V 80 120 µV
SVRR supply voltage ripple rejection fi= 1 kHz; Vripple(p-p) = 2 V; on or mute
condition; Rs=040 45 dB
2000 Apr 18 4
Philips Semiconductors Preliminary specification
Multi-purpose power amplifier TDA8580J
BLOCK DIAGRAM
Fig.1 Block diagram.
handbook, full pagewidth
MGE010
30 k
45 k
45
k
45
k
60
k
60
k
BUFFER
INTERFACE DIAGNOSTIC
5
13 6
MUTE
STANDBY DIAG
BUFFER
Vpx Vpx
OA
45 k
+
+
OA
V/I
+
+
V/I
45 k
60
k
60
k
OA
45 k
+
+
OA
V/I
+
+
V/I
7
IN1
8
IN2
10
12
11
IN3
IN5
IN4
1
4
9
14
17 OUT4+
OUT3
BUFFER
OUT2
OUT1+
315
VP1 VP2
216
PGND1 PGND2
TDA8580J
2000 Apr 18 5
Philips Semiconductors Preliminary specification
Multi-purpose power amplifier TDA8580J
PINNING
SYMBOL PIN DESCRIPTION
OUT1+ 1 non-inverting output 1
PGND1 2 power ground 1
VP1 3 supply voltage 1
OUT24 inverting output 2
STANDBY 5 standby/mute/on selection input
DIAG 6 diagnostic output
IN1 7 input 1
IN2 8 input 2
BUFFER 9 single-ended buffer output
IN3 10 input 3
IN4 11 input 4
IN5 12 input 5; signal ground capacitor
connection
MUTE 13 mute/on selection input
OUT314 inverting output 3
VP2 15 supply voltage 2
PGND2 16 power ground 2
OUT4+ 17 non-inverting output 4
handbook, halfpage
TDA8580J
MGE009
OUT1+
PGND1
VP1
OUT2
STANDBY
DIAG
IN1
IN2
BUFFER
IN3
IN4
IN5
MUTE
OUT3
VP2
PGND2
OUT4+
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
Fig.2 Pin configuration.
2000 Apr 18 6
Philips Semiconductors Preliminary specification
Multi-purpose power amplifier TDA8580J
FUNCTIONAL DESCRIPTION
TheTDA8580Jisamulti-purposepower amplifierwithfour
amplifiers which can be connected in the following
configurationswithhighoutputpowerand lowdistortion(at
minimum quiescent current):
Dual bridge-tied load amplifiers
Quad single-ended amplifiers
Dual single-ended amplifiers and one bridge-tied load
amplifier.
The amplifier can be switched in on, mute and off
(standby)bytheMUTEandSTANDBY pins(forinterfacing
directly with a microcontroller). One-pin operation is also
possible by applying a voltage greater than 8 V to the
STANDBY pin to switch the amplifier in on mode.
Special attention is given to the dynamic behaviour as
follows:
Slow offset change between mute and on (controlled by
MUTE and STANDBY pins)
Low noise levels, which are independent of the supply
voltage.
Protections are included to avoid the IC being damaged at:
Over temperature: Tj> 150 °C
Short-circuit of the output pin(s) to ground or supply rail;
when short-circuited, the power dissipation is limited
ESD protection (Human Body Model 3000 V, Machine
Model 300 V)
Energy handling. A DC voltage of 6 V can be connected
to the output of any amplifier while the supply pins are
short-circuited to ground.
Diagnostics are available for the following conditions
(see Figs 3, 4 and 5):
Chip temperature above 145 °C
Distortion over 2% due to clipping
Short-circuit protection active.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
THERMAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VPsupply voltage operating 24 V
no signal condition 28 V
VDIAG voltage on pin DIAG 18 V
IOSM non-repetitive peak output current 6A
I
ORM repetitive peak output current 4.5 A
VP(scol) supply voltage with short-circuit across load 28 V
VP(scg) supply voltage with short-circuit from output
to ground 26 V
VP(scs) supply voltage with short-circuit from output
to supply 16 V
VP(rp) reverse polarity 6V
P
tot total power dissipation 75 W
Tjjunction temperature 150 °C
Tstg storage temperature 55 +150 °C
Tamb ambient temperature 40 +85 °C
SYMBOL PARAMETER CONDITIONS VALUE UNIT
Rth(j-a) thermal resistance from junction to ambient in free air 40 K/W
Rth(j-c) thermal resistance from junction to case 1.5 K/W
2000 Apr 18 7
Philips Semiconductors Preliminary specification
Multi-purpose power amplifier TDA8580J
CHARACTERISTICS
VP= 14.4 V; Tamb =25°C; fi= 1 kHz; RL=; measured in test circuit of Fig.28; unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supplies
VPoperating supply voltage 8.0 14.4 24 V
Iq(tot) total quiescent current 140 170 mA
Istb standby current 150µA
V
ODC output voltage 7.0 V
VP(mute) low supply voltage mute 6.0 7.0 8.0 V
VIDC input voltage 4.0 V
Control pins
STANDBY PIN (see Table 1)
V5(stb) voltageat STANDBY pin for standby
condition 00.8 V
Vhys(5)(stb) hysteresis voltage at STANDBY pin
for standby condition note 1 0.2 V
V5(mute) voltage at STANDBY pin for mute
condition V13 < 0.8 V 2.0 5.3 V
V5(on) voltage at STANDBY pin for on
condition VP> 9 V; note 2 8.0 18 V
MUTE PIN (see Table 1)
V13(mute) voltage at MUTE pin for mute
condition V5=5V 0 0.8 V
V13(on) voltage at MUTE pin for on condition V5=5V 2.5 5.3 V
Diagnostic; output buffer (open-collector); see Figs 3, 4 and 5
VOL LOW-level output voltage Isink =1mA 0.2 0.8 V
ILI leakage current VDIAG = 14.4 V −−1µA
CD clip detector VDIAG <0.8V 124%
T
j(diag) junction temperature for high
temperature warning VDIAG < 0.8 V 145 −°C
Stereo BTL application; see Figs 6,7,10,11,14,15,18,19,21,22,23,24,26 and 28
THD total harmonic distortion fi= 10 kHz; Po= 1 W; RL=4;
filter: 22 Hz < f < 30 kHz 0.2 0.3 %
fi= 1 kHz; Po= 1 W; VP= 14.4 V;
RL=40.05 0.1 %
fi= 1 kHz; Po= 10 W; VP=24V;
R
L=80.02 0.05 %
Pooutput power THD = 0.5%; VP= 14.4 V; RL=414 15 W
THD = 0.5%; VP= 24 V; RL=821 23 W
THD = 10%; VP= 14.4 V; RL=418 20 W
THD = 10%; VP= 24 V; RL=828 30 W
Gvvoltage gain Vo(rms) = 3 V 31 32 33 dB
2000 Apr 18 8
Philips Semiconductors Preliminary specification
Multi-purpose power amplifier TDA8580J
Notes
1. Hysteresis between the rise and fall voltage when pin STANDBY is controlled with low ohmic voltage source.
2. At lower VP the voltage at the STANDBY pin for on condition will be adjusted automatically to maintain an
on condition at low battery voltage (down to 8 V) when using one-pin operation.
3. The noise output is measured in a bandwidth of 20 Hz to 20 kHz.
αcs channel separation Po= 2 W; fi= 1 kHz; RL=460 65 dB
∆Gvchannel unbalance −−1dB
V
offset(DC) DC output offset voltage on condition 0 140 mV
mute condition; RL=4Ω−10 20 mV
Vno noise output voltage Rs=1k; VP= 14.4 V; note 3 100 150 µV
Vno(mute) noise output voltage mute note 3 020µV
V
o(mute) output voltage mute Vi(rms) =1V 3 500 µV
SVRR supply voltage ripple rejection Rs=0; fi= 1 kHz;
Vripple(p-p) = 2 V; on or mute
condition
50 60 dB
Ziinput impedance 23 30 37 k
CMRR common mode rejection ratio Rs=0; Vi(rms) = 0.5 V; fi= 1 kHz 60 dB
Quad SE application; see Figs 8,9,12,13,16,17,20,25, 27 and 29
THD total harmonic distortion fi= 1 kHz; Po= 1 W; RL=4Ω−0.05 0.1 %
fi= 10 kHz; Po= 1 W; RL=4;
filter: 22 Hz < f < 30 kHz 0.2 0.3 %
fi= 1 kHz; Po= 1 W; VP=24V,
R
L=4; filter: 22 Hz<f<30kHz 0.05 0.1 %
Pooutput power THD = 0.5%; VP= 14.4 V; RL=43.8 4.0 W
THD = 0.5%; VP= 24 V; RL=410.5 11.5 W
THD = 10%; VP= 14.4 V; RL=44.9 5.2 W
THD = 10%; VP= 24 V; RL=414 15 W
Gvvoltage gain Vo(rms) = 3 V 25 26 27 dB
αcs channel separation Po= 2 W; fi= 1 kHz; RL=440 46 dB
∆Gvchannel unbalance −−1dB
V
offset(DC) DC output offset voltage VP= 14.4 V; on condition 0 100 mV
VP= 14.4 V; mute condition;
RL=410 20 mV
Vno noise output voltage Rs=1k; VP= 14.4 V; note 3 80 120 µV
Vno(mute) noise output voltage mute note 3 020µV
V
o(mute) output voltage mute Vi(rms) =1V 3 500 µV
SVRR supply voltage ripple rejection fi= 1 kHz; Vripple(p-p) = 2 V, on or
mute condition; Rs=040 45 dB
Ziinput impedance 46 60 74 k
CMRR common mode rejection ratio Vi(rms) = 0.5 V; fi= 1 kHz; Rs=0Ω− 60 dB
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
2000 Apr 18 9
Philips Semiconductors Preliminary specification
Multi-purpose power amplifier TDA8580J
Table 1 Selection of standby, mute and on
VOLTAGE AT PIN STANDBY VOLTAGE AT PIN MUTE FUNCTION
< 0.8 V don’t care standby (off)
2 to 5.3 V < 0.8 V mute (DC settled)
2 to 5.3 V 2.5 to 5.3 V on (AC operating)
8.0 V don’t care on (AC operating)
handbook, halfpage
MGE020
DIAG
amplifier
output
temperature
overload
Fig.3 Diagnostic waveform: temperature overload.
handbook, halfpage
MGE021
DIAG
amplifier
output
normal active
DDD normal
Fig.4 Diagnostic waveform: DDD function.
2000 Apr 18 10
Philips Semiconductors Preliminary specification
Multi-purpose power amplifier TDA8580J
handbook, halfpage
DIAG
amplifier
output
short-circuit to
GND VP
MGE022
Fig.5 Diagnostic waveform: short-circuit to GND
or VP.
handbook, halfpage
1
101
102
MGS700
10 102103104105
fi (Hz)
THD
(%)
(2)
(1)
Fig.6 Total harmonic distortion as a function of
frequency; BTL mode.
RL=4; VP= 14.4 V; 2 channel driven.
(1) Po=1W.
(2) Po=10W.
handbook, halfpage
1
101
102
MGS701
THD
(%)
(2)
(1)
10 102103104105
fi (Hz)
Fig.7 Total harmonic distortion as a function of
frequency; BTL mode.
RL=8; VP= 24 V; 2 channel driven.
(1) Po=1W.
(2) Po=10W.
handbook, halfpage
1
101
102
MGS702
THD
(%)
10 102103104105
fi (Hz)
Fig.8 Total harmonic distortion as a function of
frequency; SE mode.
Po= 1 W; RL=4; VP= 14.4 V; 4 channel driven.
2000 Apr 18 11
Philips Semiconductors Preliminary specification
Multi-purpose power amplifier TDA8580J
handbook, halfpage
1
101
102
MGS703
THD
(%)
(1)
(2)
10 102103104105
fi (Hz)
Fig.9 Total harmonic distortion as a function of
frequency; SE mode.
RL=4; VP= 24 V; 4 channel driven.
(1) Po=5W.
(2) Po=1W.
handbook, halfpage
102
10
1
101
102
MGS704
101Po (W)
THD
(%)
11010
2
(1)
(1)
(3)
(3)
(2)
(2)
Fig.10 Total harmonic distortion as a function of
output power; BTL mode.
RL=4; VP= 14.4 V; 2 channel driven.
(1) fi= 10 kHz.
(2) fi= 1 kHz.
(3) fi= 100 Hz.
handbook, halfpage
102
10
1
101
102
MGS705
101Po (W)
THD
(%)
11010
2
(1)
(1)
(3)
(3)
(2)
(2)
Fig.11 Total harmonic distortion as a function of
output power; BTL mode.
RL=8; VP= 24 V; 2 channel driven.
(1) fi= 10 kHz.
(2) fi= 1 kHz.
(3) fi= 100 Hz.
handbook, halfpage
MGS706
110
Po (W)
THD
(%)
102
10
1
101
102
101
(1)
(3)
(3)
(1)
(2)
(2)
Fig.12 Total harmonic distortion as a function of
output power; SE mode.
RL=4; VP= 14.4 V; 4 channel driven
(1) fi= 10 kHz.
(2) fi= 1 kHz.
(3) fi= 100 Hz.
2000 Apr 18 12
Philips Semiconductors Preliminary specification
Multi-purpose power amplifier TDA8580J
handbook, halfpage
102
10
1
101
102
MGS707
(1)
(1)
(3)
(3)
(2)
(2)
10111010
2
P
o (W)
THD
(%)
Fig.13 Total harmonic distortion as a function of
output power; SE mode.
RL=4; VP= 24 V; 4 channel driven.
(1) fi= 10 kHz.
(2) fi= 1 kHz.
(3) fi= 100 Hz.
handbook, halfpage
0 102030
30
10
0
20
MGS708
Pd
(W)
Po (W)
Fig.14 Power dissipation as a function of output
power; BTL mode.
fi= 1 kHz; RL=4; VP= 14.4 V; 2 channel driven.
handbook, halfpage
01020 40
40
30
10
0
20
MGS709
30 Po (W)
Pd
(W)
Fig.15 Power dissipation as a function of output
power; BTL mode.
fi= 1 kHz; RL=8; VP= 24 V; 2 channel driven.
handbook, halfpage
0246
16
12
4
0
8
MGS710
Po (W)
Pd
(W)
fi= 1 kHz; RL=4; VP= 14.4 V; 4 channel driven.
Fig.16 Power dissipation as a function of output
power; SE mode.
2000 Apr 18 13
Philips Semiconductors Preliminary specification
Multi-purpose power amplifier TDA8580J
handbook, halfpage
048 16
40
30
10
0
20
MGS711
12 Po (W)
Pd
(W)
fi= 1 kHz; RL=4; VP= 24 V; 4 channel driven.
Fig.17 Power dissipation as a function of output
power; SE mode.
handbook, halfpage
8 121620
40
30
10
0
20
MGS712
VP (V)
Po
(W)
(1)
(2)
Fig.18 Output power as a function of supply
voltage; BTL mode.
fi= 1 kHz; RL=4; 2 channel driven.
(1) THD = 10%.
(2) THD = 0.5%.
handbook, halfpage
81216 24
40
30
10
0
20
MGS713
20 VP (V)
Po
(W)
(1)
(2)
Fig.19 Output power as a function of supply
voltage; BTL mode.
fi= 1 kHz; RL=8; 2 channel driven.
(1) THD = 10%.
(2) THD = 0.5%
handbook, halfpage
81216 24
16
12
4
0
8
MGS714
20 VP (V)
Po
(W)
(1)
(2)
Fig.20 Output power as a function of supply
voltage; SE mode.
fi= 1 kHz; RL=4; 2 channel driven.
(1) THD = 0.5%.
(2) THD = 10%
2000 Apr 18 14
Philips Semiconductors Preliminary specification
Multi-purpose power amplifier TDA8580J
handbook, halfpage
30
31
32
33
34
MGS717
Gv
(dB)
10 102103104105
fi (Hz)
Fig.21 Gain as a function of input frequency;
BTL mode.
Ci= 470 nF.
0.8
0.4
0
0.4
0.8
MGS715
Po
(W)
10 102103104105
fi (Hz)
Fig.22 Power bandwidth as a function of
frequency; BTL mode.
THD = 0.5%; RL=4; VP= 14.4 V.
handbook, halfpage
0.8
0.4
0
0.4
0.8
MGS716
Po
(W)
10 102103104105
fi (Hz)
THD = 0.5%; RL=8; VP=24V.
Fig.23 Power bandwidth as a function of
frequency; BTL mode.
handbook, halfpage
70
66
58
62
54
50
MGS718
αcs
(dB)
(2)
(1)
10 102103104105
fi (Hz)
Fig.24 Channel separation as a function of
frequency; BTL mode.
Po= 2 W; RL=4; VP= 14.4 V.
(1) Channels 3 and 4 to channels 1 and 2.
(2) Channels 1 and 2 to channels 3 and 4.
2000 Apr 18 15
Philips Semiconductors Preliminary specification
Multi-purpose power amplifier TDA8580J
handbook, halfpage
60
40
50
30
20
MGS719
αcs
(dB)
(2)
(3)
(1)
10 102103104105
fi (Hz)
Fig.25 Channel separation as a function of
frequency; SE mode.
Po= 2 W; RS=0; RL=4; VP= 14.4 V.
(1) Channel 1 to channel 2.
(2) Channel 1 to channel 3.
(3) Channel 1 to channel 4.
handbook, halfpage
80
40
60
20
MGS720
SVRR
(dB)
(2)
(1)
10 102103104105
fi (Hz)
Fig.26 SVRR as a function of frequency;
BTL mode.
Rs=0;V
ripple(p-p) =2V.
(1) Vp= 14.4 V.
(2) Vp=24V.
handbook, halfpage
60
40
50
30
20
MGS721
SVRR
(dB)
(1)
(2)
10 102103104105
fi (Hz)
Fig.27 SVRR as a function of frequency; SE mode.
Rs=0;V
ripple(p-p) =2V.
(1) Vp= 14.4 V.
(2) Vp=24V.
2000 Apr 18 16
Philips Semiconductors Preliminary specification
Multi-purpose power amplifier TDA8580J
APPLICATION INFORMATION
The application circuit depends on the supply voltage
used. For supply voltages below 18 V the application
circuits are shown in Figs 28, 29 and 30.
The typical application circuits for the different supply
voltage ranges are shown in Figs 31, 32 and 33.
Additional information for the applications shown in
Figs 28, 29 and 30
The RC-network connected to pin 5 determines the
amplifier switch on/off behaviour as follows;
Switched from STANDBY to MUTE when Vswitching
(typically 9 V) is enabled and the switch SW1 is closed.
During MUTE there is no output noise and no offset.
Switched from MUTE to ON when the switch SW1 is
opened. During switching ON the offset and noise are
gradually built up. The time constant is fixed by R1 ×C1.
Theinputscan betiedtogether andconnectedto oneinput
capacitor. Because the input resistance is decreased by a
factor of 2, the low frequency roll-off is shifted to a higher
frequency when Ci is kept the same value.
The low frequency cut-off is determined by;
The Boucherot network connected to the buffer (pin 9) is
necessary to guarantee a low output resistance at high
frequencies when the buffer is loaded (only in SE
applications).
Additional information for the applications shown in
Figs 31, 32 and 33
Short circuit behaviour at high supply voltages (Vp> 18 V):
When Vp> 18 V it is advisable to use the applications
given in Figs 32 and 33. In these applications the
diagnostics output is tied to pin 5 (one pin operation) or
pin 13 (two pin operation). During a fault condition the
amplifier is soft-muted and the amplitude of the output
signal is reduced at:
over temperature (still large dynamic range)
short to ground and over load (output current
reduced)
The 4.7 µF capacitor and the 10 kresistor connected
to pin 5 or to pin 13 are used to:
provide a stable loop
control the switch on/off behaviour
minimize the effect due to clip detection.
Use of common buffer
In SE applications the buffer output is used in place of a
SE capacitor. To minimize the crosstalk (high channel
separation) and distortion it is advised to connect the
speaker wires as closely as possible to pin 9 without using
a shared wire. Internally in the IC all the efforts have been
taken to minimize the crosstalk by locating the feedback
loops as close as possible to pin 9.
If a common wire is shared by all the speakers, the series
resistance of this shared wire will introduce added signal
voltages resulting from the currents flowing through this
wire when a connected amplifier is driven by a signal.
Optimize the THD performance
The TDA8580J application can be optimized to gain the
lowest THD possible by applying the following guidelines:
SE application: minimize the shared wires to pin 9 (see
section “Use of common buffer”).
Because the inputs are quasi differential, ground loops
can be avoided by connecting the negative terminal of
the 100 µF signal ground capacitor (connected to
pin 12) to the ground pin of the signal processor.
Note: do not leave the inputs in the open condition to
prevent HF oscillation.
Increase the value of electrolytic supply capacitor
(typical value 1000 µF) to the maximum possible to
minimize cross talk and distortion at low signal
frequencies, due to the PSRR (power supply rejection
ratio). For suppressing high frequency transients on the
supply line a capacitor (typical value 100 nF) with a low
ESR is required to be connected in parallel with the
electrolytic capacitor. The capacitor combination must
be placed as close as possible to the IC (using short
interconnection tracks).
Headroom
A typical CD requires at least 12 dB dynamic headroom
(a factor of 15.85), compared with the average power
output, for passing the loudest parts without distortion.
f3dB12π( R
iC
i
)××
1
2π60 103
×220 10 9
×××
---------------------------------------------------------------------- 12 Hz.
=
==
2000 Apr 18 17
Philips Semiconductors Preliminary specification
Multi-purpose power amplifier TDA8580J
For BTL application at Vp= 24 V, RL=8 and Po at
THD = 0.5% (see Fig.15), the Average Listening
Level (ALL) for music power without distortion yields:
Table 2 Pdas a function of headroom (music signals) for
Po=2×23 W (THD = 0.5%).
So for the average music listening level a total power
dissipation of 16 W can be used for calculating the
optimum heat sink thermal resistance.
Heatsink calculation
The measured thermal resistance of this package Rth(j-c) is
a maximum of 1.5 K/W. For a maximum ambient
temperature of 60oC the required heatsink thermal
resistance can be calculated as shown in the following
example.
EXAMPLE
Measured or given values:
Vp=24V
R
L=8Ω (2 × BTL)
Measured worst case Pd (sine wave) = 32 W
Tj(max) = 150oC
Tamb(max) =60
o
C
R
th(j-c) = 1.5 K/W
Table 3 Heatsink thermal resistance as a function of
headroom for Po=2×23 W (THD = 0.5%).
HEADROOM Pd
0dB 32W
12 dB 16 W
PoALL() 23
15.85
--------------- 1.45 W.==
HEAD ROOM PdRth(hs)
0 dB 32 W 1.3 K/W
12 dB 16 W 4.12 K/W
Rth hs() T
j max()
T
amb max()
P
d
-------------------------------------------------- Rth j c()
150 60
32
---------------------- 1.5 1.3 K/W==
=
2000 Apr 18 18
Philips Semiconductors Preliminary specification
Multi-purpose power amplifier TDA8580J
handbook, full pagewidth
MGU075
30 k
45 k
45
k
45
k
60
k
60
k
BUFFER
INTERFACE DIAGNOSTIC
5
13 6
MUTE
STANDBY DIAG
BUFFER
Vpx Vpx
OA
45 k
+
+
+
+
OA
V/I
+
+
V/I
45 k
60
k
60
k
OA
45 k
+
+
OA
V/I
+
+
V/I
7
IN1
8
IN2
10
12
11
IN3
IN5
IN4
1
4
9
14
17 OUT4+
OUT3
BUFFER
OUT2
OUT1+
315
216
PGND1 PGND2
TDA8580J
1000 µF
16/40 V 100 nF
10
k
100 µF
10 V
220 nF
+5 V
4 or 8
4 or 8
VinL
220 nF
VinR
VP
VP1 VP2
4.7 µF
R1
(1)
R2
Vswitching
(9 V typical)
SW1
Fig.28 Stereo bridge-tied load application; VP18 V.
(1) R1 and R2 values depend on Vswitching applied; the value of R1 and R2 connected in parallel should be minimum 10 k.
2000 Apr 18 19
Philips Semiconductors Preliminary specification
Multi-purpose power amplifier TDA8580J
handbook, full pagewidth
MGU077
30 k
45 k
45
k
45
k
60
k
60
k
BUFFER
INTERFACE DIAGNOSTIC
5
13 6
MUTE
STANDBY DIAG
BUFFER
Vpx Vpx
OA
45 k
+
+
+
+
+
+
OA
V/I
+
+
V/I
45 k
60
k
60
k
OA
45 k
+
+
OA
V/I
+
+
V/I
7
IN1
8
IN2
10
12
11
IN3
IN5
IN4
1
4
9
14
17 OUT4+
OUT3
BUFFER
OUT2
OUT1+
315
216
PGND1 PGND2
TDA8580J
1000 µF
16/40 V 100 nF
10
k
100 µF
10 V
220 nF
+5 V
4 or 8
4 or 8
4 or 8
VinR
220 nF
VinL
220 nF
VinL
FRONT
220 nF
VinR
4 or 8
REAR
VP
VP1 VP2
4.7 µF
R1
(1)
R2
Vswitching
(9 V typical)
2
220 nF
SW1
Fig.29 Quad single-ended application; VP18 V.
(1) R1 and R2 values depend on Vswitching applied; the value of R1 and R2 connected in parallel should be minimum 10 k.
2000 Apr 18 20
Philips Semiconductors Preliminary specification
Multi-purpose power amplifier TDA8580J
handbook, full pagewidth
MGU076
30 k
45 k
45
k
45
k
60
k
60
k
BUFFER
INTERFACE DIAGNOSTIC
5
13 6
MUTE
STANDBY DIAG
BUFFER
Vpx Vpx
OA
45 k
+
+
+
+
OA
V/I
+
+
V/I
45 k
60
k
60
k
OA
45 k
2
+
+
+
OA
V/I
+
+
V/I
7
IN1
8
IN2
10
12
11
IN3
IN5
IN4
1
4
9
14
220 nF
17 OUT4+
OUT3
BUFFER
OUT2
OUT1+
315
216
PGND1 PGND2
TDA8580J
1000 µF
16/40 V 100 nF
10
k
100 µF
10 V
220 nF
+5 V
4 or 8
4 or 8
4 or 8
VinR
220 nF
VinL
220 nF
VinR
VP
VP1 VP2
4.7 µF
R1
(1)
R2
Vswitching
(9 V typical)
SW1
Fig.30 Dual single-ended and one bridge-tied load application; VP18 V.
(1) R1 and R2 values depend on Vswitching applied; the value of R1 and R2 connected in parallel should be minimum 10 k.
2000 Apr 18 21
Philips Semiconductors Preliminary specification
Multi-purpose power amplifier TDA8580J
handbook, full pagewidth
MGS699
(3)
OUT1+
1
IN1 7
(1)
OUT2
4
IN2
inputs
VP
Vswitching
(9 V typical)
8
315
216
OUT3
14
IN3 10 OUT4+
+5 V
17
IN4 11 BUFFER
9
IN5 12
DIAG
PGND2PGND1
6
STANDBY
SW1
5
R2
15 k
(3) R1
45 k
2 (2)
10 k
1000 µF
100 µF
4.7 µF
100 nF
220 nF(2)
TDA8580J
VP1 VP2
Fig.31 Application 1; supply voltage range 8 V < VP18 V; 1-pin and 2-pin operation.
(1) Load conditions: quad SE (4 x 4 ), or dual BTL (2 x 8 Ω), or dual SE (2 x 4 ) and one BTL (1 x 8 ).
(2) RC combination not required in BTL mode.
(3) R1 and R2 values depend on Vswitching applied; the value of R1 and R2 connected in parallel should be minimum 10 k.
handbook, full pagewidth
MGS697
(3)
OUT1+
1
IN1 7
(1)
OUT2
4
IN2
inputs
VP
Vswitching
(9 V typical)
8
3
VP1 VP2
15
216
OUT3
14
IN3 10 OUT4+
17
IN4 11 BUFFER
9
IN5 12
MUTE 13 DIAG
PGND2PGND1
3.6 V
6
STANDBY 5
R2
15 k
(3) R1
45 k
2 (2)
1000 µF
100 µF
4.7 µF
100 nF
220 nF(2)
TDA8580J
SW1
Fig.32 Application 2; supply voltage range 18 V < VP24 V; 1-pin operation.
(1) Load conditions: quad SE (4 x 4 ), or dual BTL (2 x 8 Ω), or dual SE (2 x 4 ) and one BTL (1 x 8 ).
(2) RC combination not required in BTL mode.
(3) R1 and R2 values depend on Vswitching applied; the value of R1 and R2 connected in parallel should be minimum 10 k.
2000 Apr 18 22
Philips Semiconductors Preliminary specification
Multi-purpose power amplifier TDA8580J
handbook, full pagewidth
MGS698
OUT1+
1
IN1 7
(1)
OUT2
4
IN2
inputs
VP
8
315
216
OUT3
14
IN3 10 OUT4+
17
IN4 11 BUFFER
9
IN5 12
DIAG
PGND2PGND1
6
STANDBY 5
10 k
MSB
MUTE
13
2 (2)
1000 µF
100 µF
4.7 µF
100 nF
220 nF(2)
TDA8580J
10 k
MUTE
4.7 µF
VP1 VP2
Fig.33 Application 3; supply voltage range 18 V < VP24 V; 2-pin operation.
(1) Load conditions: quad SE (4 x 4 ), or dual BTL (2 x 8 Ω), or dual SE (2 x 4 ) and one BTL (1 x 8 )
(2) RC combination not required in BTL mode.
INTERNAL PIN CONFIGURATION
PIN NAME EQUIVALENT CIRCUIT
7, 8, 10, 11
and 12 Inputs
1, 4, 9, 14
and 17 Outputs
Vint
7, 8, 10 and 11
MGS723
Vint
12
MGL849
VP
0.5 VP
1, 4, 9, 14, and 17
2000 Apr 18 23
Philips Semiconductors Preliminary specification
Multi-purpose power amplifier TDA8580J
5 STANDBY
13 MUTE
6 DIAG
PIN NAME EQUIVALENT CIRCUIT
MGL848
VP
5
4 V
Vint
MGS724
13
MGS722
6
2000 Apr 18 24
Philips Semiconductors Preliminary specification
Multi-purpose power amplifier TDA8580J
PACKAGE OUTLINE
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC EIAJ
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
SOT243-1
0 5 10 mm
scale
D
L
E
A
c
A2
L3
Q
wM
bp
1
d
D
Ze
e
xh
117
j
E
h
non-concave
97-12-16
99-12-17
DBS17P: plastic DIL-bent-SIL power package; 17 leads (lead length 12 mm) SOT243-1
view B: mounting base side
m2
e
vM
B
UNIT A e1
A2bpcD
(1) E(1) Z(1)
deD
hLL
3m
mm 17.0
15.5 4.6
4.4 0.75
0.60 0.48
0.38 24.0
23.6 20.0
19.6 10 2.54
v
0.8
12.2
11.8 1.27
e2
5.08 2.4
1.6
Eh
62.00
1.45
2.1
1.8
3.4
3.1 4.3
12.4
11.0
Qj
0.4
w
0.03
x
2000 Apr 18 25
Philips Semiconductors Preliminary specification
Multi-purpose power amplifier TDA8580J
SOLDERING
Introduction to soldering through-hole mount
packages
This text gives a brief insight to wave, dip and manual
soldering.A more in-depthaccount ofsoldering ICscan be
found in our
“Data Handbook IC26; Integrated Circuit
Packages”
(document order number 9398 652 90011).
Wave soldering is the preferred method for mounting of
through-hole mount IC packages on a printed-circuit
board.
Soldering by dipping or by solder wave
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joints for more than 5 seconds.
Thetotalcontacttime ofsuccessivesolderwaves mustnot
exceed 5 seconds.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg(max)). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
Manual soldering
Apply the soldering iron (24 V or less) to the lead(s) of the
package, either below the seating plane or not more than
2 mm above it. If the temperature of the soldering iron bit
is less than 300 °C it may remain in contact for up to
10 seconds. If the bit temperature is between
300 and 400 °C, contact may be up to 5 seconds.
Suitability of through-hole mount IC packages for dipping and wave soldering methods
Note
1. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
PACKAGE SOLDERING METHOD
DIPPING WAVE
DBS, DIP, HDIP, SDIP, SIL suitable suitable(1)
2000 Apr 18 26
Philips Semiconductors Preliminary specification
Multi-purpose power amplifier TDA8580J
DATA SHEET STATUS
Note
1. Please consult the most recently issued data sheet before initiating or completing a design.
DATA SHEET STATUS PRODUCT
STATUS DEFINITIONS (1)
Objective specification Development This data sheet contains the design target or goal specifications for
product development. Specification may change in any manner without
notice.
Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be
published at a later date. Philips Semiconductors reserves the right to
make changes at any time without notice in order to improve design and
supply the best possible product.
Product specification Production This data sheet contains final specifications. Philips Semiconductors
reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.
DEFINITIONS
Short-form specification The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
attheseor atany otherconditions above thosegiven inthe
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Application information Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentationorwarrantythatsuch applicationswillbe
suitable for the specified use without further testing or
modification.
DISCLAIMERS
Life support applications These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductorscustomersusingorsellingtheseproducts
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
theuseofany oftheseproducts,conveys nolicenceor title
under any patent, copyright, or mask work right to these
products,and makesno representationsor warrantiesthat
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
2000 Apr 18 27
Philips Semiconductors Preliminary specification
Multi-purpose power amplifier TDA8580J
NOTES
© Philips Electronics N.V. SCA
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Internet: http://www.semiconductors.philips.com
2000 69
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Printed in The Netherlands 753503/25/03/pp28 Date of release: 2000 Apr 18 Document order number: 9397 750 05478