74LVC1G66-Q100 Bilateral switch Rev. 2 -- 9 December 2016 Product data sheet 1. General description The 74LVC1G66-Q100 provides one single pole, single-throw analog switch function. It has two input/output terminals (Y and Z) and an active HIGH enable input pin (E). When E is LOW, the analog switch is turned off. Schmitt trigger action at the enable input makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 1.65 V to 5.5 V. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from 40 C to +85 C and from 40 C to +125 C Wide supply voltage range from 1.65 V to 5.5 V Very low ON resistance: 7.5 (typical) at VCC = 2.7 V 6.5 (typical) at VCC = 3.3 V 6 (typical) at VCC = 5 V Switch current capability of 32 mA High noise immunity CMOS low power consumption TTL interface compatibility at 3.3 V Latch-up performance meets requirements of JESD78 Class I ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) Enable input accepts voltages up to 5.5 V Multiple package options 74LVC1G66-Q100 Nexperia Bilateral switch 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name 74LVC1G66GW-Q100 40 C to +125 C 40 C to +125 C 74LVC1G66GV-Q100 Description Version TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1 SC-74A plastic surface-mounted package; 5 leads SOT753 4. Marking Table 2. Marking Type number Marking code[1] 74LVC1G66GW-Q100 VL 74LVC1G66GV-Q100 V66 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram ( = < PQD DDJ Fig 1. Logic symbol ; Fig 2. IEC logic symbol = < ( 9&& Fig 3. DDP Logic diagram 74LVC1G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 -- 9 December 2016 (c) Nexperia B.V. 2017. All rights reserved 2 of 21 74LVC1G66-Q100 Nexperia Bilateral switch 6. Pinning information 6.1 Pinning /9&*4 < = *1' 9&& ( DDD Fig 4. Pin configuration SOT353-1 and SOT753 6.2 Pin description Table 3. Pin description Symbol Pin Symbol Y 1 independent input or output Z 2 independent output or input GND 3 ground (0 V) E 4 enable input (active HIGH) VCC 5 supply voltage 7. Functional description Table 4. Function table[1] Input E Switch L OFF-state H ON-state [1] H = HIGH voltage level; L = LOW voltage level 74LVC1G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 -- 9 December 2016 (c) Nexperia B.V. 2017. All rights reserved 3 of 21 74LVC1G66-Q100 Nexperia Bilateral switch 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions [1] VI input voltage IIK input clamping current VI < 0.5 V or VI > VCC + 0.5 V ISK switch clamping current VI < 0.5 V or VI > VCC + 0.5 V [2] Min Max Unit 0.5 +6.5 V 0.5 +6.5 50 - mA - 50 mA 0.5 VCC + 0.5 V VSW switch voltage enable and disable mode ISW switch current VSW > 0.5 V or VSW < VCC + 0.5 V - 50 mA ICC supply current - 100 mA IGND ground current 100 - mA Tstg storage temperature 65 +150 C - 250 mW total power dissipation Ptot Tamb = 40 C to +125 C [3] [1] The minimum input voltage rating may be exceeded if the input current rating is observed. [2] The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed. [3] V For TSSOP5 and SC-74A packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K. For XSON6 packages: above 118 C the value of Ptot derates linearly with 7.8 mW/K. 9. Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter VCC supply voltage VI input voltage VSW Conditions [1] switch voltage Tamb ambient temperature t/V input transition rise and fall rate Min Typ Max Unit 1.65 - 5.5 V 0 - 5.5 V 0 - VCC V 40 - +125 VCC = 1.65 V to 2.7 V [2] - - 20 ns/V C VCC = 2.7 V to 5.5 V [2] - - 10 ns/V [1] To avoid sinking GND current from terminal Z when switch current flows in terminal Y, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal Z, no GND current flows from terminal Y. In this case, there is no limit for the voltage drop across the switch. [2] Applies to control signal levels. 74LVC1G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 -- 9 December 2016 (c) Nexperia B.V. 2017. All rights reserved 4 of 21 74LVC1G66-Q100 Nexperia Bilateral switch 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 40 C to +85 C Conditions Min HIGH-level input voltage VIH LOW-level input voltage VIL VCC = 1.65 V to 1.95 V Typ[1] 40 C to +125 C Unit Max Min Max 0.65VCC - - 0.65VCC - V VCC = 2.3 V to 2.7 V 1.7 - - 1.7 - V VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V VCC = 4.5 V to 5.5 V 0.7VCC - - 0.7VCC - V VCC = 1.65 V to 1.95 V - - 0.35VCC - VCC = 2.3 V to 2.7 V - - 0.7 - 0.7 V VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V VCC = 4.5 V to 5.5 V 0.35VCC V - - 0.3VCC - 0.3VCC V - 0.1 1 - 1 A II input leakage current pin E; VI = 5.5 V or GND; VCC = 0 V to 5.5 V [2] IS(OFF) OFF-state leakage current VCC = 5.5 V; see Figure 5 [2] - 0.1 0.2 - 0.5 A IS(ON) ON-state leakage VCC = 5.5 V; see Figure 6 current [2] - 0.1 1 - 2 A ICC supply current VI = 5.5 V or GND; VSW = GND or VCC; VCC = 1.65 V to 5.5 V [2] - 0.1 4 - 4 A ICC additional supply current pin E; VI = VCC 0.6 V; VSW = GND or VCC; VCC = 5.5 V [2] - 5 500 - 500 A CI input capacitance - 2.0 - - - pF CS(OFF) OFF-state capacitance - 6.5 - - - pF CS(ON) ON-state capacitance - 11 - - - pF [1] All typical values are measured at Tamb = 25 C. [2] These typical values are measured at VCC = 3.3 V. 74LVC1G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 -- 9 December 2016 (c) Nexperia B.V. 2017. All rights reserved 5 of 21 74LVC1G66-Q100 Nexperia Bilateral switch 10.1 Test circuits 9&& 9&& ( 9,/ = 9, ( 9,+ < ,6 *1' ,6 = < *1' 9, 92 92 DDP DDP VI = VCC or GND and VO = GND or VCC. Fig 5. VI = VCC or GND and VO = open circuit. Test circuit for measuring OFF-state leakage current Fig 6. Test circuit for measuring ON-state leakage current 10.2 ON resistance Table 8. ON resistance At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graphs see Figure 8 to Figure 13. Symbol RON(peak) RON(rail) Parameter ON resistance (peak) ON resistance (rail) 40 C to +85 C Conditions 40 C to +125 C Unit Min Typ[1] Max Min Max ISW = 4 mA; VCC = 1.65 V to 1.95 V - 34.0 130 - 195 ISW = 8 mA; VCC = 2.3 V to 2.7 V - 12.0 30 - 45 ISW = 12 mA; VCC = 2.7 V - 10.4 25 - 38 ISW = 24 mA; VCC = 3.0 V to 3.6 V - 7.8 20 - 30 ISW = 32 mA; VCC = 4.5 V to 5.5 V - 6.2 15 - 23 VI = GND to VCC; see Figure 7 VI = GND; see Figure 7 ISW = 4 mA; VCC = 1.65 V to 1.95 V - 8.2 18 - 27 ISW = 8 mA; VCC = 2.3 V to 2.7 V - 7.1 16 - 24 ISW = 12 mA; VCC = 2.7 V - 6.9 14 - 21 ISW = 24 mA; VCC = 3.0 V to 3.6 V - 6.5 12 - 18 ISW = 32 mA; VCC = 4.5 V to 5.5 V - 5.8 10 - 15 ISW = 4 mA; VCC = 1.65 V to 1.95 V - 10.4 30 - 45 ISW = 8 mA; VCC = 2.3 V to 2.7 V - 7.6 20 - 30 VI = VCC; see Figure 7 74LVC1G66_Q100 Product data sheet ISW = 12 mA; VCC = 2.7 V - 7.0 18 - 27 ISW = 24 mA; VCC = 3.0 V to 3.6 V - 6.1 15 - 23 ISW = 32 mA; VCC = 4.5 V to 5.5 V - 4.9 10 - 15 All information provided in this document is subject to legal disclaimers. Rev. 2 -- 9 December 2016 (c) Nexperia B.V. 2017. All rights reserved 6 of 21 74LVC1G66-Q100 Nexperia Bilateral switch Table 8. ON resistance ...continued At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graphs see Figure 8 to Figure 13. Symbol Parameter RON(flat) 40 C to +85 C Conditions ON resistance (flatness) Min Typ[1] 40 C to +125 C Unit Max Min Max [2] VI = GND to VCC ISW = 4 mA; VCC = 1.65 V to 1.95 V - 26.0 - - - ISW = 8 mA; VCC = 2.3 V to 2.7 V - 5.0 - - - ISW = 12 mA; VCC = 2.7 V - 3.5 - - - ISW = 24 mA; VCC = 3.0 V to 3.6 V - 2.0 - - - ISW = 32 mA; VCC = 4.5 V to 5.5 V - 1.5 - - - [1] Typical values are measured at Tamb = 25 C and nominal VCC. [2] Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical VCC and temperature. 10.3 ON resistance test circuit and graphs PQD 521 96: 9&& ( 9,+ < = 9, *1' ,6: RON = VSW / ISW. 9, 9 DDP (1) VCC = 1.8 V. (2) VCC = 2.5 V. (3) VCC = 2.7 V. (4) VCC = 3.3 V. (5) VCC = 5.0 V. Fig 7. Test circuit for measuring ON resistance 74LVC1G66_Q100 Product data sheet Fig 8. Typical ON resistance as a function of input voltage; Tamb = 25 C All information provided in this document is subject to legal disclaimers. Rev. 2 -- 9 December 2016 (c) Nexperia B.V. 2017. All rights reserved 7 of 21 74LVC1G66-Q100 Nexperia Bilateral switch DDD 521 DDD 521 9, 9 (1) Tamb = 125 C. (1) Tamb = 125 C. (2) Tamb = 85 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (3) Tamb = 25 C. (4) Tamb = 40 C. (4) Tamb = 40 C. Fig 9. ON resistance as a function of input voltage; VCC = 1.8 V DDD 9, 9 521 Fig 10. ON resistance as a function of input voltage; VCC = 2.5 V DDD 521 9, 9 (1) Tamb = 125 C. (2) Tamb = 85 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (3) Tamb = 25 C. (4) Tamb = 40 C. (4) Tamb = 40 C. 74LVC1G66_Q100 Product data sheet 9, 9 (1) Tamb = 125 C. Fig 11. ON resistance as a function of input voltage; VCC = 2.7 V Fig 12. ON resistance as a function of input voltage; VCC = 3.3 V All information provided in this document is subject to legal disclaimers. Rev. 2 -- 9 December 2016 (c) Nexperia B.V. 2017. All rights reserved 8 of 21 74LVC1G66-Q100 Nexperia Bilateral switch DDD 521 9, 9 (1) Tamb = 125 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (4) Tamb = 40 C. Fig 13. ON resistance as a function of input voltage; VCC = 5.0 V 11. Dynamic characteristics Table 9. Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit see Figure 16. Symbol Parameter tpd 40 C to +85 C Conditions Min Max Min Max VCC = 1.65 V to 1.95 V - 0.8 2.0 - 3.0 ns VCC = 2.3 V to 2.7 V - 0.4 1.2 - 2.0 ns VCC = 2.7 V - 0.4 1.0 - 1.5 ns VCC = 3.0 V to 3.6 V - 0.3 0.8 - 1.5 ns - 0.2 0.6 - 1.0 ns [2][3] propagation delay Y to Z or Z to Y; see Figure 14 VCC = 4.5 V to 5.5 V ten enable time 74LVC1G66_Q100 Product data sheet 40 C to +125 C Unit Typ[1] E to Y or Z; see Figure 15 [4] VCC = 1.65 V to 1.95 V 1.0 5.3 12 1.0 15.5 ns VCC = 2.3 V to 2.7 V 1.0 3.0 6.5 1.0 8.5 ns VCC = 2.7 V 1.0 2.6 6.0 1.0 8.0 ns VCC = 3.0 V to 3.6 V 1.0 2.5 5.0 1.0 6.5 ns VCC = 4.5 V to 5.5 V 1.0 1.9 4.2 1.0 5.5 ns All information provided in this document is subject to legal disclaimers. Rev. 2 -- 9 December 2016 (c) Nexperia B.V. 2017. All rights reserved 9 of 21 74LVC1G66-Q100 Nexperia Bilateral switch Table 9. Dynamic characteristics ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit see Figure 16. Symbol Parameter 40 C to +85 C Conditions Min tdis disable time power dissipation capacitance 40 C to +125 C Unit Max Min Max [5] E to Y or Z; see Figure 15 VCC = 1.65 V to 1.95 V 1.0 4.2 10 1.0 13 ns VCC = 2.3 V to 2.7 V 1.0 2.4 6.9 1.0 9.0 ns VCC = 2.7 V 1.0 3.6 7.5 1.0 9.5 ns VCC = 3.0 V to 3.6 V 1.0 3.4 6.5 1.0 8.5 ns 1.0 2.5 5.0 1.0 6.5 ns VCC = 2.5 V - 9.8 - - - pF VCC = 3.3 V - 12.0 - - - pF VCC = 5.0 V - 17.3 - - - pF VCC = 4.5 V to 5.5 V CPD Typ[1] [6] CL = 50 pF; fi = 10 MHz; VI = GND to VCC [1] Typical values are measured at Tamb = 25 C and nominal VCC. [2] tpd is the same as tPLH and tPHL [3] propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified capacitance when driven by an ideal voltage source (zero output impedance). [4] ten is the same as tPZH and tPZL [5] tdis is the same as tPLZ and tPHZ [6] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD VCC2 fi N + {(CL + CS(ON)) VCC2 fo} where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; CS(ON) = maximum ON-state switch capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; {(CL + CS(ON)) VCC2 fo} = sum of the outputs. 11.1 Waveforms and test circuit 9, 90