Rev.3.00, Jul.22.2005, page 1 of 6
HD74LS48
BCD-to-Seven-Segment Decoder / Driver (Internal Pull-up outputs)
REJ03D0411–0300
Rev.3.00
Jul.22.2005
HD74LS48 features active high outputs for driving lamp buffers. This circuit has full ripple blanking input / output
controls and a lamp test input. Display patterns for BCD input counts abo ve 9 are uniq ue s ymbols to authenticate inp ut
conditions. This circuit incorp orates automatic leading and / or trailing-edge zero-blanking control (RBI and RB O).
Lamp test (LT) of these types may be performed at any time when the BI / RBO node is at a high level. It contains an
overriding blanking input (BI) which can be used to control the lamp intensity be pulsin g or to inhibit the outputs.
Inputs and outputs are entirely compatible for use with TTL or DTL logic outputs.
Features
Orderi ng Info rmati on
Part Name Package Type Package Code
(Previous Code) Package
Abbreviation Taping Abbreviation
(Quantity)
HD74LS48P DILP-16 pin PRDP0016AE-B
(DP-16FV) P —
Pin Arrangement
(Top view)
V
CC
GND
B
C
Lamp
Test
BI/RBO
RBI
D
A
f
g
b
a
c
d
e
15
161
2
3
4
5
6
7
14
89
10
11
12
13
Outputs
Inputs
Inputs
B
C
D
A
RBI
BI/RBO
LT
f
g
d
e
c
b
a
HD74LS48
Rev.3.00, Jul.22.2005, page 2 of 6
Function Table
Inputs Outputs Decimal or
Function LT RBI D C B A BI /
RBO a b c d e f g
Note
0 H H L L L L H H H H H H H L
1 H X L L L H H L H H L L L L
2 H X L L H L H H H L H H L H
3 H X L L H H H H H H H L L H
4 H X L H L L H L H H L L H H
5 H X L H L H H H L H H L H H
6 H X L H H L H L L H H H H H
7 H X L H H H H H H H L L L L
8 H X H L L L H H H H H H H H
9 H X H L L H H H H H L L H H
10 H X H L H L H L L L H H L H
11 H X H L H H H L L H H L L H
12 H X H H L L H L H L L L H H
13 H X H H L H H H L L H L H H
14 H X H H H L H L L L H H H H
15 H X H H H H H L L L L L L L
1
BI X X X X X X L L L L L L L L 2
RBI H L L L L L L L L L L L L L 3
LT L X X X X X H H H H H H H H 4
H; high level, L; low level, X, irrelevant
Notes: 1. The blanking input (BI) must be open or held at a high logic level when output functions 0 through 15 are
desired.
2. When a low logic level is applied directly to the blanking input (BI), all segment outputs are low regardless of
the level of any other input.
3. When ripple-blanking input (RBI) and inputs A, B, C, and D are at a low level with the lamp-test input high, all
segment outputs go low and the ripple-blanking output (RBO) goes to a low level (response condition).
4. When a blanking input / ripple blanking output (BI / RBO) is open or held high and a low is applied to the
lamp-test input, all segment outputs are high.
a
543210 6 7 8 9 101112131415
b
d
c
f
e
g
HD74LS48
Rev.3.00, Jul.22.2005, page 3 of 6
Block Diagram
Blanking Input or
Ripple Blanking
Output (BI/RBO)
Lamp Test (LT)
Ripple Blanking (RBI)
Outputs
Inputs
A
B
C
D
Inputs
a
b
c
d
e
f
g
Absolute Maximum Ratings
Item Symbol Ratings Unit
Supply voltage VCC 7 V
Input voltage VIN 7 V
Power dissipation PT 400 mW
Storage temperature Tstg –65 to +150 °C
Note: Voltage value, unless otherwise noted, are with respect to network ground terminal.
Recommended Operating Conditions
Item Symbol Min Typ Max Unit
Supply voltage VCC 4.75 5.00 5.25 V
IOH (a to g) –100 µA
Output current IOH (BI/RBO) –50 µA
IOL (a to g) 6 mA
Output current IOL (BI/RBO) 3.2 mA
Operating temperature Topr -20 25 75 °C
HD74LS48
Rev.3.00, Jul.22.2005, page 4 of 6
Electrical Characteristics
(Ta = –20 to +75 °C)
Item Symbol min. typ.* max. Unit Condition
VIH 2.0 V
Input voltage VIL0.8 V
a to g 2.4 V IOH = –100 µA
BI / RBO VOH 2.4 — V IOH = –50 µA VCC = 4.75 V,
VIH = 2 V, VIL = 0.8 V
— — 0.4 IOL = 2 mA
a to g — — 0.5 V IOL = 6 mA
— — 0.4 IOL = 1.6 mA
Output voltage
BI / RBO VOL
— — 0.5 V IOL = 3.2 mA
VCC = 4.75 V,
VIH = 2 V, VIL = 0.8 V
Output current** a to g IO –1.3 mA VCC = 4.75 V, VO = 0.85 V,
IIH — — 20 µA VCC = 5.25 V, VI = 2.7 V
except BI
/ RBO — — –0.4 mA VCC = 5.25 V, VI = 0.4 V
BI / RBO IIL — — –1.2 mA VCC = 5.25 V, VI = 0.4 V
Input current except BI
/ RBO II0.1 mA VCC = 5.25 V, VI = 7 V
Short-circuit
output current BI / RBO IOS –0.3 –2 mA VCC = 5.25 V
Supply current*** ICC25 38 mA VCC = 5.25 V
Input clamp voltag e VIK–1.5 V VCC = 4.75 V, IIN = –18 mA
Notes: * VCC = 5 V, Ta = 25°C
** Input condition as for VOH
*** ICC is measured with all outputs open and inputs at 4.5 V.
Switching Characteristics
(VCC = 5 V, Ta = 25°C)
Item Symbol Input min. typ. max. Unit Condition
tPHL100
Turn-on time tPLH A — — 100
ns CL = 15 pF, RL = 4 k
tPHL100
Turn-off time tPLH RBI — — 100
ns CL = 15 pF, RL = 6 k
HD74LS48
Rev.3.00, Jul.22.2005, page 5 of 6
Testing Method
Test Circuit
4.5V
A
B
C
D
LT
RBI
BI/RBO
Input
P.G.
Z
out
= 50
See Testing Table
Output
V
CC
a
b
d
c
e
f
g
R
L
C
L
Waveform
tPLH tPHL
VOH
VOL
0 V
3 V
VOH
VOL
tPHL tPLH
10%
90%
1.3 V
1.3 V 1.3 V
1.3 V 1.3 V
1.3 V
10%
90%
Input
In phase output
Out of phase output
tTLH tTHL
Testing Table
Inputs Outputs
Item RBI D C B A a b c d e f g
4.5 V GND GND GND IN OUT — — OUT OUT OUT
4.5 V GND GND 4.5 V IN OUT OUT
4.5 V GND 4.5 V 4.5 V IN OUT OUT OUT OUT OUT OUT
tPLH
tPHL IN GND GND GND GND OUT OUT OUT OUT OUT OUT
HD74LS48
Rev.3.00, Jul.22.2005, page 6 of 6
Package Dimensions
7.62
DP-16FV
RENESAS CodeJEITA Package Code Previous Code
MaxNomMin
Dimension in Millimeters
Symbol
Reference
19.2
6.3
5.06
MASS[Typ.]
1.05g
A
Z
b
D
E
A
b
c
θ
e
L
1
1
p
3
e
0.51
0.56
1.30
0.19 0.25 0.31
2.29 2.54 2.79
0
°
15
°
PRDP0016AE-BP-DIP16-6.3x19.2-2.54
20.32
7.4
0.40 0.48
1.12
2.54
1
p
1
3
1 8
16 9
e
b
A
LA
Z
e c
E
D
b
0.89
θ
( Ni/Pd/Au plating )
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